1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * drivers/net/phy/marvell.c
4  *
5  * Driver for Marvell PHYs
6  *
7  * Author: Andy Fleming
8  *
9  * Copyright (c) 2004 Freescale Semiconductor, Inc.
10  *
11  * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
12  */
13 #include <linux/kernel.h>
14 #include <linux/string.h>
15 #include <linux/ctype.h>
16 #include <linux/errno.h>
17 #include <linux/unistd.h>
18 #include <linux/hwmon.h>
19 #include <linux/interrupt.h>
20 #include <linux/init.h>
21 #include <linux/delay.h>
22 #include <linux/netdevice.h>
23 #include <linux/etherdevice.h>
24 #include <linux/skbuff.h>
25 #include <linux/spinlock.h>
26 #include <linux/mm.h>
27 #include <linux/module.h>
28 #include <linux/mii.h>
29 #include <linux/ethtool.h>
30 #include <linux/ethtool_netlink.h>
31 #include <linux/phy.h>
32 #include <linux/marvell_phy.h>
33 #include <linux/bitfield.h>
34 #include <linux/of.h>
35 #include <linux/sfp.h>
36 
37 #include <linux/io.h>
38 #include <asm/irq.h>
39 #include <linux/uaccess.h>
40 
41 #define MII_MARVELL_PHY_PAGE		22
42 #define MII_MARVELL_COPPER_PAGE		0x00
43 #define MII_MARVELL_FIBER_PAGE		0x01
44 #define MII_MARVELL_MSCR_PAGE		0x02
45 #define MII_MARVELL_LED_PAGE		0x03
46 #define MII_MARVELL_VCT5_PAGE		0x05
47 #define MII_MARVELL_MISC_TEST_PAGE	0x06
48 #define MII_MARVELL_VCT7_PAGE		0x07
49 #define MII_MARVELL_WOL_PAGE		0x11
50 #define MII_MARVELL_MODE_PAGE		0x12
51 
52 #define MII_M1011_IEVENT		0x13
53 #define MII_M1011_IEVENT_CLEAR		0x0000
54 
55 #define MII_M1011_IMASK			0x12
56 #define MII_M1011_IMASK_INIT		0x6400
57 #define MII_M1011_IMASK_CLEAR		0x0000
58 
59 #define MII_M1011_PHY_SCR			0x10
60 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN		BIT(11)
61 #define MII_M1011_PHY_SCR_DOWNSHIFT_MASK	GENMASK(14, 12)
62 #define MII_M1011_PHY_SCR_DOWNSHIFT_MAX		8
63 #define MII_M1011_PHY_SCR_MDI			(0x0 << 5)
64 #define MII_M1011_PHY_SCR_MDI_X			(0x1 << 5)
65 #define MII_M1011_PHY_SCR_AUTO_CROSS		(0x3 << 5)
66 
67 #define MII_M1011_PHY_SSR			0x11
68 #define MII_M1011_PHY_SSR_DOWNSHIFT		BIT(5)
69 
70 #define MII_M1111_PHY_LED_CONTROL	0x18
71 #define MII_M1111_PHY_LED_DIRECT	0x4100
72 #define MII_M1111_PHY_LED_COMBINE	0x411c
73 #define MII_M1111_PHY_EXT_CR		0x14
74 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK	GENMASK(11, 9)
75 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX	8
76 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN	BIT(8)
77 #define MII_M1111_RGMII_RX_DELAY	BIT(7)
78 #define MII_M1111_RGMII_TX_DELAY	BIT(1)
79 #define MII_M1111_PHY_EXT_SR		0x1b
80 
81 #define MII_M1111_HWCFG_MODE_MASK		0xf
82 #define MII_M1111_HWCFG_MODE_FIBER_RGMII	0x3
83 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK	0x4
84 #define MII_M1111_HWCFG_MODE_RTBI		0x7
85 #define MII_M1111_HWCFG_MODE_COPPER_1000X_AN	0x8
86 #define MII_M1111_HWCFG_MODE_COPPER_RTBI	0x9
87 #define MII_M1111_HWCFG_MODE_COPPER_RGMII	0xb
88 #define MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN	0xc
89 #define MII_M1111_HWCFG_SERIAL_AN_BYPASS	BIT(12)
90 #define MII_M1111_HWCFG_FIBER_COPPER_RES	BIT(13)
91 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO	BIT(15)
92 
93 #define MII_88E1121_PHY_MSCR_REG	21
94 #define MII_88E1121_PHY_MSCR_RX_DELAY	BIT(5)
95 #define MII_88E1121_PHY_MSCR_TX_DELAY	BIT(4)
96 #define MII_88E1121_PHY_MSCR_DELAY_MASK	(BIT(5) | BIT(4))
97 
98 #define MII_88E1121_MISC_TEST				0x1a
99 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK	0x1f00
100 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT	8
101 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN		BIT(7)
102 #define MII_88E1510_MISC_TEST_TEMP_IRQ			BIT(6)
103 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN		BIT(5)
104 #define MII_88E1121_MISC_TEST_TEMP_MASK			0x1f
105 
106 #define MII_88E1510_TEMP_SENSOR		0x1b
107 #define MII_88E1510_TEMP_SENSOR_MASK	0xff
108 
109 #define MII_88E1540_COPPER_CTRL3	0x1a
110 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK	GENMASK(11, 10)
111 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS	0
112 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS	1
113 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS	2
114 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS	3
115 #define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN		BIT(9)
116 
117 #define MII_88E6390_MISC_TEST		0x1b
118 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S	(0x0 << 14)
119 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE		(0x1 << 14)
120 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_ONESHOT	(0x2 << 14)
121 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE		(0x3 << 14)
122 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK			(0x3 << 14)
123 #define MII_88E6393_MISC_TEST_SAMPLES_2048	(0x0 << 11)
124 #define MII_88E6393_MISC_TEST_SAMPLES_4096	(0x1 << 11)
125 #define MII_88E6393_MISC_TEST_SAMPLES_8192	(0x2 << 11)
126 #define MII_88E6393_MISC_TEST_SAMPLES_16384	(0x3 << 11)
127 #define MII_88E6393_MISC_TEST_SAMPLES_MASK	(0x3 << 11)
128 #define MII_88E6393_MISC_TEST_RATE_2_3MS	(0x5 << 8)
129 #define MII_88E6393_MISC_TEST_RATE_6_4MS	(0x6 << 8)
130 #define MII_88E6393_MISC_TEST_RATE_11_9MS	(0x7 << 8)
131 #define MII_88E6393_MISC_TEST_RATE_MASK		(0x7 << 8)
132 
133 #define MII_88E6390_TEMP_SENSOR		0x1c
134 #define MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK	0xff00
135 #define MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT	8
136 #define MII_88E6390_TEMP_SENSOR_MASK		0xff
137 #define MII_88E6390_TEMP_SENSOR_SAMPLES		10
138 
139 #define MII_88E1318S_PHY_MSCR1_REG	16
140 #define MII_88E1318S_PHY_MSCR1_PAD_ODD	BIT(6)
141 
142 /* Copper Specific Interrupt Enable Register */
143 #define MII_88E1318S_PHY_CSIER				0x12
144 /* WOL Event Interrupt Enable */
145 #define MII_88E1318S_PHY_CSIER_WOL_EIE			BIT(7)
146 
147 #define MII_88E1318S_PHY_LED_FUNC		0x10
148 #define MII_88E1318S_PHY_LED_FUNC_OFF		(0x8)
149 #define MII_88E1318S_PHY_LED_FUNC_ON		(0x9)
150 #define MII_88E1318S_PHY_LED_FUNC_HI_Z		(0xa)
151 #define MII_88E1318S_PHY_LED_FUNC_BLINK		(0xb)
152 #define MII_88E1318S_PHY_LED_TCR		0x12
153 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT	BIT(15)
154 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE	BIT(7)
155 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW	BIT(11)
156 
157 /* Magic Packet MAC address registers */
158 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2		0x17
159 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1		0x18
160 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0		0x19
161 
162 #define MII_88E1318S_PHY_WOL_CTRL				0x10
163 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS		BIT(12)
164 #define MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE		BIT(13)
165 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE	BIT(14)
166 
167 #define MII_PHY_LED_CTRL	        16
168 #define MII_88E1121_PHY_LED_DEF		0x0030
169 #define MII_88E1510_PHY_LED_DEF		0x1177
170 #define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE	0x1040
171 
172 #define MII_M1011_PHY_STATUS		0x11
173 #define MII_M1011_PHY_STATUS_1000	0x8000
174 #define MII_M1011_PHY_STATUS_100	0x4000
175 #define MII_M1011_PHY_STATUS_SPD_MASK	0xc000
176 #define MII_M1011_PHY_STATUS_FULLDUPLEX	0x2000
177 #define MII_M1011_PHY_STATUS_RESOLVED	0x0800
178 #define MII_M1011_PHY_STATUS_LINK	0x0400
179 
180 #define MII_88E3016_PHY_SPEC_CTRL	0x10
181 #define MII_88E3016_DISABLE_SCRAMBLER	0x0200
182 #define MII_88E3016_AUTO_MDIX_CROSSOVER	0x0030
183 
184 #define MII_88E1510_GEN_CTRL_REG_1		0x14
185 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK	0x7
186 #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII	0x0	/* RGMII to copper */
187 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII	0x1	/* SGMII to copper */
188 /* RGMII to 1000BASE-X */
189 #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_1000X	0x2
190 /* RGMII to 100BASE-FX */
191 #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_100FX	0x3
192 /* RGMII to SGMII */
193 #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII	0x4
194 #define MII_88E1510_GEN_CTRL_REG_1_RESET	0x8000	/* Soft reset */
195 
196 #define MII_88E1510_MSCR_2		0x15
197 
198 #define MII_VCT5_TX_RX_MDI0_COUPLING	0x10
199 #define MII_VCT5_TX_RX_MDI1_COUPLING	0x11
200 #define MII_VCT5_TX_RX_MDI2_COUPLING	0x12
201 #define MII_VCT5_TX_RX_MDI3_COUPLING	0x13
202 #define MII_VCT5_TX_RX_AMPLITUDE_MASK	0x7f00
203 #define MII_VCT5_TX_RX_AMPLITUDE_SHIFT	8
204 #define MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION	BIT(15)
205 
206 #define MII_VCT5_CTRL				0x17
207 #define MII_VCT5_CTRL_ENABLE				BIT(15)
208 #define MII_VCT5_CTRL_COMPLETE				BIT(14)
209 #define MII_VCT5_CTRL_TX_SAME_CHANNEL			(0x0 << 11)
210 #define MII_VCT5_CTRL_TX0_CHANNEL			(0x4 << 11)
211 #define MII_VCT5_CTRL_TX1_CHANNEL			(0x5 << 11)
212 #define MII_VCT5_CTRL_TX2_CHANNEL			(0x6 << 11)
213 #define MII_VCT5_CTRL_TX3_CHANNEL			(0x7 << 11)
214 #define MII_VCT5_CTRL_SAMPLES_2				(0x0 << 8)
215 #define MII_VCT5_CTRL_SAMPLES_4				(0x1 << 8)
216 #define MII_VCT5_CTRL_SAMPLES_8				(0x2 << 8)
217 #define MII_VCT5_CTRL_SAMPLES_16			(0x3 << 8)
218 #define MII_VCT5_CTRL_SAMPLES_32			(0x4 << 8)
219 #define MII_VCT5_CTRL_SAMPLES_64			(0x5 << 8)
220 #define MII_VCT5_CTRL_SAMPLES_128			(0x6 << 8)
221 #define MII_VCT5_CTRL_SAMPLES_DEFAULT			(0x6 << 8)
222 #define MII_VCT5_CTRL_SAMPLES_256			(0x7 << 8)
223 #define MII_VCT5_CTRL_SAMPLES_SHIFT			8
224 #define MII_VCT5_CTRL_MODE_MAXIMUM_PEEK			(0x0 << 6)
225 #define MII_VCT5_CTRL_MODE_FIRST_LAST_PEEK		(0x1 << 6)
226 #define MII_VCT5_CTRL_MODE_OFFSET			(0x2 << 6)
227 #define MII_VCT5_CTRL_SAMPLE_POINT			(0x3 << 6)
228 #define MII_VCT5_CTRL_PEEK_HYST_DEFAULT			3
229 
230 #define MII_VCT5_SAMPLE_POINT_DISTANCE		0x18
231 #define MII_VCT5_SAMPLE_POINT_DISTANCE_MAX	511
232 #define MII_VCT5_TX_PULSE_CTRL			0x1c
233 #define MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN	BIT(12)
234 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS	(0x0 << 10)
235 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_96nS		(0x1 << 10)
236 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_64nS		(0x2 << 10)
237 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS		(0x3 << 10)
238 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_SHIFT	10
239 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_1000mV	(0x0 << 8)
240 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_750mV	(0x1 << 8)
241 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_500mV	(0x2 << 8)
242 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_250mV	(0x3 << 8)
243 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_SHIFT	8
244 #define MII_VCT5_TX_PULSE_CTRL_MAX_AMP			BIT(7)
245 #define MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV		(0x6 << 0)
246 
247 /* For TDR measurements less than 11 meters, a short pulse should be
248  * used.
249  */
250 #define TDR_SHORT_CABLE_LENGTH	11
251 
252 #define MII_VCT7_PAIR_0_DISTANCE	0x10
253 #define MII_VCT7_PAIR_1_DISTANCE	0x11
254 #define MII_VCT7_PAIR_2_DISTANCE	0x12
255 #define MII_VCT7_PAIR_3_DISTANCE	0x13
256 
257 #define MII_VCT7_RESULTS	0x14
258 #define MII_VCT7_RESULTS_PAIR3_MASK	0xf000
259 #define MII_VCT7_RESULTS_PAIR2_MASK	0x0f00
260 #define MII_VCT7_RESULTS_PAIR1_MASK	0x00f0
261 #define MII_VCT7_RESULTS_PAIR0_MASK	0x000f
262 #define MII_VCT7_RESULTS_PAIR3_SHIFT	12
263 #define MII_VCT7_RESULTS_PAIR2_SHIFT	8
264 #define MII_VCT7_RESULTS_PAIR1_SHIFT	4
265 #define MII_VCT7_RESULTS_PAIR0_SHIFT	0
266 #define MII_VCT7_RESULTS_INVALID	0
267 #define MII_VCT7_RESULTS_OK		1
268 #define MII_VCT7_RESULTS_OPEN		2
269 #define MII_VCT7_RESULTS_SAME_SHORT	3
270 #define MII_VCT7_RESULTS_CROSS_SHORT	4
271 #define MII_VCT7_RESULTS_BUSY		9
272 
273 #define MII_VCT7_CTRL		0x15
274 #define MII_VCT7_CTRL_RUN_NOW			BIT(15)
275 #define MII_VCT7_CTRL_RUN_ANEG			BIT(14)
276 #define MII_VCT7_CTRL_DISABLE_CROSS		BIT(13)
277 #define MII_VCT7_CTRL_RUN_AFTER_BREAK_LINK	BIT(12)
278 #define MII_VCT7_CTRL_IN_PROGRESS		BIT(11)
279 #define MII_VCT7_CTRL_METERS			BIT(10)
280 #define MII_VCT7_CTRL_CENTIMETERS		0
281 
282 #define LPA_PAUSE_FIBER		0x180
283 #define LPA_PAUSE_ASYM_FIBER	0x100
284 
285 #define NB_FIBER_STATS	1
286 
287 MODULE_DESCRIPTION("Marvell PHY driver");
288 MODULE_AUTHOR("Andy Fleming");
289 MODULE_LICENSE("GPL");
290 
291 struct marvell_hw_stat {
292 	const char *string;
293 	u8 page;
294 	u8 reg;
295 	u8 bits;
296 };
297 
298 static struct marvell_hw_stat marvell_hw_stats[] = {
299 	{ "phy_receive_errors_copper", 0, 21, 16},
300 	{ "phy_idle_errors", 0, 10, 8 },
301 	{ "phy_receive_errors_fiber", 1, 21, 16},
302 };
303 
304 struct marvell_priv {
305 	u64 stats[ARRAY_SIZE(marvell_hw_stats)];
306 	char *hwmon_name;
307 	struct device *hwmon_dev;
308 	bool cable_test_tdr;
309 	u32 first;
310 	u32 last;
311 	u32 step;
312 	s8 pair;
313 };
314 
marvell_read_page(struct phy_device * phydev)315 static int marvell_read_page(struct phy_device *phydev)
316 {
317 	return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
318 }
319 
marvell_write_page(struct phy_device * phydev,int page)320 static int marvell_write_page(struct phy_device *phydev, int page)
321 {
322 	return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
323 }
324 
marvell_set_page(struct phy_device * phydev,int page)325 static int marvell_set_page(struct phy_device *phydev, int page)
326 {
327 	return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
328 }
329 
marvell_ack_interrupt(struct phy_device * phydev)330 static int marvell_ack_interrupt(struct phy_device *phydev)
331 {
332 	int err;
333 
334 	/* Clear the interrupts by reading the reg */
335 	err = phy_read(phydev, MII_M1011_IEVENT);
336 
337 	if (err < 0)
338 		return err;
339 
340 	return 0;
341 }
342 
marvell_config_intr(struct phy_device * phydev)343 static int marvell_config_intr(struct phy_device *phydev)
344 {
345 	int err;
346 
347 	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
348 		err = marvell_ack_interrupt(phydev);
349 		if (err)
350 			return err;
351 
352 		err = phy_write(phydev, MII_M1011_IMASK,
353 				MII_M1011_IMASK_INIT);
354 	} else {
355 		err = phy_write(phydev, MII_M1011_IMASK,
356 				MII_M1011_IMASK_CLEAR);
357 		if (err)
358 			return err;
359 
360 		err = marvell_ack_interrupt(phydev);
361 	}
362 
363 	return err;
364 }
365 
marvell_handle_interrupt(struct phy_device * phydev)366 static irqreturn_t marvell_handle_interrupt(struct phy_device *phydev)
367 {
368 	int irq_status;
369 
370 	irq_status = phy_read(phydev, MII_M1011_IEVENT);
371 	if (irq_status < 0) {
372 		phy_error(phydev);
373 		return IRQ_NONE;
374 	}
375 
376 	if (!(irq_status & MII_M1011_IMASK_INIT))
377 		return IRQ_NONE;
378 
379 	phy_trigger_machine(phydev);
380 
381 	return IRQ_HANDLED;
382 }
383 
marvell_set_polarity(struct phy_device * phydev,int polarity)384 static int marvell_set_polarity(struct phy_device *phydev, int polarity)
385 {
386 	u16 val;
387 
388 	switch (polarity) {
389 	case ETH_TP_MDI:
390 		val = MII_M1011_PHY_SCR_MDI;
391 		break;
392 	case ETH_TP_MDI_X:
393 		val = MII_M1011_PHY_SCR_MDI_X;
394 		break;
395 	case ETH_TP_MDI_AUTO:
396 	case ETH_TP_MDI_INVALID:
397 	default:
398 		val = MII_M1011_PHY_SCR_AUTO_CROSS;
399 		break;
400 	}
401 
402 	return phy_modify_changed(phydev, MII_M1011_PHY_SCR,
403 				  MII_M1011_PHY_SCR_AUTO_CROSS, val);
404 }
405 
marvell_config_aneg(struct phy_device * phydev)406 static int marvell_config_aneg(struct phy_device *phydev)
407 {
408 	int changed = 0;
409 	int err;
410 
411 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
412 	if (err < 0)
413 		return err;
414 
415 	changed = err;
416 
417 	err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
418 			MII_M1111_PHY_LED_DIRECT);
419 	if (err < 0)
420 		return err;
421 
422 	err = genphy_config_aneg(phydev);
423 	if (err < 0)
424 		return err;
425 
426 	if (phydev->autoneg != AUTONEG_ENABLE || changed) {
427 		/* A write to speed/duplex bits (that is performed by
428 		 * genphy_config_aneg() call above) must be followed by
429 		 * a software reset. Otherwise, the write has no effect.
430 		 */
431 		err = genphy_soft_reset(phydev);
432 		if (err < 0)
433 			return err;
434 	}
435 
436 	return 0;
437 }
438 
m88e1101_config_aneg(struct phy_device * phydev)439 static int m88e1101_config_aneg(struct phy_device *phydev)
440 {
441 	int err;
442 
443 	/* This Marvell PHY has an errata which requires
444 	 * that certain registers get written in order
445 	 * to restart autonegotiation
446 	 */
447 	err = genphy_soft_reset(phydev);
448 	if (err < 0)
449 		return err;
450 
451 	err = phy_write(phydev, 0x1d, 0x1f);
452 	if (err < 0)
453 		return err;
454 
455 	err = phy_write(phydev, 0x1e, 0x200c);
456 	if (err < 0)
457 		return err;
458 
459 	err = phy_write(phydev, 0x1d, 0x5);
460 	if (err < 0)
461 		return err;
462 
463 	err = phy_write(phydev, 0x1e, 0);
464 	if (err < 0)
465 		return err;
466 
467 	err = phy_write(phydev, 0x1e, 0x100);
468 	if (err < 0)
469 		return err;
470 
471 	return marvell_config_aneg(phydev);
472 }
473 
474 #if IS_ENABLED(CONFIG_OF_MDIO)
475 /* Set and/or override some configuration registers based on the
476  * marvell,reg-init property stored in the of_node for the phydev.
477  *
478  * marvell,reg-init = <reg-page reg mask value>,...;
479  *
480  * There may be one or more sets of <reg-page reg mask value>:
481  *
482  * reg-page: which register bank to use.
483  * reg: the register.
484  * mask: if non-zero, ANDed with existing register value.
485  * value: ORed with the masked value and written to the regiser.
486  *
487  */
marvell_of_reg_init(struct phy_device * phydev)488 static int marvell_of_reg_init(struct phy_device *phydev)
489 {
490 	const __be32 *paddr;
491 	int len, i, saved_page, current_page, ret = 0;
492 
493 	if (!phydev->mdio.dev.of_node)
494 		return 0;
495 
496 	paddr = of_get_property(phydev->mdio.dev.of_node,
497 				"marvell,reg-init", &len);
498 	if (!paddr || len < (4 * sizeof(*paddr)))
499 		return 0;
500 
501 	saved_page = phy_save_page(phydev);
502 	if (saved_page < 0)
503 		goto err;
504 	current_page = saved_page;
505 
506 	len /= sizeof(*paddr);
507 	for (i = 0; i < len - 3; i += 4) {
508 		u16 page = be32_to_cpup(paddr + i);
509 		u16 reg = be32_to_cpup(paddr + i + 1);
510 		u16 mask = be32_to_cpup(paddr + i + 2);
511 		u16 val_bits = be32_to_cpup(paddr + i + 3);
512 		int val;
513 
514 		if (page != current_page) {
515 			current_page = page;
516 			ret = marvell_write_page(phydev, page);
517 			if (ret < 0)
518 				goto err;
519 		}
520 
521 		val = 0;
522 		if (mask) {
523 			val = __phy_read(phydev, reg);
524 			if (val < 0) {
525 				ret = val;
526 				goto err;
527 			}
528 			val &= mask;
529 		}
530 		val |= val_bits;
531 
532 		ret = __phy_write(phydev, reg, val);
533 		if (ret < 0)
534 			goto err;
535 	}
536 err:
537 	return phy_restore_page(phydev, saved_page, ret);
538 }
539 #else
marvell_of_reg_init(struct phy_device * phydev)540 static int marvell_of_reg_init(struct phy_device *phydev)
541 {
542 	return 0;
543 }
544 #endif /* CONFIG_OF_MDIO */
545 
m88e1121_config_aneg_rgmii_delays(struct phy_device * phydev)546 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
547 {
548 	int mscr;
549 
550 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
551 		mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
552 		       MII_88E1121_PHY_MSCR_TX_DELAY;
553 	else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
554 		mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
555 	else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
556 		mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
557 	else
558 		mscr = 0;
559 
560 	return phy_modify_paged_changed(phydev, MII_MARVELL_MSCR_PAGE,
561 					MII_88E1121_PHY_MSCR_REG,
562 					MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
563 }
564 
m88e1121_config_aneg(struct phy_device * phydev)565 static int m88e1121_config_aneg(struct phy_device *phydev)
566 {
567 	int changed = 0;
568 	int err = 0;
569 
570 	if (phy_interface_is_rgmii(phydev)) {
571 		err = m88e1121_config_aneg_rgmii_delays(phydev);
572 		if (err < 0)
573 			return err;
574 	}
575 
576 	changed = err;
577 
578 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
579 	if (err < 0)
580 		return err;
581 
582 	changed |= err;
583 
584 	err = genphy_config_aneg(phydev);
585 	if (err < 0)
586 		return err;
587 
588 	if (phydev->autoneg != AUTONEG_ENABLE || changed) {
589 		/* A software reset is used to ensure a "commit" of the
590 		 * changes is done.
591 		 */
592 		err = genphy_soft_reset(phydev);
593 		if (err < 0)
594 			return err;
595 	}
596 
597 	return 0;
598 }
599 
m88e1318_config_aneg(struct phy_device * phydev)600 static int m88e1318_config_aneg(struct phy_device *phydev)
601 {
602 	int err;
603 
604 	err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
605 			       MII_88E1318S_PHY_MSCR1_REG,
606 			       0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
607 	if (err < 0)
608 		return err;
609 
610 	return m88e1121_config_aneg(phydev);
611 }
612 
613 /**
614  * linkmode_adv_to_fiber_adv_t
615  * @advertise: the linkmode advertisement settings
616  *
617  * A small helper function that translates linkmode advertisement
618  * settings to phy autonegotiation advertisements for the MII_ADV
619  * register for fiber link.
620  */
linkmode_adv_to_fiber_adv_t(unsigned long * advertise)621 static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise)
622 {
623 	u32 result = 0;
624 
625 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise))
626 		result |= ADVERTISE_1000XHALF;
627 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise))
628 		result |= ADVERTISE_1000XFULL;
629 
630 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) &&
631 	    linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
632 		result |= ADVERTISE_1000XPSE_ASYM;
633 	else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
634 		result |= ADVERTISE_1000XPAUSE;
635 
636 	return result;
637 }
638 
639 /**
640  * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
641  * @phydev: target phy_device struct
642  *
643  * Description: If auto-negotiation is enabled, we configure the
644  *   advertising, and then restart auto-negotiation.  If it is not
645  *   enabled, then we write the BMCR. Adapted for fiber link in
646  *   some Marvell's devices.
647  */
marvell_config_aneg_fiber(struct phy_device * phydev)648 static int marvell_config_aneg_fiber(struct phy_device *phydev)
649 {
650 	int changed = 0;
651 	int err;
652 	u16 adv;
653 
654 	if (phydev->autoneg != AUTONEG_ENABLE)
655 		return genphy_setup_forced(phydev);
656 
657 	/* Only allow advertising what this PHY supports */
658 	linkmode_and(phydev->advertising, phydev->advertising,
659 		     phydev->supported);
660 
661 	adv = linkmode_adv_to_fiber_adv_t(phydev->advertising);
662 
663 	/* Setup fiber advertisement */
664 	err = phy_modify_changed(phydev, MII_ADVERTISE,
665 				 ADVERTISE_1000XHALF | ADVERTISE_1000XFULL |
666 				 ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM,
667 				 adv);
668 	if (err < 0)
669 		return err;
670 	if (err > 0)
671 		changed = 1;
672 
673 	return genphy_check_and_restart_aneg(phydev, changed);
674 }
675 
m88e1111_config_aneg(struct phy_device * phydev)676 static int m88e1111_config_aneg(struct phy_device *phydev)
677 {
678 	int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR);
679 	int err;
680 
681 	if (extsr < 0)
682 		return extsr;
683 
684 	/* If not using SGMII or copper 1000BaseX modes, use normal process.
685 	 * Steps below are only required for these modes.
686 	 */
687 	if (phydev->interface != PHY_INTERFACE_MODE_SGMII &&
688 	    (extsr & MII_M1111_HWCFG_MODE_MASK) !=
689 	    MII_M1111_HWCFG_MODE_COPPER_1000X_AN)
690 		return marvell_config_aneg(phydev);
691 
692 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
693 	if (err < 0)
694 		goto error;
695 
696 	/* Configure the copper link first */
697 	err = marvell_config_aneg(phydev);
698 	if (err < 0)
699 		goto error;
700 
701 	/* Then the fiber link */
702 	err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
703 	if (err < 0)
704 		goto error;
705 
706 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
707 		/* Do not touch the fiber advertisement if we're in copper->sgmii mode.
708 		 * Just ensure that SGMII-side autonegotiation is enabled.
709 		 * If we switched from some other mode to SGMII it may not be.
710 		 */
711 		err = genphy_check_and_restart_aneg(phydev, false);
712 	else
713 		err = marvell_config_aneg_fiber(phydev);
714 	if (err < 0)
715 		goto error;
716 
717 	return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
718 
719 error:
720 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
721 	return err;
722 }
723 
m88e1510_config_aneg(struct phy_device * phydev)724 static int m88e1510_config_aneg(struct phy_device *phydev)
725 {
726 	int err;
727 
728 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
729 	if (err < 0)
730 		goto error;
731 
732 	/* Configure the copper link first */
733 	err = m88e1318_config_aneg(phydev);
734 	if (err < 0)
735 		goto error;
736 
737 	/* Do not touch the fiber page if we're in copper->sgmii mode */
738 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
739 		return 0;
740 
741 	/* Then the fiber link */
742 	err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
743 	if (err < 0)
744 		goto error;
745 
746 	err = marvell_config_aneg_fiber(phydev);
747 	if (err < 0)
748 		goto error;
749 
750 	return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
751 
752 error:
753 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
754 	return err;
755 }
756 
marvell_config_led(struct phy_device * phydev)757 static void marvell_config_led(struct phy_device *phydev)
758 {
759 	u16 def_config;
760 	int err;
761 
762 	switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) {
763 	/* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
764 	case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R):
765 	case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S):
766 		def_config = MII_88E1121_PHY_LED_DEF;
767 		break;
768 	/* Default PHY LED config:
769 	 * LED[0] .. 1000Mbps Link
770 	 * LED[1] .. 100Mbps Link
771 	 * LED[2] .. Blink, Activity
772 	 */
773 	case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510):
774 		if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE)
775 			def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE;
776 		else
777 			def_config = MII_88E1510_PHY_LED_DEF;
778 		break;
779 	default:
780 		return;
781 	}
782 
783 	err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL,
784 			      def_config);
785 	if (err < 0)
786 		phydev_warn(phydev, "Fail to config marvell phy LED.\n");
787 }
788 
marvell_config_init(struct phy_device * phydev)789 static int marvell_config_init(struct phy_device *phydev)
790 {
791 	/* Set default LED */
792 	marvell_config_led(phydev);
793 
794 	/* Set registers from marvell,reg-init DT property */
795 	return marvell_of_reg_init(phydev);
796 }
797 
m88e3016_config_init(struct phy_device * phydev)798 static int m88e3016_config_init(struct phy_device *phydev)
799 {
800 	int ret;
801 
802 	/* Enable Scrambler and Auto-Crossover */
803 	ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
804 			 MII_88E3016_DISABLE_SCRAMBLER,
805 			 MII_88E3016_AUTO_MDIX_CROSSOVER);
806 	if (ret < 0)
807 		return ret;
808 
809 	return marvell_config_init(phydev);
810 }
811 
m88e1111_config_init_hwcfg_mode(struct phy_device * phydev,u16 mode,int fibre_copper_auto)812 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
813 					   u16 mode,
814 					   int fibre_copper_auto)
815 {
816 	if (fibre_copper_auto)
817 		mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
818 
819 	return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
820 			  MII_M1111_HWCFG_MODE_MASK |
821 			  MII_M1111_HWCFG_FIBER_COPPER_AUTO |
822 			  MII_M1111_HWCFG_FIBER_COPPER_RES,
823 			  mode);
824 }
825 
m88e1111_config_init_rgmii_delays(struct phy_device * phydev)826 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
827 {
828 	int delay;
829 
830 	switch (phydev->interface) {
831 	case PHY_INTERFACE_MODE_RGMII_ID:
832 		delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
833 		break;
834 	case PHY_INTERFACE_MODE_RGMII_RXID:
835 		delay = MII_M1111_RGMII_RX_DELAY;
836 		break;
837 	case PHY_INTERFACE_MODE_RGMII_TXID:
838 		delay = MII_M1111_RGMII_TX_DELAY;
839 		break;
840 	default:
841 		delay = 0;
842 		break;
843 	}
844 
845 	return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
846 			  MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
847 			  delay);
848 }
849 
m88e1111_config_init_rgmii(struct phy_device * phydev)850 static int m88e1111_config_init_rgmii(struct phy_device *phydev)
851 {
852 	int temp;
853 	int err;
854 
855 	err = m88e1111_config_init_rgmii_delays(phydev);
856 	if (err < 0)
857 		return err;
858 
859 	temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
860 	if (temp < 0)
861 		return temp;
862 
863 	temp &= ~(MII_M1111_HWCFG_MODE_MASK);
864 
865 	if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
866 		temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
867 	else
868 		temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
869 
870 	return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
871 }
872 
m88e1111_config_init_sgmii(struct phy_device * phydev)873 static int m88e1111_config_init_sgmii(struct phy_device *phydev)
874 {
875 	int err;
876 
877 	err = m88e1111_config_init_hwcfg_mode(
878 		phydev,
879 		MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
880 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
881 	if (err < 0)
882 		return err;
883 
884 	/* make sure copper is selected */
885 	return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
886 }
887 
m88e1111_config_init_rtbi(struct phy_device * phydev)888 static int m88e1111_config_init_rtbi(struct phy_device *phydev)
889 {
890 	int err;
891 
892 	err = m88e1111_config_init_rgmii_delays(phydev);
893 	if (err < 0)
894 		return err;
895 
896 	err = m88e1111_config_init_hwcfg_mode(
897 		phydev,
898 		MII_M1111_HWCFG_MODE_RTBI,
899 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
900 	if (err < 0)
901 		return err;
902 
903 	/* soft reset */
904 	err = genphy_soft_reset(phydev);
905 	if (err < 0)
906 		return err;
907 
908 	return m88e1111_config_init_hwcfg_mode(
909 		phydev,
910 		MII_M1111_HWCFG_MODE_RTBI,
911 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
912 }
913 
m88e1111_config_init_1000basex(struct phy_device * phydev)914 static int m88e1111_config_init_1000basex(struct phy_device *phydev)
915 {
916 	int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR);
917 	int err, mode;
918 
919 	if (extsr < 0)
920 		return extsr;
921 
922 	/* If using copper mode, ensure 1000BaseX auto-negotiation is enabled */
923 	mode = extsr & MII_M1111_HWCFG_MODE_MASK;
924 	if (mode == MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN) {
925 		err = phy_modify(phydev, MII_M1111_PHY_EXT_SR,
926 				 MII_M1111_HWCFG_MODE_MASK |
927 				 MII_M1111_HWCFG_SERIAL_AN_BYPASS,
928 				 MII_M1111_HWCFG_MODE_COPPER_1000X_AN |
929 				 MII_M1111_HWCFG_SERIAL_AN_BYPASS);
930 		if (err < 0)
931 			return err;
932 	}
933 	return 0;
934 }
935 
m88e1111_config_init(struct phy_device * phydev)936 static int m88e1111_config_init(struct phy_device *phydev)
937 {
938 	int err;
939 
940 	if (phy_interface_is_rgmii(phydev)) {
941 		err = m88e1111_config_init_rgmii(phydev);
942 		if (err < 0)
943 			return err;
944 	}
945 
946 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
947 		err = m88e1111_config_init_sgmii(phydev);
948 		if (err < 0)
949 			return err;
950 	}
951 
952 	if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
953 		err = m88e1111_config_init_rtbi(phydev);
954 		if (err < 0)
955 			return err;
956 	}
957 
958 	if (phydev->interface == PHY_INTERFACE_MODE_1000BASEX) {
959 		err = m88e1111_config_init_1000basex(phydev);
960 		if (err < 0)
961 			return err;
962 	}
963 
964 	err = marvell_of_reg_init(phydev);
965 	if (err < 0)
966 		return err;
967 
968 	err = genphy_soft_reset(phydev);
969 	if (err < 0)
970 		return err;
971 
972 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
973 		/* If the HWCFG_MODE was changed from another mode (such as
974 		 * 1000BaseX) to SGMII, the state of the support bits may have
975 		 * also changed now that the PHY has been reset.
976 		 * Update the PHY abilities accordingly.
977 		 */
978 		err = genphy_read_abilities(phydev);
979 		linkmode_or(phydev->advertising, phydev->advertising,
980 			    phydev->supported);
981 	}
982 	return err;
983 }
984 
m88e1111_get_downshift(struct phy_device * phydev,u8 * data)985 static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data)
986 {
987 	int val, cnt, enable;
988 
989 	val = phy_read(phydev, MII_M1111_PHY_EXT_CR);
990 	if (val < 0)
991 		return val;
992 
993 	enable = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN, val);
994 	cnt = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, val) + 1;
995 
996 	*data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
997 
998 	return 0;
999 }
1000 
m88e1111_set_downshift(struct phy_device * phydev,u8 cnt)1001 static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt)
1002 {
1003 	int val, err;
1004 
1005 	if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX)
1006 		return -E2BIG;
1007 
1008 	if (!cnt) {
1009 		err = phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR,
1010 				     MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN);
1011 	} else {
1012 		val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN;
1013 		val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1);
1014 
1015 		err = phy_modify(phydev, MII_M1111_PHY_EXT_CR,
1016 				 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN |
1017 				 MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK,
1018 				 val);
1019 	}
1020 
1021 	if (err < 0)
1022 		return err;
1023 
1024 	return genphy_soft_reset(phydev);
1025 }
1026 
m88e1111_get_tunable(struct phy_device * phydev,struct ethtool_tunable * tuna,void * data)1027 static int m88e1111_get_tunable(struct phy_device *phydev,
1028 				struct ethtool_tunable *tuna, void *data)
1029 {
1030 	switch (tuna->id) {
1031 	case ETHTOOL_PHY_DOWNSHIFT:
1032 		return m88e1111_get_downshift(phydev, data);
1033 	default:
1034 		return -EOPNOTSUPP;
1035 	}
1036 }
1037 
m88e1111_set_tunable(struct phy_device * phydev,struct ethtool_tunable * tuna,const void * data)1038 static int m88e1111_set_tunable(struct phy_device *phydev,
1039 				struct ethtool_tunable *tuna, const void *data)
1040 {
1041 	switch (tuna->id) {
1042 	case ETHTOOL_PHY_DOWNSHIFT:
1043 		return m88e1111_set_downshift(phydev, *(const u8 *)data);
1044 	default:
1045 		return -EOPNOTSUPP;
1046 	}
1047 }
1048 
m88e1011_get_downshift(struct phy_device * phydev,u8 * data)1049 static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data)
1050 {
1051 	int val, cnt, enable;
1052 
1053 	val = phy_read(phydev, MII_M1011_PHY_SCR);
1054 	if (val < 0)
1055 		return val;
1056 
1057 	enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val);
1058 	cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1;
1059 
1060 	*data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
1061 
1062 	return 0;
1063 }
1064 
m88e1011_set_downshift(struct phy_device * phydev,u8 cnt)1065 static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt)
1066 {
1067 	int val, err;
1068 
1069 	if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX)
1070 		return -E2BIG;
1071 
1072 	if (!cnt) {
1073 		err = phy_clear_bits(phydev, MII_M1011_PHY_SCR,
1074 				     MII_M1011_PHY_SCR_DOWNSHIFT_EN);
1075 	} else {
1076 		val = MII_M1011_PHY_SCR_DOWNSHIFT_EN;
1077 		val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1);
1078 
1079 		err = phy_modify(phydev, MII_M1011_PHY_SCR,
1080 				 MII_M1011_PHY_SCR_DOWNSHIFT_EN |
1081 				 MII_M1011_PHY_SCR_DOWNSHIFT_MASK,
1082 				 val);
1083 	}
1084 
1085 	if (err < 0)
1086 		return err;
1087 
1088 	return genphy_soft_reset(phydev);
1089 }
1090 
m88e1011_get_tunable(struct phy_device * phydev,struct ethtool_tunable * tuna,void * data)1091 static int m88e1011_get_tunable(struct phy_device *phydev,
1092 				struct ethtool_tunable *tuna, void *data)
1093 {
1094 	switch (tuna->id) {
1095 	case ETHTOOL_PHY_DOWNSHIFT:
1096 		return m88e1011_get_downshift(phydev, data);
1097 	default:
1098 		return -EOPNOTSUPP;
1099 	}
1100 }
1101 
m88e1011_set_tunable(struct phy_device * phydev,struct ethtool_tunable * tuna,const void * data)1102 static int m88e1011_set_tunable(struct phy_device *phydev,
1103 				struct ethtool_tunable *tuna, const void *data)
1104 {
1105 	switch (tuna->id) {
1106 	case ETHTOOL_PHY_DOWNSHIFT:
1107 		return m88e1011_set_downshift(phydev, *(const u8 *)data);
1108 	default:
1109 		return -EOPNOTSUPP;
1110 	}
1111 }
1112 
m88e1112_config_init(struct phy_device * phydev)1113 static int m88e1112_config_init(struct phy_device *phydev)
1114 {
1115 	int err;
1116 
1117 	err = m88e1011_set_downshift(phydev, 3);
1118 	if (err < 0)
1119 		return err;
1120 
1121 	return m88e1111_config_init(phydev);
1122 }
1123 
m88e1111gbe_config_init(struct phy_device * phydev)1124 static int m88e1111gbe_config_init(struct phy_device *phydev)
1125 {
1126 	int err;
1127 
1128 	err = m88e1111_set_downshift(phydev, 3);
1129 	if (err < 0)
1130 		return err;
1131 
1132 	return m88e1111_config_init(phydev);
1133 }
1134 
marvell_1011gbe_config_init(struct phy_device * phydev)1135 static int marvell_1011gbe_config_init(struct phy_device *phydev)
1136 {
1137 	int err;
1138 
1139 	err = m88e1011_set_downshift(phydev, 3);
1140 	if (err < 0)
1141 		return err;
1142 
1143 	return marvell_config_init(phydev);
1144 }
m88e1116r_config_init(struct phy_device * phydev)1145 static int m88e1116r_config_init(struct phy_device *phydev)
1146 {
1147 	int err;
1148 
1149 	err = genphy_soft_reset(phydev);
1150 	if (err < 0)
1151 		return err;
1152 
1153 	msleep(500);
1154 
1155 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1156 	if (err < 0)
1157 		return err;
1158 
1159 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
1160 	if (err < 0)
1161 		return err;
1162 
1163 	err = m88e1011_set_downshift(phydev, 8);
1164 	if (err < 0)
1165 		return err;
1166 
1167 	if (phy_interface_is_rgmii(phydev)) {
1168 		err = m88e1121_config_aneg_rgmii_delays(phydev);
1169 		if (err < 0)
1170 			return err;
1171 	}
1172 
1173 	err = genphy_soft_reset(phydev);
1174 	if (err < 0)
1175 		return err;
1176 
1177 	return marvell_config_init(phydev);
1178 }
1179 
m88e1318_config_init(struct phy_device * phydev)1180 static int m88e1318_config_init(struct phy_device *phydev)
1181 {
1182 	if (phy_interrupt_is_valid(phydev)) {
1183 		int err = phy_modify_paged(
1184 			phydev, MII_MARVELL_LED_PAGE,
1185 			MII_88E1318S_PHY_LED_TCR,
1186 			MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1187 			MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1188 			MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1189 		if (err < 0)
1190 			return err;
1191 	}
1192 
1193 	return marvell_config_init(phydev);
1194 }
1195 
m88e1510_config_init(struct phy_device * phydev)1196 static int m88e1510_config_init(struct phy_device *phydev)
1197 {
1198 	static const struct {
1199 		u16 reg17, reg16;
1200 	} errata_vals[] = {
1201 		{ 0x214b, 0x2144 },
1202 		{ 0x0c28, 0x2146 },
1203 		{ 0xb233, 0x214d },
1204 		{ 0xcc0c, 0x2159 },
1205 	};
1206 	int err;
1207 	int i;
1208 
1209 	/* As per Marvell Release Notes - Alaska 88E1510/88E1518/88E1512/
1210 	 * 88E1514 Rev A0, Errata Section 5.1:
1211 	 * If EEE is intended to be used, the following register writes
1212 	 * must be done once after every hardware reset.
1213 	 */
1214 	err = marvell_set_page(phydev, 0x00FF);
1215 	if (err < 0)
1216 		return err;
1217 
1218 	for (i = 0; i < ARRAY_SIZE(errata_vals); ++i) {
1219 		err = phy_write(phydev, 17, errata_vals[i].reg17);
1220 		if (err)
1221 			return err;
1222 		err = phy_write(phydev, 16, errata_vals[i].reg16);
1223 		if (err)
1224 			return err;
1225 	}
1226 
1227 	err = marvell_set_page(phydev, 0x00FB);
1228 	if (err < 0)
1229 		return err;
1230 	err = phy_write(phydev, 07, 0xC00D);
1231 	if (err < 0)
1232 		return err;
1233 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1234 	if (err < 0)
1235 		return err;
1236 
1237 	/* SGMII-to-Copper mode initialization */
1238 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1239 		/* Select page 18 */
1240 		err = marvell_set_page(phydev, 18);
1241 		if (err < 0)
1242 			return err;
1243 
1244 		/* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
1245 		err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
1246 				 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
1247 				 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
1248 		if (err < 0)
1249 			return err;
1250 
1251 		/* PHY reset is necessary after changing MODE[2:0] */
1252 		err = phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
1253 				   MII_88E1510_GEN_CTRL_REG_1_RESET);
1254 		if (err < 0)
1255 			return err;
1256 
1257 		/* Reset page selection */
1258 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1259 		if (err < 0)
1260 			return err;
1261 	}
1262 	err = m88e1011_set_downshift(phydev, 3);
1263 	if (err < 0)
1264 		return err;
1265 
1266 	return m88e1318_config_init(phydev);
1267 }
1268 
m88e1118_config_aneg(struct phy_device * phydev)1269 static int m88e1118_config_aneg(struct phy_device *phydev)
1270 {
1271 	int err;
1272 
1273 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
1274 	if (err < 0)
1275 		return err;
1276 
1277 	err = genphy_config_aneg(phydev);
1278 	if (err < 0)
1279 		return err;
1280 
1281 	return genphy_soft_reset(phydev);
1282 }
1283 
m88e1118_config_init(struct phy_device * phydev)1284 static int m88e1118_config_init(struct phy_device *phydev)
1285 {
1286 	u16 leds;
1287 	int err;
1288 
1289 	/* Enable 1000 Mbit */
1290 	err = phy_write_paged(phydev, MII_MARVELL_MSCR_PAGE,
1291 			      MII_88E1121_PHY_MSCR_REG, 0x1070);
1292 	if (err < 0)
1293 		return err;
1294 
1295 	if (phy_interface_is_rgmii(phydev)) {
1296 		err = m88e1121_config_aneg_rgmii_delays(phydev);
1297 		if (err < 0)
1298 			return err;
1299 	}
1300 
1301 	/* Adjust LED Control */
1302 	if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
1303 		leds = 0x1100;
1304 	else
1305 		leds = 0x021e;
1306 
1307 	err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, 0x10, leds);
1308 	if (err < 0)
1309 		return err;
1310 
1311 	err = marvell_of_reg_init(phydev);
1312 	if (err < 0)
1313 		return err;
1314 
1315 	/* Reset page register */
1316 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1317 	if (err < 0)
1318 		return err;
1319 
1320 	return genphy_soft_reset(phydev);
1321 }
1322 
m88e1149_config_init(struct phy_device * phydev)1323 static int m88e1149_config_init(struct phy_device *phydev)
1324 {
1325 	int err;
1326 
1327 	/* Change address */
1328 	err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
1329 	if (err < 0)
1330 		return err;
1331 
1332 	/* Enable 1000 Mbit */
1333 	err = phy_write(phydev, 0x15, 0x1048);
1334 	if (err < 0)
1335 		return err;
1336 
1337 	err = marvell_of_reg_init(phydev);
1338 	if (err < 0)
1339 		return err;
1340 
1341 	/* Reset address */
1342 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1343 	if (err < 0)
1344 		return err;
1345 
1346 	return genphy_soft_reset(phydev);
1347 }
1348 
m88e1145_config_init_rgmii(struct phy_device * phydev)1349 static int m88e1145_config_init_rgmii(struct phy_device *phydev)
1350 {
1351 	int err;
1352 
1353 	err = m88e1111_config_init_rgmii_delays(phydev);
1354 	if (err < 0)
1355 		return err;
1356 
1357 	if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
1358 		err = phy_write(phydev, 0x1d, 0x0012);
1359 		if (err < 0)
1360 			return err;
1361 
1362 		err = phy_modify(phydev, 0x1e, 0x0fc0,
1363 				 2 << 9 | /* 36 ohm */
1364 				 2 << 6); /* 39 ohm */
1365 		if (err < 0)
1366 			return err;
1367 
1368 		err = phy_write(phydev, 0x1d, 0x3);
1369 		if (err < 0)
1370 			return err;
1371 
1372 		err = phy_write(phydev, 0x1e, 0x8000);
1373 	}
1374 	return err;
1375 }
1376 
m88e1145_config_init_sgmii(struct phy_device * phydev)1377 static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1378 {
1379 	return m88e1111_config_init_hwcfg_mode(
1380 		phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
1381 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
1382 }
1383 
m88e1145_config_init(struct phy_device * phydev)1384 static int m88e1145_config_init(struct phy_device *phydev)
1385 {
1386 	int err;
1387 
1388 	/* Take care of errata E0 & E1 */
1389 	err = phy_write(phydev, 0x1d, 0x001b);
1390 	if (err < 0)
1391 		return err;
1392 
1393 	err = phy_write(phydev, 0x1e, 0x418f);
1394 	if (err < 0)
1395 		return err;
1396 
1397 	err = phy_write(phydev, 0x1d, 0x0016);
1398 	if (err < 0)
1399 		return err;
1400 
1401 	err = phy_write(phydev, 0x1e, 0xa2da);
1402 	if (err < 0)
1403 		return err;
1404 
1405 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
1406 		err = m88e1145_config_init_rgmii(phydev);
1407 		if (err < 0)
1408 			return err;
1409 	}
1410 
1411 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1412 		err = m88e1145_config_init_sgmii(phydev);
1413 		if (err < 0)
1414 			return err;
1415 	}
1416 	err = m88e1111_set_downshift(phydev, 3);
1417 	if (err < 0)
1418 		return err;
1419 
1420 	err = marvell_of_reg_init(phydev);
1421 	if (err < 0)
1422 		return err;
1423 
1424 	return 0;
1425 }
1426 
m88e1540_get_fld(struct phy_device * phydev,u8 * msecs)1427 static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs)
1428 {
1429 	int val;
1430 
1431 	val = phy_read(phydev, MII_88E1540_COPPER_CTRL3);
1432 	if (val < 0)
1433 		return val;
1434 
1435 	if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) {
1436 		*msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF;
1437 		return 0;
1438 	}
1439 
1440 	val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1441 
1442 	switch (val) {
1443 	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS:
1444 		*msecs = 0;
1445 		break;
1446 	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS:
1447 		*msecs = 10;
1448 		break;
1449 	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS:
1450 		*msecs = 20;
1451 		break;
1452 	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS:
1453 		*msecs = 40;
1454 		break;
1455 	default:
1456 		return -EINVAL;
1457 	}
1458 
1459 	return 0;
1460 }
1461 
m88e1540_set_fld(struct phy_device * phydev,const u8 * msecs)1462 static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs)
1463 {
1464 	struct ethtool_eee eee;
1465 	int val, ret;
1466 
1467 	if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF)
1468 		return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3,
1469 				      MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1470 
1471 	/* According to the Marvell data sheet EEE must be disabled for
1472 	 * Fast Link Down detection to work properly
1473 	 */
1474 	ret = genphy_c45_ethtool_get_eee(phydev, &eee);
1475 	if (!ret && eee.eee_enabled) {
1476 		phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n");
1477 		return -EBUSY;
1478 	}
1479 
1480 	if (*msecs <= 5)
1481 		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS;
1482 	else if (*msecs <= 15)
1483 		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS;
1484 	else if (*msecs <= 30)
1485 		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS;
1486 	else
1487 		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS;
1488 
1489 	val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1490 
1491 	ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3,
1492 			 MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1493 	if (ret)
1494 		return ret;
1495 
1496 	return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3,
1497 			    MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1498 }
1499 
m88e1540_get_tunable(struct phy_device * phydev,struct ethtool_tunable * tuna,void * data)1500 static int m88e1540_get_tunable(struct phy_device *phydev,
1501 				struct ethtool_tunable *tuna, void *data)
1502 {
1503 	switch (tuna->id) {
1504 	case ETHTOOL_PHY_FAST_LINK_DOWN:
1505 		return m88e1540_get_fld(phydev, data);
1506 	case ETHTOOL_PHY_DOWNSHIFT:
1507 		return m88e1011_get_downshift(phydev, data);
1508 	default:
1509 		return -EOPNOTSUPP;
1510 	}
1511 }
1512 
m88e1540_set_tunable(struct phy_device * phydev,struct ethtool_tunable * tuna,const void * data)1513 static int m88e1540_set_tunable(struct phy_device *phydev,
1514 				struct ethtool_tunable *tuna, const void *data)
1515 {
1516 	switch (tuna->id) {
1517 	case ETHTOOL_PHY_FAST_LINK_DOWN:
1518 		return m88e1540_set_fld(phydev, data);
1519 	case ETHTOOL_PHY_DOWNSHIFT:
1520 		return m88e1011_set_downshift(phydev, *(const u8 *)data);
1521 	default:
1522 		return -EOPNOTSUPP;
1523 	}
1524 }
1525 
1526 /* The VOD can be out of specification on link up. Poke an
1527  * undocumented register, in an undocumented page, with a magic value
1528  * to fix this.
1529  */
m88e6390_errata(struct phy_device * phydev)1530 static int m88e6390_errata(struct phy_device *phydev)
1531 {
1532 	int err;
1533 
1534 	err = phy_write(phydev, MII_BMCR,
1535 			BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX);
1536 	if (err)
1537 		return err;
1538 
1539 	usleep_range(300, 400);
1540 
1541 	err = phy_write_paged(phydev, 0xf8, 0x08, 0x36);
1542 	if (err)
1543 		return err;
1544 
1545 	return genphy_soft_reset(phydev);
1546 }
1547 
m88e6390_config_aneg(struct phy_device * phydev)1548 static int m88e6390_config_aneg(struct phy_device *phydev)
1549 {
1550 	int err;
1551 
1552 	err = m88e6390_errata(phydev);
1553 	if (err)
1554 		return err;
1555 
1556 	return m88e1510_config_aneg(phydev);
1557 }
1558 
1559 /**
1560  * fiber_lpa_mod_linkmode_lpa_t
1561  * @advertising: the linkmode advertisement settings
1562  * @lpa: value of the MII_LPA register for fiber link
1563  *
1564  * A small helper function that translates MII_LPA bits to linkmode LP
1565  * advertisement settings. Other bits in advertising are left
1566  * unchanged.
1567  */
fiber_lpa_mod_linkmode_lpa_t(unsigned long * advertising,u32 lpa)1568 static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa)
1569 {
1570 	linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
1571 			 advertising, lpa & LPA_1000XHALF);
1572 
1573 	linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
1574 			 advertising, lpa & LPA_1000XFULL);
1575 }
1576 
marvell_read_status_page_an(struct phy_device * phydev,int fiber,int status)1577 static int marvell_read_status_page_an(struct phy_device *phydev,
1578 				       int fiber, int status)
1579 {
1580 	int lpa;
1581 	int err;
1582 
1583 	if (!(status & MII_M1011_PHY_STATUS_RESOLVED)) {
1584 		phydev->link = 0;
1585 		return 0;
1586 	}
1587 
1588 	if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1589 		phydev->duplex = DUPLEX_FULL;
1590 	else
1591 		phydev->duplex = DUPLEX_HALF;
1592 
1593 	switch (status & MII_M1011_PHY_STATUS_SPD_MASK) {
1594 	case MII_M1011_PHY_STATUS_1000:
1595 		phydev->speed = SPEED_1000;
1596 		break;
1597 
1598 	case MII_M1011_PHY_STATUS_100:
1599 		phydev->speed = SPEED_100;
1600 		break;
1601 
1602 	default:
1603 		phydev->speed = SPEED_10;
1604 		break;
1605 	}
1606 
1607 	if (!fiber) {
1608 		err = genphy_read_lpa(phydev);
1609 		if (err < 0)
1610 			return err;
1611 
1612 		phy_resolve_aneg_pause(phydev);
1613 	} else {
1614 		lpa = phy_read(phydev, MII_LPA);
1615 		if (lpa < 0)
1616 			return lpa;
1617 
1618 		/* The fiber link is only 1000M capable */
1619 		fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa);
1620 
1621 		if (phydev->duplex == DUPLEX_FULL) {
1622 			if (!(lpa & LPA_PAUSE_FIBER)) {
1623 				phydev->pause = 0;
1624 				phydev->asym_pause = 0;
1625 			} else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1626 				phydev->pause = 1;
1627 				phydev->asym_pause = 1;
1628 			} else {
1629 				phydev->pause = 1;
1630 				phydev->asym_pause = 0;
1631 			}
1632 		}
1633 	}
1634 
1635 	return 0;
1636 }
1637 
1638 /* marvell_read_status_page
1639  *
1640  * Description:
1641  *   Check the link, then figure out the current state
1642  *   by comparing what we advertise with what the link partner
1643  *   advertises.  Start by checking the gigabit possibilities,
1644  *   then move on to 10/100.
1645  */
marvell_read_status_page(struct phy_device * phydev,int page)1646 static int marvell_read_status_page(struct phy_device *phydev, int page)
1647 {
1648 	int status;
1649 	int fiber;
1650 	int err;
1651 
1652 	status = phy_read(phydev, MII_M1011_PHY_STATUS);
1653 	if (status < 0)
1654 		return status;
1655 
1656 	/* Use the generic register for copper link status,
1657 	 * and the PHY status register for fiber link status.
1658 	 */
1659 	if (page == MII_MARVELL_FIBER_PAGE) {
1660 		phydev->link = !!(status & MII_M1011_PHY_STATUS_LINK);
1661 	} else {
1662 		err = genphy_update_link(phydev);
1663 		if (err)
1664 			return err;
1665 	}
1666 
1667 	if (page == MII_MARVELL_FIBER_PAGE)
1668 		fiber = 1;
1669 	else
1670 		fiber = 0;
1671 
1672 	linkmode_zero(phydev->lp_advertising);
1673 	phydev->pause = 0;
1674 	phydev->asym_pause = 0;
1675 	phydev->speed = SPEED_UNKNOWN;
1676 	phydev->duplex = DUPLEX_UNKNOWN;
1677 	phydev->port = fiber ? PORT_FIBRE : PORT_TP;
1678 
1679 	if (phydev->autoneg == AUTONEG_ENABLE)
1680 		err = marvell_read_status_page_an(phydev, fiber, status);
1681 	else
1682 		err = genphy_read_status_fixed(phydev);
1683 
1684 	return err;
1685 }
1686 
1687 /* marvell_read_status
1688  *
1689  * Some Marvell's phys have two modes: fiber and copper.
1690  * Both need status checked.
1691  * Description:
1692  *   First, check the fiber link and status.
1693  *   If the fiber link is down, check the copper link and status which
1694  *   will be the default value if both link are down.
1695  */
marvell_read_status(struct phy_device * phydev)1696 static int marvell_read_status(struct phy_device *phydev)
1697 {
1698 	int err;
1699 
1700 	/* Check the fiber mode first */
1701 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1702 			      phydev->supported) &&
1703 	    phydev->interface != PHY_INTERFACE_MODE_SGMII) {
1704 		err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1705 		if (err < 0)
1706 			goto error;
1707 
1708 		err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
1709 		if (err < 0)
1710 			goto error;
1711 
1712 		/* If the fiber link is up, it is the selected and
1713 		 * used link. In this case, we need to stay in the
1714 		 * fiber page. Please to be careful about that, avoid
1715 		 * to restore Copper page in other functions which
1716 		 * could break the behaviour for some fiber phy like
1717 		 * 88E1512.
1718 		 */
1719 		if (phydev->link)
1720 			return 0;
1721 
1722 		/* If fiber link is down, check and save copper mode state */
1723 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1724 		if (err < 0)
1725 			goto error;
1726 	}
1727 
1728 	return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
1729 
1730 error:
1731 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1732 	return err;
1733 }
1734 
1735 /* marvell_suspend
1736  *
1737  * Some Marvell's phys have two modes: fiber and copper.
1738  * Both need to be suspended
1739  */
marvell_suspend(struct phy_device * phydev)1740 static int marvell_suspend(struct phy_device *phydev)
1741 {
1742 	int err;
1743 
1744 	/* Suspend the fiber mode first */
1745 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1746 			      phydev->supported)) {
1747 		err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1748 		if (err < 0)
1749 			goto error;
1750 
1751 		/* With the page set, use the generic suspend */
1752 		err = genphy_suspend(phydev);
1753 		if (err < 0)
1754 			goto error;
1755 
1756 		/* Then, the copper link */
1757 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1758 		if (err < 0)
1759 			goto error;
1760 	}
1761 
1762 	/* With the page set, use the generic suspend */
1763 	return genphy_suspend(phydev);
1764 
1765 error:
1766 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1767 	return err;
1768 }
1769 
1770 /* marvell_resume
1771  *
1772  * Some Marvell's phys have two modes: fiber and copper.
1773  * Both need to be resumed
1774  */
marvell_resume(struct phy_device * phydev)1775 static int marvell_resume(struct phy_device *phydev)
1776 {
1777 	int err;
1778 
1779 	/* Resume the fiber mode first */
1780 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1781 			      phydev->supported)) {
1782 		err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1783 		if (err < 0)
1784 			goto error;
1785 
1786 		/* With the page set, use the generic resume */
1787 		err = genphy_resume(phydev);
1788 		if (err < 0)
1789 			goto error;
1790 
1791 		/* Then, the copper link */
1792 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1793 		if (err < 0)
1794 			goto error;
1795 	}
1796 
1797 	/* With the page set, use the generic resume */
1798 	return genphy_resume(phydev);
1799 
1800 error:
1801 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1802 	return err;
1803 }
1804 
marvell_aneg_done(struct phy_device * phydev)1805 static int marvell_aneg_done(struct phy_device *phydev)
1806 {
1807 	int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
1808 
1809 	return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1810 }
1811 
m88e1318_get_wol(struct phy_device * phydev,struct ethtool_wolinfo * wol)1812 static void m88e1318_get_wol(struct phy_device *phydev,
1813 			     struct ethtool_wolinfo *wol)
1814 {
1815 	int ret;
1816 
1817 	wol->supported = WAKE_MAGIC | WAKE_PHY;
1818 	wol->wolopts = 0;
1819 
1820 	ret = phy_read_paged(phydev, MII_MARVELL_WOL_PAGE,
1821 			     MII_88E1318S_PHY_WOL_CTRL);
1822 	if (ret < 0)
1823 		return;
1824 
1825 	if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1826 		wol->wolopts |= WAKE_MAGIC;
1827 
1828 	if (ret & MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE)
1829 		wol->wolopts |= WAKE_PHY;
1830 }
1831 
m88e1318_set_wol(struct phy_device * phydev,struct ethtool_wolinfo * wol)1832 static int m88e1318_set_wol(struct phy_device *phydev,
1833 			    struct ethtool_wolinfo *wol)
1834 {
1835 	int err = 0, oldpage;
1836 
1837 	oldpage = phy_save_page(phydev);
1838 	if (oldpage < 0)
1839 		goto error;
1840 
1841 	if (wol->wolopts & (WAKE_MAGIC | WAKE_PHY)) {
1842 		/* Explicitly switch to page 0x00, just to be sure */
1843 		err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
1844 		if (err < 0)
1845 			goto error;
1846 
1847 		/* If WOL event happened once, the LED[2] interrupt pin
1848 		 * will not be cleared unless we reading the interrupt status
1849 		 * register. If interrupts are in use, the normal interrupt
1850 		 * handling will clear the WOL event. Clear the WOL event
1851 		 * before enabling it if !phy_interrupt_is_valid()
1852 		 */
1853 		if (!phy_interrupt_is_valid(phydev))
1854 			__phy_read(phydev, MII_M1011_IEVENT);
1855 
1856 		/* Enable the WOL interrupt */
1857 		err = __phy_set_bits(phydev, MII_88E1318S_PHY_CSIER,
1858 				     MII_88E1318S_PHY_CSIER_WOL_EIE);
1859 		if (err < 0)
1860 			goto error;
1861 
1862 		err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
1863 		if (err < 0)
1864 			goto error;
1865 
1866 		/* Setup LED[2] as interrupt pin (active low) */
1867 		err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
1868 				   MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1869 				   MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1870 				   MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1871 		if (err < 0)
1872 			goto error;
1873 	}
1874 
1875 	if (wol->wolopts & WAKE_MAGIC) {
1876 		err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1877 		if (err < 0)
1878 			goto error;
1879 
1880 		/* Store the device address for the magic packet */
1881 		err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1882 				((phydev->attached_dev->dev_addr[5] << 8) |
1883 				 phydev->attached_dev->dev_addr[4]));
1884 		if (err < 0)
1885 			goto error;
1886 		err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1887 				((phydev->attached_dev->dev_addr[3] << 8) |
1888 				 phydev->attached_dev->dev_addr[2]));
1889 		if (err < 0)
1890 			goto error;
1891 		err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1892 				((phydev->attached_dev->dev_addr[1] << 8) |
1893 				 phydev->attached_dev->dev_addr[0]));
1894 		if (err < 0)
1895 			goto error;
1896 
1897 		/* Clear WOL status and enable magic packet matching */
1898 		err = __phy_set_bits(phydev, MII_88E1318S_PHY_WOL_CTRL,
1899 				     MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1900 				     MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
1901 		if (err < 0)
1902 			goto error;
1903 	} else {
1904 		err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1905 		if (err < 0)
1906 			goto error;
1907 
1908 		/* Clear WOL status and disable magic packet matching */
1909 		err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
1910 				   MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
1911 				   MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
1912 		if (err < 0)
1913 			goto error;
1914 	}
1915 
1916 	if (wol->wolopts & WAKE_PHY) {
1917 		err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1918 		if (err < 0)
1919 			goto error;
1920 
1921 		/* Clear WOL status and enable link up event */
1922 		err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0,
1923 				   MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1924 				   MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE);
1925 		if (err < 0)
1926 			goto error;
1927 	} else {
1928 		err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1929 		if (err < 0)
1930 			goto error;
1931 
1932 		/* Clear WOL status and disable link up event */
1933 		err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
1934 				   MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE,
1935 				   MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
1936 		if (err < 0)
1937 			goto error;
1938 	}
1939 
1940 error:
1941 	return phy_restore_page(phydev, oldpage, err);
1942 }
1943 
marvell_get_sset_count(struct phy_device * phydev)1944 static int marvell_get_sset_count(struct phy_device *phydev)
1945 {
1946 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1947 			      phydev->supported))
1948 		return ARRAY_SIZE(marvell_hw_stats);
1949 	else
1950 		return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
1951 }
1952 
marvell_get_strings(struct phy_device * phydev,u8 * data)1953 static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1954 {
1955 	int count = marvell_get_sset_count(phydev);
1956 	int i;
1957 
1958 	for (i = 0; i < count; i++) {
1959 		strscpy(data + i * ETH_GSTRING_LEN,
1960 			marvell_hw_stats[i].string, ETH_GSTRING_LEN);
1961 	}
1962 }
1963 
marvell_get_stat(struct phy_device * phydev,int i)1964 static u64 marvell_get_stat(struct phy_device *phydev, int i)
1965 {
1966 	struct marvell_hw_stat stat = marvell_hw_stats[i];
1967 	struct marvell_priv *priv = phydev->priv;
1968 	int val;
1969 	u64 ret;
1970 
1971 	val = phy_read_paged(phydev, stat.page, stat.reg);
1972 	if (val < 0) {
1973 		ret = U64_MAX;
1974 	} else {
1975 		val = val & ((1 << stat.bits) - 1);
1976 		priv->stats[i] += val;
1977 		ret = priv->stats[i];
1978 	}
1979 
1980 	return ret;
1981 }
1982 
marvell_get_stats(struct phy_device * phydev,struct ethtool_stats * stats,u64 * data)1983 static void marvell_get_stats(struct phy_device *phydev,
1984 			      struct ethtool_stats *stats, u64 *data)
1985 {
1986 	int count = marvell_get_sset_count(phydev);
1987 	int i;
1988 
1989 	for (i = 0; i < count; i++)
1990 		data[i] = marvell_get_stat(phydev, i);
1991 }
1992 
m88e1510_loopback(struct phy_device * phydev,bool enable)1993 static int m88e1510_loopback(struct phy_device *phydev, bool enable)
1994 {
1995 	int err;
1996 
1997 	if (enable) {
1998 		u16 bmcr_ctl, mscr2_ctl = 0;
1999 
2000 		bmcr_ctl = mii_bmcr_encode_fixed(phydev->speed, phydev->duplex);
2001 
2002 		err = phy_write(phydev, MII_BMCR, bmcr_ctl);
2003 		if (err < 0)
2004 			return err;
2005 
2006 		if (phydev->speed == SPEED_1000)
2007 			mscr2_ctl = BMCR_SPEED1000;
2008 		else if (phydev->speed == SPEED_100)
2009 			mscr2_ctl = BMCR_SPEED100;
2010 
2011 		err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
2012 				       MII_88E1510_MSCR_2, BMCR_SPEED1000 |
2013 				       BMCR_SPEED100, mscr2_ctl);
2014 		if (err < 0)
2015 			return err;
2016 
2017 		/* Need soft reset to have speed configuration takes effect */
2018 		err = genphy_soft_reset(phydev);
2019 		if (err < 0)
2020 			return err;
2021 
2022 		err = phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK,
2023 				 BMCR_LOOPBACK);
2024 
2025 		if (!err) {
2026 			/* It takes some time for PHY device to switch
2027 			 * into/out-of loopback mode.
2028 			 */
2029 			msleep(1000);
2030 		}
2031 		return err;
2032 	} else {
2033 		err = phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK, 0);
2034 		if (err < 0)
2035 			return err;
2036 
2037 		return phy_config_aneg(phydev);
2038 	}
2039 }
2040 
marvell_vct5_wait_complete(struct phy_device * phydev)2041 static int marvell_vct5_wait_complete(struct phy_device *phydev)
2042 {
2043 	int i;
2044 	int val;
2045 
2046 	for (i = 0; i < 32; i++) {
2047 		val = __phy_read(phydev, MII_VCT5_CTRL);
2048 		if (val < 0)
2049 			return val;
2050 
2051 		if (val & MII_VCT5_CTRL_COMPLETE)
2052 			return 0;
2053 	}
2054 
2055 	phydev_err(phydev, "Timeout while waiting for cable test to finish\n");
2056 	return -ETIMEDOUT;
2057 }
2058 
marvell_vct5_amplitude(struct phy_device * phydev,int pair)2059 static int marvell_vct5_amplitude(struct phy_device *phydev, int pair)
2060 {
2061 	int amplitude;
2062 	int val;
2063 	int reg;
2064 
2065 	reg = MII_VCT5_TX_RX_MDI0_COUPLING + pair;
2066 	val = __phy_read(phydev, reg);
2067 
2068 	if (val < 0)
2069 		return 0;
2070 
2071 	amplitude = (val & MII_VCT5_TX_RX_AMPLITUDE_MASK) >>
2072 		MII_VCT5_TX_RX_AMPLITUDE_SHIFT;
2073 
2074 	if (!(val & MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION))
2075 		amplitude = -amplitude;
2076 
2077 	return 1000 * amplitude / 128;
2078 }
2079 
marvell_vct5_distance2cm(int distance)2080 static u32 marvell_vct5_distance2cm(int distance)
2081 {
2082 	return distance * 805 / 10;
2083 }
2084 
marvell_vct5_cm2distance(int cm)2085 static u32 marvell_vct5_cm2distance(int cm)
2086 {
2087 	return cm * 10 / 805;
2088 }
2089 
marvell_vct5_amplitude_distance(struct phy_device * phydev,int distance,int pair)2090 static int marvell_vct5_amplitude_distance(struct phy_device *phydev,
2091 					   int distance, int pair)
2092 {
2093 	u16 reg;
2094 	int err;
2095 	int mV;
2096 	int i;
2097 
2098 	err = __phy_write(phydev, MII_VCT5_SAMPLE_POINT_DISTANCE,
2099 			  distance);
2100 	if (err)
2101 		return err;
2102 
2103 	reg = MII_VCT5_CTRL_ENABLE |
2104 		MII_VCT5_CTRL_TX_SAME_CHANNEL |
2105 		MII_VCT5_CTRL_SAMPLES_DEFAULT |
2106 		MII_VCT5_CTRL_SAMPLE_POINT |
2107 		MII_VCT5_CTRL_PEEK_HYST_DEFAULT;
2108 	err = __phy_write(phydev, MII_VCT5_CTRL, reg);
2109 	if (err)
2110 		return err;
2111 
2112 	err = marvell_vct5_wait_complete(phydev);
2113 	if (err)
2114 		return err;
2115 
2116 	for (i = 0; i < 4; i++) {
2117 		if (pair != PHY_PAIR_ALL && i != pair)
2118 			continue;
2119 
2120 		mV = marvell_vct5_amplitude(phydev, i);
2121 		ethnl_cable_test_amplitude(phydev, i, mV);
2122 	}
2123 
2124 	return 0;
2125 }
2126 
marvell_vct5_amplitude_graph(struct phy_device * phydev)2127 static int marvell_vct5_amplitude_graph(struct phy_device *phydev)
2128 {
2129 	struct marvell_priv *priv = phydev->priv;
2130 	int distance;
2131 	u16 width;
2132 	int page;
2133 	int err;
2134 	u16 reg;
2135 
2136 	if (priv->first <= TDR_SHORT_CABLE_LENGTH)
2137 		width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS;
2138 	else
2139 		width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
2140 
2141 	reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
2142 		MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
2143 		MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
2144 
2145 	err = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
2146 			      MII_VCT5_TX_PULSE_CTRL, reg);
2147 	if (err)
2148 		return err;
2149 
2150 	/* Reading the TDR data is very MDIO heavy. We need to optimize
2151 	 * access to keep the time to a minimum. So lock the bus once,
2152 	 * and don't release it until complete. We can then avoid having
2153 	 * to change the page for every access, greatly speeding things
2154 	 * up.
2155 	 */
2156 	page = phy_select_page(phydev, MII_MARVELL_VCT5_PAGE);
2157 	if (page < 0)
2158 		goto restore_page;
2159 
2160 	for (distance = priv->first;
2161 	     distance <= priv->last;
2162 	     distance += priv->step) {
2163 		err = marvell_vct5_amplitude_distance(phydev, distance,
2164 						      priv->pair);
2165 		if (err)
2166 			goto restore_page;
2167 
2168 		if (distance > TDR_SHORT_CABLE_LENGTH &&
2169 		    width == MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS) {
2170 			width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
2171 			reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
2172 				MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
2173 				MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
2174 			err = __phy_write(phydev, MII_VCT5_TX_PULSE_CTRL, reg);
2175 			if (err)
2176 				goto restore_page;
2177 		}
2178 	}
2179 
2180 restore_page:
2181 	return phy_restore_page(phydev, page, err);
2182 }
2183 
marvell_cable_test_start_common(struct phy_device * phydev)2184 static int marvell_cable_test_start_common(struct phy_device *phydev)
2185 {
2186 	int bmcr, bmsr, ret;
2187 
2188 	/* If auto-negotiation is enabled, but not complete, the cable
2189 	 * test never completes. So disable auto-neg.
2190 	 */
2191 	bmcr = phy_read(phydev, MII_BMCR);
2192 	if (bmcr < 0)
2193 		return bmcr;
2194 
2195 	bmsr = phy_read(phydev, MII_BMSR);
2196 
2197 	if (bmsr < 0)
2198 		return bmsr;
2199 
2200 	if (bmcr & BMCR_ANENABLE) {
2201 		ret =  phy_clear_bits(phydev, MII_BMCR, BMCR_ANENABLE);
2202 		if (ret < 0)
2203 			return ret;
2204 		ret = genphy_soft_reset(phydev);
2205 		if (ret < 0)
2206 			return ret;
2207 	}
2208 
2209 	/* If the link is up, allow it some time to go down */
2210 	if (bmsr & BMSR_LSTATUS)
2211 		msleep(1500);
2212 
2213 	return 0;
2214 }
2215 
marvell_vct7_cable_test_start(struct phy_device * phydev)2216 static int marvell_vct7_cable_test_start(struct phy_device *phydev)
2217 {
2218 	struct marvell_priv *priv = phydev->priv;
2219 	int ret;
2220 
2221 	ret = marvell_cable_test_start_common(phydev);
2222 	if (ret)
2223 		return ret;
2224 
2225 	priv->cable_test_tdr = false;
2226 
2227 	/* Reset the VCT5 API control to defaults, otherwise
2228 	 * VCT7 does not work correctly.
2229 	 */
2230 	ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
2231 			      MII_VCT5_CTRL,
2232 			      MII_VCT5_CTRL_TX_SAME_CHANNEL |
2233 			      MII_VCT5_CTRL_SAMPLES_DEFAULT |
2234 			      MII_VCT5_CTRL_MODE_MAXIMUM_PEEK |
2235 			      MII_VCT5_CTRL_PEEK_HYST_DEFAULT);
2236 	if (ret)
2237 		return ret;
2238 
2239 	ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
2240 			      MII_VCT5_SAMPLE_POINT_DISTANCE, 0);
2241 	if (ret)
2242 		return ret;
2243 
2244 	return phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
2245 			       MII_VCT7_CTRL,
2246 			       MII_VCT7_CTRL_RUN_NOW |
2247 			       MII_VCT7_CTRL_CENTIMETERS);
2248 }
2249 
marvell_vct5_cable_test_tdr_start(struct phy_device * phydev,const struct phy_tdr_config * cfg)2250 static int marvell_vct5_cable_test_tdr_start(struct phy_device *phydev,
2251 					     const struct phy_tdr_config *cfg)
2252 {
2253 	struct marvell_priv *priv = phydev->priv;
2254 	int ret;
2255 
2256 	priv->cable_test_tdr = true;
2257 	priv->first = marvell_vct5_cm2distance(cfg->first);
2258 	priv->last = marvell_vct5_cm2distance(cfg->last);
2259 	priv->step = marvell_vct5_cm2distance(cfg->step);
2260 	priv->pair = cfg->pair;
2261 
2262 	if (priv->first > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
2263 		return -EINVAL;
2264 
2265 	if (priv->last > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
2266 		return -EINVAL;
2267 
2268 	/* Disable  VCT7 */
2269 	ret = phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
2270 			      MII_VCT7_CTRL, 0);
2271 	if (ret)
2272 		return ret;
2273 
2274 	ret = marvell_cable_test_start_common(phydev);
2275 	if (ret)
2276 		return ret;
2277 
2278 	ret = ethnl_cable_test_pulse(phydev, 1000);
2279 	if (ret)
2280 		return ret;
2281 
2282 	return ethnl_cable_test_step(phydev,
2283 				     marvell_vct5_distance2cm(priv->first),
2284 				     marvell_vct5_distance2cm(priv->last),
2285 				     marvell_vct5_distance2cm(priv->step));
2286 }
2287 
marvell_vct7_distance_to_length(int distance,bool meter)2288 static int marvell_vct7_distance_to_length(int distance, bool meter)
2289 {
2290 	if (meter)
2291 		distance *= 100;
2292 
2293 	return distance;
2294 }
2295 
marvell_vct7_distance_valid(int result)2296 static bool marvell_vct7_distance_valid(int result)
2297 {
2298 	switch (result) {
2299 	case MII_VCT7_RESULTS_OPEN:
2300 	case MII_VCT7_RESULTS_SAME_SHORT:
2301 	case MII_VCT7_RESULTS_CROSS_SHORT:
2302 		return true;
2303 	}
2304 	return false;
2305 }
2306 
marvell_vct7_report_length(struct phy_device * phydev,int pair,bool meter)2307 static int marvell_vct7_report_length(struct phy_device *phydev,
2308 				      int pair, bool meter)
2309 {
2310 	int length;
2311 	int ret;
2312 
2313 	ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2314 			     MII_VCT7_PAIR_0_DISTANCE + pair);
2315 	if (ret < 0)
2316 		return ret;
2317 
2318 	length = marvell_vct7_distance_to_length(ret, meter);
2319 
2320 	ethnl_cable_test_fault_length(phydev, pair, length);
2321 
2322 	return 0;
2323 }
2324 
marvell_vct7_cable_test_report_trans(int result)2325 static int marvell_vct7_cable_test_report_trans(int result)
2326 {
2327 	switch (result) {
2328 	case MII_VCT7_RESULTS_OK:
2329 		return ETHTOOL_A_CABLE_RESULT_CODE_OK;
2330 	case MII_VCT7_RESULTS_OPEN:
2331 		return ETHTOOL_A_CABLE_RESULT_CODE_OPEN;
2332 	case MII_VCT7_RESULTS_SAME_SHORT:
2333 		return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT;
2334 	case MII_VCT7_RESULTS_CROSS_SHORT:
2335 		return ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT;
2336 	default:
2337 		return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC;
2338 	}
2339 }
2340 
marvell_vct7_cable_test_report(struct phy_device * phydev)2341 static int marvell_vct7_cable_test_report(struct phy_device *phydev)
2342 {
2343 	int pair0, pair1, pair2, pair3;
2344 	bool meter;
2345 	int ret;
2346 
2347 	ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2348 			     MII_VCT7_RESULTS);
2349 	if (ret < 0)
2350 		return ret;
2351 
2352 	pair3 = (ret & MII_VCT7_RESULTS_PAIR3_MASK) >>
2353 		MII_VCT7_RESULTS_PAIR3_SHIFT;
2354 	pair2 = (ret & MII_VCT7_RESULTS_PAIR2_MASK) >>
2355 		MII_VCT7_RESULTS_PAIR2_SHIFT;
2356 	pair1 = (ret & MII_VCT7_RESULTS_PAIR1_MASK) >>
2357 		MII_VCT7_RESULTS_PAIR1_SHIFT;
2358 	pair0 = (ret & MII_VCT7_RESULTS_PAIR0_MASK) >>
2359 		MII_VCT7_RESULTS_PAIR0_SHIFT;
2360 
2361 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A,
2362 				marvell_vct7_cable_test_report_trans(pair0));
2363 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_B,
2364 				marvell_vct7_cable_test_report_trans(pair1));
2365 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_C,
2366 				marvell_vct7_cable_test_report_trans(pair2));
2367 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_D,
2368 				marvell_vct7_cable_test_report_trans(pair3));
2369 
2370 	ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, MII_VCT7_CTRL);
2371 	if (ret < 0)
2372 		return ret;
2373 
2374 	meter = ret & MII_VCT7_CTRL_METERS;
2375 
2376 	if (marvell_vct7_distance_valid(pair0))
2377 		marvell_vct7_report_length(phydev, 0, meter);
2378 	if (marvell_vct7_distance_valid(pair1))
2379 		marvell_vct7_report_length(phydev, 1, meter);
2380 	if (marvell_vct7_distance_valid(pair2))
2381 		marvell_vct7_report_length(phydev, 2, meter);
2382 	if (marvell_vct7_distance_valid(pair3))
2383 		marvell_vct7_report_length(phydev, 3, meter);
2384 
2385 	return 0;
2386 }
2387 
marvell_vct7_cable_test_get_status(struct phy_device * phydev,bool * finished)2388 static int marvell_vct7_cable_test_get_status(struct phy_device *phydev,
2389 					      bool *finished)
2390 {
2391 	struct marvell_priv *priv = phydev->priv;
2392 	int ret;
2393 
2394 	if (priv->cable_test_tdr) {
2395 		ret = marvell_vct5_amplitude_graph(phydev);
2396 		*finished = true;
2397 		return ret;
2398 	}
2399 
2400 	*finished = false;
2401 
2402 	ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2403 			     MII_VCT7_CTRL);
2404 
2405 	if (ret < 0)
2406 		return ret;
2407 
2408 	if (!(ret & MII_VCT7_CTRL_IN_PROGRESS)) {
2409 		*finished = true;
2410 
2411 		return marvell_vct7_cable_test_report(phydev);
2412 	}
2413 
2414 	return 0;
2415 }
2416 
2417 #ifdef CONFIG_HWMON
2418 struct marvell_hwmon_ops {
2419 	int (*config)(struct phy_device *phydev);
2420 	int (*get_temp)(struct phy_device *phydev, long *temp);
2421 	int (*get_temp_critical)(struct phy_device *phydev, long *temp);
2422 	int (*set_temp_critical)(struct phy_device *phydev, long temp);
2423 	int (*get_temp_alarm)(struct phy_device *phydev, long *alarm);
2424 };
2425 
2426 static const struct marvell_hwmon_ops *
to_marvell_hwmon_ops(const struct phy_device * phydev)2427 to_marvell_hwmon_ops(const struct phy_device *phydev)
2428 {
2429 	return phydev->drv->driver_data;
2430 }
2431 
m88e1121_get_temp(struct phy_device * phydev,long * temp)2432 static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
2433 {
2434 	int oldpage;
2435 	int ret = 0;
2436 	int val;
2437 
2438 	*temp = 0;
2439 
2440 	oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
2441 	if (oldpage < 0)
2442 		goto error;
2443 
2444 	/* Enable temperature sensor */
2445 	ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
2446 	if (ret < 0)
2447 		goto error;
2448 
2449 	ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
2450 			  ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
2451 	if (ret < 0)
2452 		goto error;
2453 
2454 	/* Wait for temperature to stabilize */
2455 	usleep_range(10000, 12000);
2456 
2457 	val = __phy_read(phydev, MII_88E1121_MISC_TEST);
2458 	if (val < 0) {
2459 		ret = val;
2460 		goto error;
2461 	}
2462 
2463 	/* Disable temperature sensor */
2464 	ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
2465 			  ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
2466 	if (ret < 0)
2467 		goto error;
2468 
2469 	*temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
2470 
2471 error:
2472 	return phy_restore_page(phydev, oldpage, ret);
2473 }
2474 
m88e1510_get_temp(struct phy_device * phydev,long * temp)2475 static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
2476 {
2477 	int ret;
2478 
2479 	*temp = 0;
2480 
2481 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2482 			     MII_88E1510_TEMP_SENSOR);
2483 	if (ret < 0)
2484 		return ret;
2485 
2486 	*temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
2487 
2488 	return 0;
2489 }
2490 
m88e1510_get_temp_critical(struct phy_device * phydev,long * temp)2491 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
2492 {
2493 	int ret;
2494 
2495 	*temp = 0;
2496 
2497 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2498 			     MII_88E1121_MISC_TEST);
2499 	if (ret < 0)
2500 		return ret;
2501 
2502 	*temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
2503 		  MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
2504 	/* convert to mC */
2505 	*temp *= 1000;
2506 
2507 	return 0;
2508 }
2509 
m88e1510_set_temp_critical(struct phy_device * phydev,long temp)2510 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
2511 {
2512 	temp = temp / 1000;
2513 	temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
2514 
2515 	return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2516 				MII_88E1121_MISC_TEST,
2517 				MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
2518 				temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
2519 }
2520 
m88e1510_get_temp_alarm(struct phy_device * phydev,long * alarm)2521 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
2522 {
2523 	int ret;
2524 
2525 	*alarm = false;
2526 
2527 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2528 			     MII_88E1121_MISC_TEST);
2529 	if (ret < 0)
2530 		return ret;
2531 
2532 	*alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
2533 
2534 	return 0;
2535 }
2536 
m88e6390_get_temp(struct phy_device * phydev,long * temp)2537 static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
2538 {
2539 	int sum = 0;
2540 	int oldpage;
2541 	int ret = 0;
2542 	int i;
2543 
2544 	*temp = 0;
2545 
2546 	oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
2547 	if (oldpage < 0)
2548 		goto error;
2549 
2550 	/* Enable temperature sensor */
2551 	ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2552 	if (ret < 0)
2553 		goto error;
2554 
2555 	ret &= ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK;
2556 	ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S;
2557 
2558 	ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2559 	if (ret < 0)
2560 		goto error;
2561 
2562 	/* Wait for temperature to stabilize */
2563 	usleep_range(10000, 12000);
2564 
2565 	/* Reading the temperature sense has an errata. You need to read
2566 	 * a number of times and take an average.
2567 	 */
2568 	for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
2569 		ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
2570 		if (ret < 0)
2571 			goto error;
2572 		sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
2573 	}
2574 
2575 	sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
2576 	*temp = (sum  - 75) * 1000;
2577 
2578 	/* Disable temperature sensor */
2579 	ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2580 	if (ret < 0)
2581 		goto error;
2582 
2583 	ret = ret & ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK;
2584 	ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE;
2585 
2586 	ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2587 
2588 error:
2589 	phy_restore_page(phydev, oldpage, ret);
2590 
2591 	return ret;
2592 }
2593 
m88e6393_get_temp(struct phy_device * phydev,long * temp)2594 static int m88e6393_get_temp(struct phy_device *phydev, long *temp)
2595 {
2596 	int err;
2597 
2598 	err = m88e1510_get_temp(phydev, temp);
2599 
2600 	/* 88E1510 measures T + 25, while the PHY on 88E6393X switch
2601 	 * T + 75, so we have to subtract another 50
2602 	 */
2603 	*temp -= 50000;
2604 
2605 	return err;
2606 }
2607 
m88e6393_get_temp_critical(struct phy_device * phydev,long * temp)2608 static int m88e6393_get_temp_critical(struct phy_device *phydev, long *temp)
2609 {
2610 	int ret;
2611 
2612 	*temp = 0;
2613 
2614 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2615 			     MII_88E6390_TEMP_SENSOR);
2616 	if (ret < 0)
2617 		return ret;
2618 
2619 	*temp = (((ret & MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK) >>
2620 		  MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT) - 75) * 1000;
2621 
2622 	return 0;
2623 }
2624 
m88e6393_set_temp_critical(struct phy_device * phydev,long temp)2625 static int m88e6393_set_temp_critical(struct phy_device *phydev, long temp)
2626 {
2627 	temp = (temp / 1000) + 75;
2628 
2629 	return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2630 				MII_88E6390_TEMP_SENSOR,
2631 				MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK,
2632 				temp << MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT);
2633 }
2634 
m88e6393_hwmon_config(struct phy_device * phydev)2635 static int m88e6393_hwmon_config(struct phy_device *phydev)
2636 {
2637 	int err;
2638 
2639 	err = m88e6393_set_temp_critical(phydev, 100000);
2640 	if (err)
2641 		return err;
2642 
2643 	return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2644 				MII_88E6390_MISC_TEST,
2645 				MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK |
2646 				MII_88E6393_MISC_TEST_SAMPLES_MASK |
2647 				MII_88E6393_MISC_TEST_RATE_MASK,
2648 				MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE |
2649 				MII_88E6393_MISC_TEST_SAMPLES_2048 |
2650 				MII_88E6393_MISC_TEST_RATE_2_3MS);
2651 }
2652 
marvell_hwmon_read(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,long * temp)2653 static int marvell_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
2654 			      u32 attr, int channel, long *temp)
2655 {
2656 	struct phy_device *phydev = dev_get_drvdata(dev);
2657 	const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2658 	int err = -EOPNOTSUPP;
2659 
2660 	switch (attr) {
2661 	case hwmon_temp_input:
2662 		if (ops->get_temp)
2663 			err = ops->get_temp(phydev, temp);
2664 		break;
2665 	case hwmon_temp_crit:
2666 		if (ops->get_temp_critical)
2667 			err = ops->get_temp_critical(phydev, temp);
2668 		break;
2669 	case hwmon_temp_max_alarm:
2670 		if (ops->get_temp_alarm)
2671 			err = ops->get_temp_alarm(phydev, temp);
2672 		break;
2673 	}
2674 
2675 	return err;
2676 }
2677 
marvell_hwmon_write(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,long temp)2678 static int marvell_hwmon_write(struct device *dev, enum hwmon_sensor_types type,
2679 			       u32 attr, int channel, long temp)
2680 {
2681 	struct phy_device *phydev = dev_get_drvdata(dev);
2682 	const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2683 	int err = -EOPNOTSUPP;
2684 
2685 	switch (attr) {
2686 	case hwmon_temp_crit:
2687 		if (ops->set_temp_critical)
2688 			err = ops->set_temp_critical(phydev, temp);
2689 		break;
2690 	}
2691 
2692 	return err;
2693 }
2694 
marvell_hwmon_is_visible(const void * data,enum hwmon_sensor_types type,u32 attr,int channel)2695 static umode_t marvell_hwmon_is_visible(const void *data,
2696 					enum hwmon_sensor_types type,
2697 					u32 attr, int channel)
2698 {
2699 	const struct phy_device *phydev = data;
2700 	const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2701 
2702 	if (type != hwmon_temp)
2703 		return 0;
2704 
2705 	switch (attr) {
2706 	case hwmon_temp_input:
2707 		return ops->get_temp ? 0444 : 0;
2708 	case hwmon_temp_max_alarm:
2709 		return ops->get_temp_alarm ? 0444 : 0;
2710 	case hwmon_temp_crit:
2711 		return (ops->get_temp_critical ? 0444 : 0) |
2712 		       (ops->set_temp_critical ? 0200 : 0);
2713 	default:
2714 		return 0;
2715 	}
2716 }
2717 
2718 static u32 marvell_hwmon_chip_config[] = {
2719 	HWMON_C_REGISTER_TZ,
2720 	0
2721 };
2722 
2723 static const struct hwmon_channel_info marvell_hwmon_chip = {
2724 	.type = hwmon_chip,
2725 	.config = marvell_hwmon_chip_config,
2726 };
2727 
2728 /* we can define HWMON_T_CRIT and HWMON_T_MAX_ALARM even though these are not
2729  * defined for all PHYs, because the hwmon code checks whether the attributes
2730  * exists via the .is_visible method
2731  */
2732 static u32 marvell_hwmon_temp_config[] = {
2733 	HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
2734 	0
2735 };
2736 
2737 static const struct hwmon_channel_info marvell_hwmon_temp = {
2738 	.type = hwmon_temp,
2739 	.config = marvell_hwmon_temp_config,
2740 };
2741 
2742 static const struct hwmon_channel_info * const marvell_hwmon_info[] = {
2743 	&marvell_hwmon_chip,
2744 	&marvell_hwmon_temp,
2745 	NULL
2746 };
2747 
2748 static const struct hwmon_ops marvell_hwmon_hwmon_ops = {
2749 	.is_visible = marvell_hwmon_is_visible,
2750 	.read = marvell_hwmon_read,
2751 	.write = marvell_hwmon_write,
2752 };
2753 
2754 static const struct hwmon_chip_info marvell_hwmon_chip_info = {
2755 	.ops = &marvell_hwmon_hwmon_ops,
2756 	.info = marvell_hwmon_info,
2757 };
2758 
marvell_hwmon_name(struct phy_device * phydev)2759 static int marvell_hwmon_name(struct phy_device *phydev)
2760 {
2761 	struct marvell_priv *priv = phydev->priv;
2762 	struct device *dev = &phydev->mdio.dev;
2763 	const char *devname = dev_name(dev);
2764 	size_t len = strlen(devname);
2765 	int i, j;
2766 
2767 	priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
2768 	if (!priv->hwmon_name)
2769 		return -ENOMEM;
2770 
2771 	for (i = j = 0; i < len && devname[i]; i++) {
2772 		if (isalnum(devname[i]))
2773 			priv->hwmon_name[j++] = devname[i];
2774 	}
2775 
2776 	return 0;
2777 }
2778 
marvell_hwmon_probe(struct phy_device * phydev)2779 static int marvell_hwmon_probe(struct phy_device *phydev)
2780 {
2781 	const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2782 	struct marvell_priv *priv = phydev->priv;
2783 	struct device *dev = &phydev->mdio.dev;
2784 	int err;
2785 
2786 	if (!ops)
2787 		return 0;
2788 
2789 	err = marvell_hwmon_name(phydev);
2790 	if (err)
2791 		return err;
2792 
2793 	priv->hwmon_dev = devm_hwmon_device_register_with_info(
2794 		dev, priv->hwmon_name, phydev, &marvell_hwmon_chip_info, NULL);
2795 	if (IS_ERR(priv->hwmon_dev))
2796 		return PTR_ERR(priv->hwmon_dev);
2797 
2798 	if (ops->config)
2799 		err = ops->config(phydev);
2800 
2801 	return err;
2802 }
2803 
2804 static const struct marvell_hwmon_ops m88e1121_hwmon_ops = {
2805 	.get_temp = m88e1121_get_temp,
2806 };
2807 
2808 static const struct marvell_hwmon_ops m88e1510_hwmon_ops = {
2809 	.get_temp = m88e1510_get_temp,
2810 	.get_temp_critical = m88e1510_get_temp_critical,
2811 	.set_temp_critical = m88e1510_set_temp_critical,
2812 	.get_temp_alarm = m88e1510_get_temp_alarm,
2813 };
2814 
2815 static const struct marvell_hwmon_ops m88e6390_hwmon_ops = {
2816 	.get_temp = m88e6390_get_temp,
2817 };
2818 
2819 static const struct marvell_hwmon_ops m88e6393_hwmon_ops = {
2820 	.config = m88e6393_hwmon_config,
2821 	.get_temp = m88e6393_get_temp,
2822 	.get_temp_critical = m88e6393_get_temp_critical,
2823 	.set_temp_critical = m88e6393_set_temp_critical,
2824 	.get_temp_alarm = m88e1510_get_temp_alarm,
2825 };
2826 
2827 #define DEF_MARVELL_HWMON_OPS(s) (&(s))
2828 
2829 #else
2830 
2831 #define DEF_MARVELL_HWMON_OPS(s) NULL
2832 
marvell_hwmon_probe(struct phy_device * phydev)2833 static int marvell_hwmon_probe(struct phy_device *phydev)
2834 {
2835 	return 0;
2836 }
2837 #endif
2838 
m88e1318_led_brightness_set(struct phy_device * phydev,u8 index,enum led_brightness value)2839 static int m88e1318_led_brightness_set(struct phy_device *phydev,
2840 				       u8 index, enum led_brightness value)
2841 {
2842 	int reg;
2843 
2844 	reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE,
2845 			     MII_88E1318S_PHY_LED_FUNC);
2846 	if (reg < 0)
2847 		return reg;
2848 
2849 	switch (index) {
2850 	case 0:
2851 	case 1:
2852 	case 2:
2853 		reg &= ~(0xf << (4 * index));
2854 		if (value == LED_OFF)
2855 			reg |= MII_88E1318S_PHY_LED_FUNC_OFF << (4 * index);
2856 		else
2857 			reg |= MII_88E1318S_PHY_LED_FUNC_ON << (4 * index);
2858 		break;
2859 	default:
2860 		return -EINVAL;
2861 	}
2862 
2863 	return phy_write_paged(phydev, MII_MARVELL_LED_PAGE,
2864 			       MII_88E1318S_PHY_LED_FUNC, reg);
2865 }
2866 
m88e1318_led_blink_set(struct phy_device * phydev,u8 index,unsigned long * delay_on,unsigned long * delay_off)2867 static int m88e1318_led_blink_set(struct phy_device *phydev, u8 index,
2868 				  unsigned long *delay_on,
2869 				  unsigned long *delay_off)
2870 {
2871 	int reg;
2872 
2873 	reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE,
2874 			     MII_88E1318S_PHY_LED_FUNC);
2875 	if (reg < 0)
2876 		return reg;
2877 
2878 	switch (index) {
2879 	case 0:
2880 	case 1:
2881 	case 2:
2882 		reg &= ~(0xf << (4 * index));
2883 		reg |= MII_88E1318S_PHY_LED_FUNC_BLINK << (4 * index);
2884 		/* Reset default is 84ms */
2885 		*delay_on = 84 / 2;
2886 		*delay_off = 84 / 2;
2887 		break;
2888 	default:
2889 		return -EINVAL;
2890 	}
2891 
2892 	return phy_write_paged(phydev, MII_MARVELL_LED_PAGE,
2893 			       MII_88E1318S_PHY_LED_FUNC, reg);
2894 }
2895 
2896 struct marvell_led_rules {
2897 	int mode;
2898 	unsigned long rules;
2899 };
2900 
2901 static const struct marvell_led_rules marvell_led0[] = {
2902 	{
2903 		.mode = 0,
2904 		.rules = BIT(TRIGGER_NETDEV_LINK),
2905 	},
2906 	{
2907 		.mode = 1,
2908 		.rules = (BIT(TRIGGER_NETDEV_LINK) |
2909 			  BIT(TRIGGER_NETDEV_RX) |
2910 			  BIT(TRIGGER_NETDEV_TX)),
2911 	},
2912 	{
2913 		.mode = 3,
2914 		.rules = (BIT(TRIGGER_NETDEV_RX) |
2915 			  BIT(TRIGGER_NETDEV_TX)),
2916 	},
2917 	{
2918 		.mode = 4,
2919 		.rules = (BIT(TRIGGER_NETDEV_RX) |
2920 			  BIT(TRIGGER_NETDEV_TX)),
2921 	},
2922 	{
2923 		.mode = 5,
2924 		.rules = BIT(TRIGGER_NETDEV_TX),
2925 	},
2926 	{
2927 		.mode = 6,
2928 		.rules = BIT(TRIGGER_NETDEV_LINK),
2929 	},
2930 	{
2931 		.mode = 7,
2932 		.rules = BIT(TRIGGER_NETDEV_LINK_1000),
2933 	},
2934 	{
2935 		.mode = 8,
2936 		.rules = 0,
2937 	},
2938 };
2939 
2940 static const struct marvell_led_rules marvell_led1[] = {
2941 	{
2942 		.mode = 1,
2943 		.rules = (BIT(TRIGGER_NETDEV_LINK) |
2944 			  BIT(TRIGGER_NETDEV_RX) |
2945 			  BIT(TRIGGER_NETDEV_TX)),
2946 	},
2947 	{
2948 		.mode = 2,
2949 		.rules = (BIT(TRIGGER_NETDEV_LINK) |
2950 			  BIT(TRIGGER_NETDEV_RX)),
2951 	},
2952 	{
2953 		.mode = 3,
2954 		.rules = (BIT(TRIGGER_NETDEV_RX) |
2955 			  BIT(TRIGGER_NETDEV_TX)),
2956 	},
2957 	{
2958 		.mode = 4,
2959 		.rules = (BIT(TRIGGER_NETDEV_RX) |
2960 			  BIT(TRIGGER_NETDEV_TX)),
2961 	},
2962 	{
2963 		.mode = 6,
2964 		.rules = (BIT(TRIGGER_NETDEV_LINK_100) |
2965 			  BIT(TRIGGER_NETDEV_LINK_1000)),
2966 	},
2967 	{
2968 		.mode = 7,
2969 		.rules = BIT(TRIGGER_NETDEV_LINK_100),
2970 	},
2971 	{
2972 		.mode = 8,
2973 		.rules = 0,
2974 	},
2975 };
2976 
2977 static const struct marvell_led_rules marvell_led2[] = {
2978 	{
2979 		.mode = 0,
2980 		.rules = BIT(TRIGGER_NETDEV_LINK),
2981 	},
2982 	{
2983 		.mode = 1,
2984 		.rules = (BIT(TRIGGER_NETDEV_LINK) |
2985 			  BIT(TRIGGER_NETDEV_RX) |
2986 			  BIT(TRIGGER_NETDEV_TX)),
2987 	},
2988 	{
2989 		.mode = 3,
2990 		.rules = (BIT(TRIGGER_NETDEV_RX) |
2991 			  BIT(TRIGGER_NETDEV_TX)),
2992 	},
2993 	{
2994 		.mode = 4,
2995 		.rules = (BIT(TRIGGER_NETDEV_RX) |
2996 			  BIT(TRIGGER_NETDEV_TX)),
2997 	},
2998 	{
2999 		.mode = 5,
3000 		.rules = BIT(TRIGGER_NETDEV_TX),
3001 	},
3002 	{
3003 		.mode = 6,
3004 		.rules = (BIT(TRIGGER_NETDEV_LINK_10) |
3005 			  BIT(TRIGGER_NETDEV_LINK_1000)),
3006 	},
3007 	{
3008 		.mode = 7,
3009 		.rules = BIT(TRIGGER_NETDEV_LINK_10),
3010 	},
3011 	{
3012 		.mode = 8,
3013 		.rules = 0,
3014 	},
3015 };
3016 
marvell_find_led_mode(unsigned long rules,const struct marvell_led_rules * marvell_rules,int count,int * mode)3017 static int marvell_find_led_mode(unsigned long rules,
3018 				 const struct marvell_led_rules *marvell_rules,
3019 				 int count,
3020 				 int *mode)
3021 {
3022 	int i;
3023 
3024 	for (i = 0; i < count; i++) {
3025 		if (marvell_rules[i].rules == rules) {
3026 			*mode = marvell_rules[i].mode;
3027 			return 0;
3028 		}
3029 	}
3030 	return -EOPNOTSUPP;
3031 }
3032 
marvell_get_led_mode(u8 index,unsigned long rules,int * mode)3033 static int marvell_get_led_mode(u8 index, unsigned long rules, int *mode)
3034 {
3035 	int ret;
3036 
3037 	switch (index) {
3038 	case 0:
3039 		ret = marvell_find_led_mode(rules, marvell_led0,
3040 					    ARRAY_SIZE(marvell_led0), mode);
3041 		break;
3042 	case 1:
3043 		ret = marvell_find_led_mode(rules, marvell_led1,
3044 					    ARRAY_SIZE(marvell_led1), mode);
3045 		break;
3046 	case 2:
3047 		ret = marvell_find_led_mode(rules, marvell_led2,
3048 					    ARRAY_SIZE(marvell_led2), mode);
3049 		break;
3050 	default:
3051 		ret = -EINVAL;
3052 	}
3053 
3054 	return ret;
3055 }
3056 
marvell_find_led_rules(unsigned long * rules,const struct marvell_led_rules * marvell_rules,int count,int mode)3057 static int marvell_find_led_rules(unsigned long *rules,
3058 				  const struct marvell_led_rules *marvell_rules,
3059 				  int count,
3060 				  int mode)
3061 {
3062 	int i;
3063 
3064 	for (i = 0; i < count; i++) {
3065 		if (marvell_rules[i].mode == mode) {
3066 			*rules = marvell_rules[i].rules;
3067 			return 0;
3068 		}
3069 	}
3070 	return -EOPNOTSUPP;
3071 }
3072 
marvell_get_led_rules(u8 index,unsigned long * rules,int mode)3073 static int marvell_get_led_rules(u8 index, unsigned long *rules, int mode)
3074 {
3075 	int ret;
3076 
3077 	switch (index) {
3078 	case 0:
3079 		ret = marvell_find_led_rules(rules, marvell_led0,
3080 					     ARRAY_SIZE(marvell_led0), mode);
3081 		break;
3082 	case 1:
3083 		ret = marvell_find_led_rules(rules, marvell_led1,
3084 					     ARRAY_SIZE(marvell_led1), mode);
3085 		break;
3086 	case 2:
3087 		ret = marvell_find_led_rules(rules, marvell_led2,
3088 					     ARRAY_SIZE(marvell_led2), mode);
3089 		break;
3090 	default:
3091 		ret = -EOPNOTSUPP;
3092 	}
3093 
3094 	return ret;
3095 }
3096 
m88e1318_led_hw_is_supported(struct phy_device * phydev,u8 index,unsigned long rules)3097 static int m88e1318_led_hw_is_supported(struct phy_device *phydev, u8 index,
3098 					unsigned long rules)
3099 {
3100 	int mode, ret;
3101 
3102 	switch (index) {
3103 	case 0:
3104 	case 1:
3105 	case 2:
3106 		ret = marvell_get_led_mode(index, rules, &mode);
3107 		break;
3108 	default:
3109 		ret = -EINVAL;
3110 	}
3111 
3112 	return ret;
3113 }
3114 
m88e1318_led_hw_control_set(struct phy_device * phydev,u8 index,unsigned long rules)3115 static int m88e1318_led_hw_control_set(struct phy_device *phydev, u8 index,
3116 				       unsigned long rules)
3117 {
3118 	int mode, ret, reg;
3119 
3120 	switch (index) {
3121 	case 0:
3122 	case 1:
3123 	case 2:
3124 		ret = marvell_get_led_mode(index, rules, &mode);
3125 		break;
3126 	default:
3127 		ret = -EINVAL;
3128 	}
3129 
3130 	if (ret < 0)
3131 		return ret;
3132 
3133 	reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE,
3134 			     MII_88E1318S_PHY_LED_FUNC);
3135 	if (reg < 0)
3136 		return reg;
3137 
3138 	reg &= ~(0xf << (4 * index));
3139 	reg |= mode << (4 * index);
3140 	return phy_write_paged(phydev, MII_MARVELL_LED_PAGE,
3141 			       MII_88E1318S_PHY_LED_FUNC, reg);
3142 }
3143 
m88e1318_led_hw_control_get(struct phy_device * phydev,u8 index,unsigned long * rules)3144 static int m88e1318_led_hw_control_get(struct phy_device *phydev, u8 index,
3145 				       unsigned long *rules)
3146 {
3147 	int mode, reg;
3148 
3149 	if (index > 2)
3150 		return -EINVAL;
3151 
3152 	reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE,
3153 			     MII_88E1318S_PHY_LED_FUNC);
3154 	if (reg < 0)
3155 		return reg;
3156 
3157 	mode = (reg >> (4 * index)) & 0xf;
3158 
3159 	return marvell_get_led_rules(index, rules, mode);
3160 }
3161 
marvell_probe(struct phy_device * phydev)3162 static int marvell_probe(struct phy_device *phydev)
3163 {
3164 	struct marvell_priv *priv;
3165 
3166 	priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
3167 	if (!priv)
3168 		return -ENOMEM;
3169 
3170 	phydev->priv = priv;
3171 
3172 	return marvell_hwmon_probe(phydev);
3173 }
3174 
m88e1510_sfp_insert(void * upstream,const struct sfp_eeprom_id * id)3175 static int m88e1510_sfp_insert(void *upstream, const struct sfp_eeprom_id *id)
3176 {
3177 	DECLARE_PHY_INTERFACE_MASK(interfaces);
3178 	struct phy_device *phydev = upstream;
3179 	phy_interface_t interface;
3180 	struct device *dev;
3181 	int oldpage;
3182 	int ret = 0;
3183 	u16 mode;
3184 
3185 	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported) = { 0, };
3186 
3187 	dev = &phydev->mdio.dev;
3188 
3189 	sfp_parse_support(phydev->sfp_bus, id, supported, interfaces);
3190 	interface = sfp_select_interface(phydev->sfp_bus, supported);
3191 
3192 	dev_info(dev, "%s SFP module inserted\n", phy_modes(interface));
3193 
3194 	switch (interface) {
3195 	case PHY_INTERFACE_MODE_1000BASEX:
3196 		mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_1000X;
3197 
3198 		break;
3199 	case PHY_INTERFACE_MODE_100BASEX:
3200 		mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_100FX;
3201 
3202 		break;
3203 	case PHY_INTERFACE_MODE_SGMII:
3204 		mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII;
3205 
3206 		break;
3207 	default:
3208 		dev_err(dev, "Incompatible SFP module inserted\n");
3209 
3210 		return -EINVAL;
3211 	}
3212 
3213 	oldpage = phy_select_page(phydev, MII_MARVELL_MODE_PAGE);
3214 	if (oldpage < 0)
3215 		goto error;
3216 
3217 	ret = __phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
3218 			   MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, mode);
3219 	if (ret < 0)
3220 		goto error;
3221 
3222 	ret = __phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
3223 			     MII_88E1510_GEN_CTRL_REG_1_RESET);
3224 
3225 error:
3226 	return phy_restore_page(phydev, oldpage, ret);
3227 }
3228 
m88e1510_sfp_remove(void * upstream)3229 static void m88e1510_sfp_remove(void *upstream)
3230 {
3231 	struct phy_device *phydev = upstream;
3232 	int oldpage;
3233 	int ret = 0;
3234 
3235 	oldpage = phy_select_page(phydev, MII_MARVELL_MODE_PAGE);
3236 	if (oldpage < 0)
3237 		goto error;
3238 
3239 	ret = __phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
3240 			   MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
3241 			   MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII);
3242 	if (ret < 0)
3243 		goto error;
3244 
3245 	ret = __phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
3246 			     MII_88E1510_GEN_CTRL_REG_1_RESET);
3247 
3248 error:
3249 	phy_restore_page(phydev, oldpage, ret);
3250 }
3251 
3252 static const struct sfp_upstream_ops m88e1510_sfp_ops = {
3253 	.module_insert = m88e1510_sfp_insert,
3254 	.module_remove = m88e1510_sfp_remove,
3255 	.attach = phy_sfp_attach,
3256 	.detach = phy_sfp_detach,
3257 };
3258 
m88e1510_probe(struct phy_device * phydev)3259 static int m88e1510_probe(struct phy_device *phydev)
3260 {
3261 	int err;
3262 
3263 	err = marvell_probe(phydev);
3264 	if (err)
3265 		return err;
3266 
3267 	return phy_sfp_probe(phydev, &m88e1510_sfp_ops);
3268 }
3269 
3270 static struct phy_driver marvell_drivers[] = {
3271 	{
3272 		.phy_id = MARVELL_PHY_ID_88E1101,
3273 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3274 		.name = "Marvell 88E1101",
3275 		/* PHY_GBIT_FEATURES */
3276 		.probe = marvell_probe,
3277 		.config_init = marvell_config_init,
3278 		.config_aneg = m88e1101_config_aneg,
3279 		.config_intr = marvell_config_intr,
3280 		.handle_interrupt = marvell_handle_interrupt,
3281 		.resume = genphy_resume,
3282 		.suspend = genphy_suspend,
3283 		.read_page = marvell_read_page,
3284 		.write_page = marvell_write_page,
3285 		.get_sset_count = marvell_get_sset_count,
3286 		.get_strings = marvell_get_strings,
3287 		.get_stats = marvell_get_stats,
3288 	},
3289 	{
3290 		.phy_id = MARVELL_PHY_ID_88E1112,
3291 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3292 		.name = "Marvell 88E1112",
3293 		/* PHY_GBIT_FEATURES */
3294 		.probe = marvell_probe,
3295 		.config_init = m88e1112_config_init,
3296 		.config_aneg = marvell_config_aneg,
3297 		.config_intr = marvell_config_intr,
3298 		.handle_interrupt = marvell_handle_interrupt,
3299 		.resume = genphy_resume,
3300 		.suspend = genphy_suspend,
3301 		.read_page = marvell_read_page,
3302 		.write_page = marvell_write_page,
3303 		.get_sset_count = marvell_get_sset_count,
3304 		.get_strings = marvell_get_strings,
3305 		.get_stats = marvell_get_stats,
3306 		.get_tunable = m88e1011_get_tunable,
3307 		.set_tunable = m88e1011_set_tunable,
3308 	},
3309 	{
3310 		.phy_id = MARVELL_PHY_ID_88E1111,
3311 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3312 		.name = "Marvell 88E1111",
3313 		/* PHY_GBIT_FEATURES */
3314 		.probe = marvell_probe,
3315 		.config_init = m88e1111gbe_config_init,
3316 		.config_aneg = m88e1111_config_aneg,
3317 		.read_status = marvell_read_status,
3318 		.config_intr = marvell_config_intr,
3319 		.handle_interrupt = marvell_handle_interrupt,
3320 		.resume = genphy_resume,
3321 		.suspend = genphy_suspend,
3322 		.read_page = marvell_read_page,
3323 		.write_page = marvell_write_page,
3324 		.get_sset_count = marvell_get_sset_count,
3325 		.get_strings = marvell_get_strings,
3326 		.get_stats = marvell_get_stats,
3327 		.get_tunable = m88e1111_get_tunable,
3328 		.set_tunable = m88e1111_set_tunable,
3329 	},
3330 	{
3331 		.phy_id = MARVELL_PHY_ID_88E1111_FINISAR,
3332 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3333 		.name = "Marvell 88E1111 (Finisar)",
3334 		/* PHY_GBIT_FEATURES */
3335 		.probe = marvell_probe,
3336 		.config_init = m88e1111gbe_config_init,
3337 		.config_aneg = m88e1111_config_aneg,
3338 		.read_status = marvell_read_status,
3339 		.config_intr = marvell_config_intr,
3340 		.handle_interrupt = marvell_handle_interrupt,
3341 		.resume = genphy_resume,
3342 		.suspend = genphy_suspend,
3343 		.read_page = marvell_read_page,
3344 		.write_page = marvell_write_page,
3345 		.get_sset_count = marvell_get_sset_count,
3346 		.get_strings = marvell_get_strings,
3347 		.get_stats = marvell_get_stats,
3348 		.get_tunable = m88e1111_get_tunable,
3349 		.set_tunable = m88e1111_set_tunable,
3350 	},
3351 	{
3352 		.phy_id = MARVELL_PHY_ID_88E1118,
3353 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3354 		.name = "Marvell 88E1118",
3355 		/* PHY_GBIT_FEATURES */
3356 		.probe = marvell_probe,
3357 		.config_init = m88e1118_config_init,
3358 		.config_aneg = m88e1118_config_aneg,
3359 		.config_intr = marvell_config_intr,
3360 		.handle_interrupt = marvell_handle_interrupt,
3361 		.resume = genphy_resume,
3362 		.suspend = genphy_suspend,
3363 		.read_page = marvell_read_page,
3364 		.write_page = marvell_write_page,
3365 		.get_sset_count = marvell_get_sset_count,
3366 		.get_strings = marvell_get_strings,
3367 		.get_stats = marvell_get_stats,
3368 	},
3369 	{
3370 		.phy_id = MARVELL_PHY_ID_88E1121R,
3371 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3372 		.name = "Marvell 88E1121R",
3373 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1121_hwmon_ops),
3374 		/* PHY_GBIT_FEATURES */
3375 		.probe = marvell_probe,
3376 		.config_init = marvell_1011gbe_config_init,
3377 		.config_aneg = m88e1121_config_aneg,
3378 		.read_status = marvell_read_status,
3379 		.config_intr = marvell_config_intr,
3380 		.handle_interrupt = marvell_handle_interrupt,
3381 		.resume = genphy_resume,
3382 		.suspend = genphy_suspend,
3383 		.read_page = marvell_read_page,
3384 		.write_page = marvell_write_page,
3385 		.get_sset_count = marvell_get_sset_count,
3386 		.get_strings = marvell_get_strings,
3387 		.get_stats = marvell_get_stats,
3388 		.get_tunable = m88e1011_get_tunable,
3389 		.set_tunable = m88e1011_set_tunable,
3390 	},
3391 	{
3392 		.phy_id = MARVELL_PHY_ID_88E1318S,
3393 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3394 		.name = "Marvell 88E1318S",
3395 		/* PHY_GBIT_FEATURES */
3396 		.probe = marvell_probe,
3397 		.config_init = m88e1318_config_init,
3398 		.config_aneg = m88e1318_config_aneg,
3399 		.read_status = marvell_read_status,
3400 		.config_intr = marvell_config_intr,
3401 		.handle_interrupt = marvell_handle_interrupt,
3402 		.get_wol = m88e1318_get_wol,
3403 		.set_wol = m88e1318_set_wol,
3404 		.resume = genphy_resume,
3405 		.suspend = genphy_suspend,
3406 		.read_page = marvell_read_page,
3407 		.write_page = marvell_write_page,
3408 		.get_sset_count = marvell_get_sset_count,
3409 		.get_strings = marvell_get_strings,
3410 		.get_stats = marvell_get_stats,
3411 		.led_brightness_set = m88e1318_led_brightness_set,
3412 		.led_blink_set = m88e1318_led_blink_set,
3413 		.led_hw_is_supported = m88e1318_led_hw_is_supported,
3414 		.led_hw_control_set = m88e1318_led_hw_control_set,
3415 		.led_hw_control_get = m88e1318_led_hw_control_get,
3416 	},
3417 	{
3418 		.phy_id = MARVELL_PHY_ID_88E1145,
3419 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3420 		.name = "Marvell 88E1145",
3421 		/* PHY_GBIT_FEATURES */
3422 		.probe = marvell_probe,
3423 		.config_init = m88e1145_config_init,
3424 		.config_aneg = m88e1101_config_aneg,
3425 		.config_intr = marvell_config_intr,
3426 		.handle_interrupt = marvell_handle_interrupt,
3427 		.resume = genphy_resume,
3428 		.suspend = genphy_suspend,
3429 		.read_page = marvell_read_page,
3430 		.write_page = marvell_write_page,
3431 		.get_sset_count = marvell_get_sset_count,
3432 		.get_strings = marvell_get_strings,
3433 		.get_stats = marvell_get_stats,
3434 		.get_tunable = m88e1111_get_tunable,
3435 		.set_tunable = m88e1111_set_tunable,
3436 	},
3437 	{
3438 		.phy_id = MARVELL_PHY_ID_88E1149R,
3439 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3440 		.name = "Marvell 88E1149R",
3441 		/* PHY_GBIT_FEATURES */
3442 		.probe = marvell_probe,
3443 		.config_init = m88e1149_config_init,
3444 		.config_aneg = m88e1118_config_aneg,
3445 		.config_intr = marvell_config_intr,
3446 		.handle_interrupt = marvell_handle_interrupt,
3447 		.resume = genphy_resume,
3448 		.suspend = genphy_suspend,
3449 		.read_page = marvell_read_page,
3450 		.write_page = marvell_write_page,
3451 		.get_sset_count = marvell_get_sset_count,
3452 		.get_strings = marvell_get_strings,
3453 		.get_stats = marvell_get_stats,
3454 	},
3455 	{
3456 		.phy_id = MARVELL_PHY_ID_88E1240,
3457 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3458 		.name = "Marvell 88E1240",
3459 		/* PHY_GBIT_FEATURES */
3460 		.probe = marvell_probe,
3461 		.config_init = m88e1112_config_init,
3462 		.config_aneg = marvell_config_aneg,
3463 		.config_intr = marvell_config_intr,
3464 		.handle_interrupt = marvell_handle_interrupt,
3465 		.resume = genphy_resume,
3466 		.suspend = genphy_suspend,
3467 		.read_page = marvell_read_page,
3468 		.write_page = marvell_write_page,
3469 		.get_sset_count = marvell_get_sset_count,
3470 		.get_strings = marvell_get_strings,
3471 		.get_stats = marvell_get_stats,
3472 		.get_tunable = m88e1011_get_tunable,
3473 		.set_tunable = m88e1011_set_tunable,
3474 	},
3475 	{
3476 		.phy_id = MARVELL_PHY_ID_88E1116R,
3477 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3478 		.name = "Marvell 88E1116R",
3479 		/* PHY_GBIT_FEATURES */
3480 		.probe = marvell_probe,
3481 		.config_init = m88e1116r_config_init,
3482 		.config_intr = marvell_config_intr,
3483 		.handle_interrupt = marvell_handle_interrupt,
3484 		.resume = genphy_resume,
3485 		.suspend = genphy_suspend,
3486 		.read_page = marvell_read_page,
3487 		.write_page = marvell_write_page,
3488 		.get_sset_count = marvell_get_sset_count,
3489 		.get_strings = marvell_get_strings,
3490 		.get_stats = marvell_get_stats,
3491 		.get_tunable = m88e1011_get_tunable,
3492 		.set_tunable = m88e1011_set_tunable,
3493 	},
3494 	{
3495 		.phy_id = MARVELL_PHY_ID_88E1510,
3496 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3497 		.name = "Marvell 88E1510",
3498 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3499 		.features = PHY_GBIT_FIBRE_FEATURES,
3500 		.flags = PHY_POLL_CABLE_TEST,
3501 		.probe = m88e1510_probe,
3502 		.config_init = m88e1510_config_init,
3503 		.config_aneg = m88e1510_config_aneg,
3504 		.read_status = marvell_read_status,
3505 		.config_intr = marvell_config_intr,
3506 		.handle_interrupt = marvell_handle_interrupt,
3507 		.get_wol = m88e1318_get_wol,
3508 		.set_wol = m88e1318_set_wol,
3509 		.resume = marvell_resume,
3510 		.suspend = marvell_suspend,
3511 		.read_page = marvell_read_page,
3512 		.write_page = marvell_write_page,
3513 		.get_sset_count = marvell_get_sset_count,
3514 		.get_strings = marvell_get_strings,
3515 		.get_stats = marvell_get_stats,
3516 		.set_loopback = m88e1510_loopback,
3517 		.get_tunable = m88e1011_get_tunable,
3518 		.set_tunable = m88e1011_set_tunable,
3519 		.cable_test_start = marvell_vct7_cable_test_start,
3520 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3521 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
3522 		.led_brightness_set = m88e1318_led_brightness_set,
3523 		.led_blink_set = m88e1318_led_blink_set,
3524 		.led_hw_is_supported = m88e1318_led_hw_is_supported,
3525 		.led_hw_control_set = m88e1318_led_hw_control_set,
3526 		.led_hw_control_get = m88e1318_led_hw_control_get,
3527 	},
3528 	{
3529 		.phy_id = MARVELL_PHY_ID_88E1540,
3530 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3531 		.name = "Marvell 88E1540",
3532 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3533 		/* PHY_GBIT_FEATURES */
3534 		.flags = PHY_POLL_CABLE_TEST,
3535 		.probe = marvell_probe,
3536 		.config_init = marvell_1011gbe_config_init,
3537 		.config_aneg = m88e1510_config_aneg,
3538 		.read_status = marvell_read_status,
3539 		.config_intr = marvell_config_intr,
3540 		.handle_interrupt = marvell_handle_interrupt,
3541 		.resume = genphy_resume,
3542 		.suspend = genphy_suspend,
3543 		.read_page = marvell_read_page,
3544 		.write_page = marvell_write_page,
3545 		.get_sset_count = marvell_get_sset_count,
3546 		.get_strings = marvell_get_strings,
3547 		.get_stats = marvell_get_stats,
3548 		.get_tunable = m88e1540_get_tunable,
3549 		.set_tunable = m88e1540_set_tunable,
3550 		.cable_test_start = marvell_vct7_cable_test_start,
3551 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3552 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
3553 		.led_brightness_set = m88e1318_led_brightness_set,
3554 		.led_blink_set = m88e1318_led_blink_set,
3555 		.led_hw_is_supported = m88e1318_led_hw_is_supported,
3556 		.led_hw_control_set = m88e1318_led_hw_control_set,
3557 		.led_hw_control_get = m88e1318_led_hw_control_get,
3558 	},
3559 	{
3560 		.phy_id = MARVELL_PHY_ID_88E1545,
3561 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3562 		.name = "Marvell 88E1545",
3563 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3564 		.probe = marvell_probe,
3565 		/* PHY_GBIT_FEATURES */
3566 		.flags = PHY_POLL_CABLE_TEST,
3567 		.config_init = marvell_1011gbe_config_init,
3568 		.config_aneg = m88e1510_config_aneg,
3569 		.read_status = marvell_read_status,
3570 		.config_intr = marvell_config_intr,
3571 		.handle_interrupt = marvell_handle_interrupt,
3572 		.resume = genphy_resume,
3573 		.suspend = genphy_suspend,
3574 		.read_page = marvell_read_page,
3575 		.write_page = marvell_write_page,
3576 		.get_sset_count = marvell_get_sset_count,
3577 		.get_strings = marvell_get_strings,
3578 		.get_stats = marvell_get_stats,
3579 		.get_tunable = m88e1540_get_tunable,
3580 		.set_tunable = m88e1540_set_tunable,
3581 		.cable_test_start = marvell_vct7_cable_test_start,
3582 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3583 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
3584 		.led_brightness_set = m88e1318_led_brightness_set,
3585 		.led_blink_set = m88e1318_led_blink_set,
3586 		.led_hw_is_supported = m88e1318_led_hw_is_supported,
3587 		.led_hw_control_set = m88e1318_led_hw_control_set,
3588 		.led_hw_control_get = m88e1318_led_hw_control_get,
3589 	},
3590 	{
3591 		.phy_id = MARVELL_PHY_ID_88E3016,
3592 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3593 		.name = "Marvell 88E3016",
3594 		/* PHY_BASIC_FEATURES */
3595 		.probe = marvell_probe,
3596 		.config_init = m88e3016_config_init,
3597 		.aneg_done = marvell_aneg_done,
3598 		.read_status = marvell_read_status,
3599 		.config_intr = marvell_config_intr,
3600 		.handle_interrupt = marvell_handle_interrupt,
3601 		.resume = genphy_resume,
3602 		.suspend = genphy_suspend,
3603 		.read_page = marvell_read_page,
3604 		.write_page = marvell_write_page,
3605 		.get_sset_count = marvell_get_sset_count,
3606 		.get_strings = marvell_get_strings,
3607 		.get_stats = marvell_get_stats,
3608 	},
3609 	{
3610 		.phy_id = MARVELL_PHY_ID_88E6341_FAMILY,
3611 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3612 		.name = "Marvell 88E6341 Family",
3613 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3614 		/* PHY_GBIT_FEATURES */
3615 		.flags = PHY_POLL_CABLE_TEST,
3616 		.probe = marvell_probe,
3617 		.config_init = marvell_1011gbe_config_init,
3618 		.config_aneg = m88e6390_config_aneg,
3619 		.read_status = marvell_read_status,
3620 		.config_intr = marvell_config_intr,
3621 		.handle_interrupt = marvell_handle_interrupt,
3622 		.resume = genphy_resume,
3623 		.suspend = genphy_suspend,
3624 		.read_page = marvell_read_page,
3625 		.write_page = marvell_write_page,
3626 		.get_sset_count = marvell_get_sset_count,
3627 		.get_strings = marvell_get_strings,
3628 		.get_stats = marvell_get_stats,
3629 		.get_tunable = m88e1540_get_tunable,
3630 		.set_tunable = m88e1540_set_tunable,
3631 		.cable_test_start = marvell_vct7_cable_test_start,
3632 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3633 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
3634 	},
3635 	{
3636 		.phy_id = MARVELL_PHY_ID_88E6390_FAMILY,
3637 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3638 		.name = "Marvell 88E6390 Family",
3639 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e6390_hwmon_ops),
3640 		/* PHY_GBIT_FEATURES */
3641 		.flags = PHY_POLL_CABLE_TEST,
3642 		.probe = marvell_probe,
3643 		.config_init = marvell_1011gbe_config_init,
3644 		.config_aneg = m88e6390_config_aneg,
3645 		.read_status = marvell_read_status,
3646 		.config_intr = marvell_config_intr,
3647 		.handle_interrupt = marvell_handle_interrupt,
3648 		.resume = genphy_resume,
3649 		.suspend = genphy_suspend,
3650 		.read_page = marvell_read_page,
3651 		.write_page = marvell_write_page,
3652 		.get_sset_count = marvell_get_sset_count,
3653 		.get_strings = marvell_get_strings,
3654 		.get_stats = marvell_get_stats,
3655 		.get_tunable = m88e1540_get_tunable,
3656 		.set_tunable = m88e1540_set_tunable,
3657 		.cable_test_start = marvell_vct7_cable_test_start,
3658 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3659 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
3660 	},
3661 	{
3662 		.phy_id = MARVELL_PHY_ID_88E6393_FAMILY,
3663 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3664 		.name = "Marvell 88E6393 Family",
3665 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e6393_hwmon_ops),
3666 		/* PHY_GBIT_FEATURES */
3667 		.flags = PHY_POLL_CABLE_TEST,
3668 		.probe = marvell_probe,
3669 		.config_init = marvell_1011gbe_config_init,
3670 		.config_aneg = m88e1510_config_aneg,
3671 		.read_status = marvell_read_status,
3672 		.config_intr = marvell_config_intr,
3673 		.handle_interrupt = marvell_handle_interrupt,
3674 		.resume = genphy_resume,
3675 		.suspend = genphy_suspend,
3676 		.read_page = marvell_read_page,
3677 		.write_page = marvell_write_page,
3678 		.get_sset_count = marvell_get_sset_count,
3679 		.get_strings = marvell_get_strings,
3680 		.get_stats = marvell_get_stats,
3681 		.get_tunable = m88e1540_get_tunable,
3682 		.set_tunable = m88e1540_set_tunable,
3683 		.cable_test_start = marvell_vct7_cable_test_start,
3684 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3685 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
3686 	},
3687 	{
3688 		.phy_id = MARVELL_PHY_ID_88E1340S,
3689 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3690 		.name = "Marvell 88E1340S",
3691 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3692 		.probe = marvell_probe,
3693 		/* PHY_GBIT_FEATURES */
3694 		.config_init = marvell_1011gbe_config_init,
3695 		.config_aneg = m88e1510_config_aneg,
3696 		.read_status = marvell_read_status,
3697 		.config_intr = marvell_config_intr,
3698 		.handle_interrupt = marvell_handle_interrupt,
3699 		.resume = genphy_resume,
3700 		.suspend = genphy_suspend,
3701 		.read_page = marvell_read_page,
3702 		.write_page = marvell_write_page,
3703 		.get_sset_count = marvell_get_sset_count,
3704 		.get_strings = marvell_get_strings,
3705 		.get_stats = marvell_get_stats,
3706 		.get_tunable = m88e1540_get_tunable,
3707 		.set_tunable = m88e1540_set_tunable,
3708 	},
3709 	{
3710 		.phy_id = MARVELL_PHY_ID_88E1548P,
3711 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3712 		.name = "Marvell 88E1548P",
3713 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3714 		.probe = marvell_probe,
3715 		.features = PHY_GBIT_FIBRE_FEATURES,
3716 		.config_init = marvell_1011gbe_config_init,
3717 		.config_aneg = m88e1510_config_aneg,
3718 		.read_status = marvell_read_status,
3719 		.config_intr = marvell_config_intr,
3720 		.handle_interrupt = marvell_handle_interrupt,
3721 		.resume = genphy_resume,
3722 		.suspend = genphy_suspend,
3723 		.read_page = marvell_read_page,
3724 		.write_page = marvell_write_page,
3725 		.get_sset_count = marvell_get_sset_count,
3726 		.get_strings = marvell_get_strings,
3727 		.get_stats = marvell_get_stats,
3728 		.get_tunable = m88e1540_get_tunable,
3729 		.set_tunable = m88e1540_set_tunable,
3730 		.led_brightness_set = m88e1318_led_brightness_set,
3731 		.led_blink_set = m88e1318_led_blink_set,
3732 		.led_hw_is_supported = m88e1318_led_hw_is_supported,
3733 		.led_hw_control_set = m88e1318_led_hw_control_set,
3734 		.led_hw_control_get = m88e1318_led_hw_control_get,
3735 	},
3736 };
3737 
3738 module_phy_driver(marvell_drivers);
3739 
3740 static struct mdio_device_id __maybe_unused marvell_tbl[] = {
3741 	{ MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
3742 	{ MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
3743 	{ MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
3744 	{ MARVELL_PHY_ID_88E1111_FINISAR, MARVELL_PHY_ID_MASK },
3745 	{ MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
3746 	{ MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
3747 	{ MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
3748 	{ MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
3749 	{ MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
3750 	{ MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
3751 	{ MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
3752 	{ MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
3753 	{ MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
3754 	{ MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
3755 	{ MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
3756 	{ MARVELL_PHY_ID_88E6341_FAMILY, MARVELL_PHY_ID_MASK },
3757 	{ MARVELL_PHY_ID_88E6390_FAMILY, MARVELL_PHY_ID_MASK },
3758 	{ MARVELL_PHY_ID_88E6393_FAMILY, MARVELL_PHY_ID_MASK },
3759 	{ MARVELL_PHY_ID_88E1340S, MARVELL_PHY_ID_MASK },
3760 	{ MARVELL_PHY_ID_88E1548P, MARVELL_PHY_ID_MASK },
3761 	{ }
3762 };
3763 
3764 MODULE_DEVICE_TABLE(mdio, marvell_tbl);
3765