1 /*
2 * Broadcom NetXtreme-E RoCE driver.
3 *
4 * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term
5 * Broadcom refers to Broadcom Limited and/or its subsidiaries.
6 *
7 * This software is available to you under a choice of one of two
8 * licenses. You may choose to be licensed under the terms of the GNU
9 * General Public License (GPL) Version 2, available from the file
10 * COPYING in the main directory of this source tree, or the
11 * BSD license below:
12 *
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
15 * are met:
16 *
17 * 1. Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in
21 * the documentation and/or other materials provided with the
22 * distribution.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS''
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS
28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
31 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
32 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
33 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
34 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 *
36 * Description: Slow Path Operators (header)
37 *
38 */
39
40 #ifndef __BNXT_RE_H__
41 #define __BNXT_RE_H__
42 #include <rdma/uverbs_ioctl.h>
43 #include "hw_counters.h"
44 #define ROCE_DRV_MODULE_NAME "bnxt_re"
45
46 #define BNXT_RE_DESC "Broadcom NetXtreme-C/E RoCE Driver"
47
48 #define BNXT_RE_PAGE_SHIFT_1G (30)
49 #define BNXT_RE_PAGE_SIZE_SUPPORTED 0x7FFFF000 /* 4kb - 1G */
50
51 #define BNXT_RE_MAX_MR_SIZE_LOW BIT_ULL(BNXT_RE_PAGE_SHIFT_1G)
52 #define BNXT_RE_MAX_MR_SIZE_HIGH BIT_ULL(39)
53 #define BNXT_RE_MAX_MR_SIZE BNXT_RE_MAX_MR_SIZE_HIGH
54
55 #define BNXT_RE_MAX_QPC_COUNT (64 * 1024)
56 #define BNXT_RE_MAX_MRW_COUNT (64 * 1024)
57 #define BNXT_RE_MAX_SRQC_COUNT (64 * 1024)
58 #define BNXT_RE_MAX_CQ_COUNT (64 * 1024)
59 #define BNXT_RE_MAX_MRW_COUNT_64K (64 * 1024)
60 #define BNXT_RE_MAX_MRW_COUNT_256K (256 * 1024)
61
62 /* Number of MRs to reserve for PF, leaving remainder for VFs */
63 #define BNXT_RE_RESVD_MR_FOR_PF (32 * 1024)
64 #define BNXT_RE_MAX_GID_PER_VF 128
65
66 /*
67 * Percentage of resources of each type reserved for PF.
68 * Remaining resources are divided equally among VFs.
69 * [0, 100]
70 */
71 #define BNXT_RE_PCT_RSVD_FOR_PF 50
72
73 #define BNXT_RE_UD_QP_HW_STALL 0x400000
74
75 #define BNXT_RE_RQ_WQE_THRESHOLD 32
76
77 /*
78 * Setting the default ack delay value to 16, which means
79 * the default timeout is approx. 260ms(4 usec * 2 ^(timeout))
80 */
81
82 #define BNXT_RE_DEFAULT_ACK_DELAY 16
83
84 struct bnxt_re_ring_attr {
85 dma_addr_t *dma_arr;
86 int pages;
87 int type;
88 u32 depth;
89 u32 lrid; /* Logical ring id */
90 u8 mode;
91 };
92
93 struct bnxt_re_sqp_entries {
94 struct bnxt_qplib_sge sge;
95 u64 wrid;
96 /* For storing the actual qp1 cqe */
97 struct bnxt_qplib_cqe cqe;
98 struct bnxt_re_qp *qp1_qp;
99 };
100
101 #define BNXT_RE_MAX_GSI_SQP_ENTRIES 1024
102 struct bnxt_re_gsi_context {
103 struct bnxt_re_qp *gsi_qp;
104 struct bnxt_re_qp *gsi_sqp;
105 struct bnxt_re_ah *gsi_sah;
106 struct bnxt_re_sqp_entries *sqp_tbl;
107 };
108
109 #define BNXT_RE_MIN_MSIX 2
110 #define BNXT_RE_MAX_MSIX 9
111 #define BNXT_RE_AEQ_IDX 0
112 #define BNXT_RE_NQ_IDX 1
113 #define BNXT_RE_GEN_P5_MAX_VF 64
114
115 struct bnxt_re_pacing {
116 u64 dbr_db_fifo_reg_off;
117 void *dbr_page;
118 u64 dbr_bar_addr;
119 u32 pacing_algo_th;
120 u32 do_pacing_save;
121 u32 dbq_pacing_time; /* ms */
122 u32 dbr_def_do_pacing;
123 bool dbr_pacing;
124 struct mutex dbq_lock; /* synchronize db pacing algo */
125 };
126
127 #define BNXT_RE_MAX_DBR_DO_PACING 0xFFFF
128 #define BNXT_RE_DBR_PACING_TIME 5 /* ms */
129 #define BNXT_RE_PACING_ALGO_THRESHOLD 250 /* Entries in DB FIFO */
130 #define BNXT_RE_PACING_ALARM_TH_MULTIPLE 2 /* Multiple of pacing algo threshold */
131 /* Default do_pacing value when there is no congestion */
132 #define BNXT_RE_DBR_DO_PACING_NO_CONGESTION 0x7F /* 1 in 512 probability */
133 #define BNXT_RE_DB_FIFO_ROOM_MASK 0x1FFF8000
134 #define BNXT_RE_MAX_FIFO_DEPTH 0x2c00
135 #define BNXT_RE_DB_FIFO_ROOM_SHIFT 15
136 #define BNXT_RE_GRC_FIFO_REG_BASE 0x2000
137
138 struct bnxt_re_dev {
139 struct ib_device ibdev;
140 struct list_head list;
141 unsigned long flags;
142 #define BNXT_RE_FLAG_NETDEV_REGISTERED 0
143 #define BNXT_RE_FLAG_HAVE_L2_REF 3
144 #define BNXT_RE_FLAG_RCFW_CHANNEL_EN 4
145 #define BNXT_RE_FLAG_QOS_WORK_REG 5
146 #define BNXT_RE_FLAG_RESOURCES_ALLOCATED 7
147 #define BNXT_RE_FLAG_RESOURCES_INITIALIZED 8
148 #define BNXT_RE_FLAG_ERR_DEVICE_DETACHED 17
149 #define BNXT_RE_FLAG_ISSUE_ROCE_STATS 29
150 struct net_device *netdev;
151 struct notifier_block nb;
152 unsigned int version, major, minor;
153 struct bnxt_qplib_chip_ctx *chip_ctx;
154 struct bnxt_en_dev *en_dev;
155 int num_msix;
156
157 int id;
158
159 struct delayed_work worker;
160 u8 cur_prio_map;
161
162 /* FP Notification Queue (CQ & SRQ) */
163 struct tasklet_struct nq_task;
164
165 /* RCFW Channel */
166 struct bnxt_qplib_rcfw rcfw;
167
168 /* NQ */
169 struct bnxt_qplib_nq nq[BNXT_RE_MAX_MSIX];
170
171 /* Device Resources */
172 struct bnxt_qplib_dev_attr dev_attr;
173 struct bnxt_qplib_ctx qplib_ctx;
174 struct bnxt_qplib_res qplib_res;
175 struct bnxt_qplib_dpi dpi_privileged;
176
177 struct mutex qp_lock; /* protect qp list */
178 struct list_head qp_list;
179
180 /* Max of 2 lossless traffic class supported per port */
181 u16 cosq[2];
182
183 /* QP for handling QP1 packets */
184 struct bnxt_re_gsi_context gsi_ctx;
185 struct bnxt_re_stats stats;
186 atomic_t nq_alloc_cnt;
187 u32 is_virtfn;
188 u32 num_vfs;
189 struct bnxt_re_pacing pacing;
190 struct work_struct dbq_fifo_check_work;
191 struct delayed_work dbq_pacing_work;
192 };
193
194 #define to_bnxt_re_dev(ptr, member) \
195 container_of((ptr), struct bnxt_re_dev, member)
196
197 #define BNXT_RE_ROCE_V1_PACKET 0
198 #define BNXT_RE_ROCEV2_IPV4_PACKET 2
199 #define BNXT_RE_ROCEV2_IPV6_PACKET 3
200
201 #define BNXT_RE_CHECK_RC(x) ((x) && ((x) != -ETIMEDOUT))
202 void bnxt_re_pacing_alert(struct bnxt_re_dev *rdev);
203
rdev_to_dev(struct bnxt_re_dev * rdev)204 static inline struct device *rdev_to_dev(struct bnxt_re_dev *rdev)
205 {
206 if (rdev)
207 return &rdev->ibdev.dev;
208 return NULL;
209 }
210
211 extern const struct uapi_definition bnxt_re_uapi_defs[];
212 #endif
213
