1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * ADIS16475 IMU driver
4 *
5 * Copyright 2019 Analog Devices Inc.
6 */
7 #include <linux/bitfield.h>
8 #include <linux/bitops.h>
9 #include <linux/clk.h>
10 #include <linux/debugfs.h>
11 #include <linux/delay.h>
12 #include <linux/device.h>
13 #include <linux/kernel.h>
14 #include <linux/iio/buffer.h>
15 #include <linux/iio/iio.h>
16 #include <linux/iio/imu/adis.h>
17 #include <linux/iio/trigger_consumer.h>
18 #include <linux/irq.h>
19 #include <linux/lcm.h>
20 #include <linux/math.h>
21 #include <linux/module.h>
22 #include <linux/mod_devicetable.h>
23 #include <linux/property.h>
24 #include <linux/spi/spi.h>
25
26 #define ADIS16475_REG_DIAG_STAT 0x02
27 #define ADIS16475_REG_X_GYRO_L 0x04
28 #define ADIS16475_REG_Y_GYRO_L 0x08
29 #define ADIS16475_REG_Z_GYRO_L 0x0C
30 #define ADIS16475_REG_X_ACCEL_L 0x10
31 #define ADIS16475_REG_Y_ACCEL_L 0x14
32 #define ADIS16475_REG_Z_ACCEL_L 0x18
33 #define ADIS16475_REG_TEMP_OUT 0x1c
34 #define ADIS16475_REG_X_GYRO_BIAS_L 0x40
35 #define ADIS16475_REG_Y_GYRO_BIAS_L 0x44
36 #define ADIS16475_REG_Z_GYRO_BIAS_L 0x48
37 #define ADIS16475_REG_X_ACCEL_BIAS_L 0x4c
38 #define ADIS16475_REG_Y_ACCEL_BIAS_L 0x50
39 #define ADIS16475_REG_Z_ACCEL_BIAS_L 0x54
40 #define ADIS16475_REG_FILT_CTRL 0x5c
41 #define ADIS16475_FILT_CTRL_MASK GENMASK(2, 0)
42 #define ADIS16475_FILT_CTRL(x) FIELD_PREP(ADIS16475_FILT_CTRL_MASK, x)
43 #define ADIS16475_REG_MSG_CTRL 0x60
44 #define ADIS16475_MSG_CTRL_DR_POL_MASK BIT(0)
45 #define ADIS16475_MSG_CTRL_DR_POL(x) \
46 FIELD_PREP(ADIS16475_MSG_CTRL_DR_POL_MASK, x)
47 #define ADIS16475_SYNC_MODE_MASK GENMASK(4, 2)
48 #define ADIS16475_SYNC_MODE(x) FIELD_PREP(ADIS16475_SYNC_MODE_MASK, x)
49 #define ADIS16475_REG_UP_SCALE 0x62
50 #define ADIS16475_REG_DEC_RATE 0x64
51 #define ADIS16475_REG_GLOB_CMD 0x68
52 #define ADIS16475_REG_FIRM_REV 0x6c
53 #define ADIS16475_REG_FIRM_DM 0x6e
54 #define ADIS16475_REG_FIRM_Y 0x70
55 #define ADIS16475_REG_PROD_ID 0x72
56 #define ADIS16475_REG_SERIAL_NUM 0x74
57 #define ADIS16475_REG_FLASH_CNT 0x7c
58 #define ADIS16500_BURST32_MASK BIT(9)
59 #define ADIS16500_BURST32(x) FIELD_PREP(ADIS16500_BURST32_MASK, x)
60 /* number of data elements in burst mode */
61 #define ADIS16475_BURST32_MAX_DATA 32
62 #define ADIS16475_BURST_MAX_DATA 20
63 #define ADIS16475_MAX_SCAN_DATA 20
64 /* spi max speed in brust mode */
65 #define ADIS16475_BURST_MAX_SPEED 1000000
66 #define ADIS16475_LSB_DEC_MASK BIT(0)
67 #define ADIS16475_LSB_FIR_MASK BIT(1)
68
69 enum {
70 ADIS16475_SYNC_DIRECT = 1,
71 ADIS16475_SYNC_SCALED,
72 ADIS16475_SYNC_OUTPUT,
73 ADIS16475_SYNC_PULSE = 5,
74 };
75
76 struct adis16475_sync {
77 u16 sync_mode;
78 u16 min_rate;
79 u16 max_rate;
80 };
81
82 struct adis16475_chip_info {
83 const struct iio_chan_spec *channels;
84 const struct adis16475_sync *sync;
85 const struct adis_data adis_data;
86 const char *name;
87 u32 num_channels;
88 u32 gyro_max_val;
89 u32 gyro_max_scale;
90 u32 accel_max_val;
91 u32 accel_max_scale;
92 u32 temp_scale;
93 u32 int_clk;
94 u16 max_dec;
95 u8 num_sync;
96 bool has_burst32;
97 };
98
99 struct adis16475 {
100 const struct adis16475_chip_info *info;
101 struct adis adis;
102 u32 clk_freq;
103 bool burst32;
104 unsigned long lsb_flag;
105 u16 sync_mode;
106 /* Alignment needed for the timestamp */
107 __be16 data[ADIS16475_MAX_SCAN_DATA] __aligned(8);
108 };
109
110 enum {
111 ADIS16475_SCAN_GYRO_X,
112 ADIS16475_SCAN_GYRO_Y,
113 ADIS16475_SCAN_GYRO_Z,
114 ADIS16475_SCAN_ACCEL_X,
115 ADIS16475_SCAN_ACCEL_Y,
116 ADIS16475_SCAN_ACCEL_Z,
117 ADIS16475_SCAN_TEMP,
118 };
119
120 static bool low_rate_allow;
121 module_param(low_rate_allow, bool, 0444);
122 MODULE_PARM_DESC(low_rate_allow,
123 "Allow IMU rates below the minimum advisable when external clk is used in SCALED mode (default: N)");
124
125 #ifdef CONFIG_DEBUG_FS
adis16475_show_firmware_revision(struct file * file,char __user * userbuf,size_t count,loff_t * ppos)126 static ssize_t adis16475_show_firmware_revision(struct file *file,
127 char __user *userbuf,
128 size_t count, loff_t *ppos)
129 {
130 struct adis16475 *st = file->private_data;
131 char buf[7];
132 size_t len;
133 u16 rev;
134 int ret;
135
136 ret = adis_read_reg_16(&st->adis, ADIS16475_REG_FIRM_REV, &rev);
137 if (ret)
138 return ret;
139
140 len = scnprintf(buf, sizeof(buf), "%x.%x\n", rev >> 8, rev & 0xff);
141
142 return simple_read_from_buffer(userbuf, count, ppos, buf, len);
143 }
144
145 static const struct file_operations adis16475_firmware_revision_fops = {
146 .open = simple_open,
147 .read = adis16475_show_firmware_revision,
148 .llseek = default_llseek,
149 .owner = THIS_MODULE,
150 };
151
adis16475_show_firmware_date(struct file * file,char __user * userbuf,size_t count,loff_t * ppos)152 static ssize_t adis16475_show_firmware_date(struct file *file,
153 char __user *userbuf,
154 size_t count, loff_t *ppos)
155 {
156 struct adis16475 *st = file->private_data;
157 u16 md, year;
158 char buf[12];
159 size_t len;
160 int ret;
161
162 ret = adis_read_reg_16(&st->adis, ADIS16475_REG_FIRM_Y, &year);
163 if (ret)
164 return ret;
165
166 ret = adis_read_reg_16(&st->adis, ADIS16475_REG_FIRM_DM, &md);
167 if (ret)
168 return ret;
169
170 len = snprintf(buf, sizeof(buf), "%.2x-%.2x-%.4x\n", md >> 8, md & 0xff,
171 year);
172
173 return simple_read_from_buffer(userbuf, count, ppos, buf, len);
174 }
175
176 static const struct file_operations adis16475_firmware_date_fops = {
177 .open = simple_open,
178 .read = adis16475_show_firmware_date,
179 .llseek = default_llseek,
180 .owner = THIS_MODULE,
181 };
182
adis16475_show_serial_number(void * arg,u64 * val)183 static int adis16475_show_serial_number(void *arg, u64 *val)
184 {
185 struct adis16475 *st = arg;
186 u16 serial;
187 int ret;
188
189 ret = adis_read_reg_16(&st->adis, ADIS16475_REG_SERIAL_NUM, &serial);
190 if (ret)
191 return ret;
192
193 *val = serial;
194
195 return 0;
196 }
197 DEFINE_DEBUGFS_ATTRIBUTE(adis16475_serial_number_fops,
198 adis16475_show_serial_number, NULL, "0x%.4llx\n");
199
adis16475_show_product_id(void * arg,u64 * val)200 static int adis16475_show_product_id(void *arg, u64 *val)
201 {
202 struct adis16475 *st = arg;
203 u16 prod_id;
204 int ret;
205
206 ret = adis_read_reg_16(&st->adis, ADIS16475_REG_PROD_ID, &prod_id);
207 if (ret)
208 return ret;
209
210 *val = prod_id;
211
212 return 0;
213 }
214 DEFINE_DEBUGFS_ATTRIBUTE(adis16475_product_id_fops,
215 adis16475_show_product_id, NULL, "%llu\n");
216
adis16475_show_flash_count(void * arg,u64 * val)217 static int adis16475_show_flash_count(void *arg, u64 *val)
218 {
219 struct adis16475 *st = arg;
220 u32 flash_count;
221 int ret;
222
223 ret = adis_read_reg_32(&st->adis, ADIS16475_REG_FLASH_CNT,
224 &flash_count);
225 if (ret)
226 return ret;
227
228 *val = flash_count;
229
230 return 0;
231 }
232 DEFINE_DEBUGFS_ATTRIBUTE(adis16475_flash_count_fops,
233 adis16475_show_flash_count, NULL, "%lld\n");
234
adis16475_debugfs_init(struct iio_dev * indio_dev)235 static void adis16475_debugfs_init(struct iio_dev *indio_dev)
236 {
237 struct adis16475 *st = iio_priv(indio_dev);
238 struct dentry *d = iio_get_debugfs_dentry(indio_dev);
239
240 debugfs_create_file_unsafe("serial_number", 0400,
241 d, st, &adis16475_serial_number_fops);
242 debugfs_create_file_unsafe("product_id", 0400,
243 d, st, &adis16475_product_id_fops);
244 debugfs_create_file_unsafe("flash_count", 0400,
245 d, st, &adis16475_flash_count_fops);
246 debugfs_create_file("firmware_revision", 0400,
247 d, st, &adis16475_firmware_revision_fops);
248 debugfs_create_file("firmware_date", 0400, d,
249 st, &adis16475_firmware_date_fops);
250 }
251 #else
adis16475_debugfs_init(struct iio_dev * indio_dev)252 static void adis16475_debugfs_init(struct iio_dev *indio_dev)
253 {
254 }
255 #endif
256
adis16475_get_freq(struct adis16475 * st,u32 * freq)257 static int adis16475_get_freq(struct adis16475 *st, u32 *freq)
258 {
259 int ret;
260 u16 dec;
261 u32 sample_rate = st->clk_freq;
262
263 adis_dev_lock(&st->adis);
264
265 if (st->sync_mode == ADIS16475_SYNC_SCALED) {
266 u16 sync_scale;
267
268 ret = __adis_read_reg_16(&st->adis, ADIS16475_REG_UP_SCALE, &sync_scale);
269 if (ret)
270 goto error;
271
272 sample_rate = st->clk_freq * sync_scale;
273 }
274
275 ret = __adis_read_reg_16(&st->adis, ADIS16475_REG_DEC_RATE, &dec);
276 if (ret)
277 goto error;
278
279 adis_dev_unlock(&st->adis);
280
281 *freq = DIV_ROUND_CLOSEST(sample_rate, dec + 1);
282
283 return 0;
284 error:
285 adis_dev_unlock(&st->adis);
286 return ret;
287 }
288
adis16475_set_freq(struct adis16475 * st,const u32 freq)289 static int adis16475_set_freq(struct adis16475 *st, const u32 freq)
290 {
291 u16 dec;
292 int ret;
293 u32 sample_rate = st->clk_freq;
294
295 if (!freq)
296 return -EINVAL;
297
298 adis_dev_lock(&st->adis);
299 /*
300 * When using sync scaled mode, the input clock needs to be scaled so that we have
301 * an IMU sample rate between (optimally) 1900 and 2100. After this, we can use the
302 * decimation filter to lower the sampling rate in order to get what the user wants.
303 * Optimally, the user sample rate is a multiple of both the IMU sample rate and
304 * the input clock. Hence, calculating the sync_scale dynamically gives us better
305 * chances of achieving a perfect/integer value for DEC_RATE. The math here is:
306 * 1. lcm of the input clock and the desired output rate.
307 * 2. get the highest multiple of the previous result lower than the adis max rate.
308 * 3. The last result becomes the IMU sample rate. Use that to calculate SYNC_SCALE
309 * and DEC_RATE (to get the user output rate)
310 */
311 if (st->sync_mode == ADIS16475_SYNC_SCALED) {
312 unsigned long scaled_rate = lcm(st->clk_freq, freq);
313 int sync_scale;
314
315 /*
316 * If lcm is bigger than the IMU maximum sampling rate there's no perfect
317 * solution. In this case, we get the highest multiple of the input clock
318 * lower than the IMU max sample rate.
319 */
320 if (scaled_rate > 2100000)
321 scaled_rate = 2100000 / st->clk_freq * st->clk_freq;
322 else
323 scaled_rate = 2100000 / scaled_rate * scaled_rate;
324
325 /*
326 * This is not an hard requirement but it's not advised to run the IMU
327 * with a sample rate lower than 1900Hz due to possible undersampling
328 * issues. However, there are users that might really want to take the risk.
329 * Hence, we provide a module parameter for them. If set, we allow sample
330 * rates lower than 1.9KHz. By default, we won't allow this and we just roundup
331 * the rate to the next multiple of the input clock bigger than 1.9KHz. This
332 * is done like this as in some cases (when DEC_RATE is 0) might give
333 * us the closest value to the one desired by the user...
334 */
335 if (scaled_rate < 1900000 && !low_rate_allow)
336 scaled_rate = roundup(1900000, st->clk_freq);
337
338 sync_scale = scaled_rate / st->clk_freq;
339 ret = __adis_write_reg_16(&st->adis, ADIS16475_REG_UP_SCALE, sync_scale);
340 if (ret)
341 goto error;
342
343 sample_rate = scaled_rate;
344 }
345
346 dec = DIV_ROUND_CLOSEST(sample_rate, freq);
347
348 if (dec)
349 dec--;
350
351 if (dec > st->info->max_dec)
352 dec = st->info->max_dec;
353
354 ret = __adis_write_reg_16(&st->adis, ADIS16475_REG_DEC_RATE, dec);
355 if (ret)
356 goto error;
357
358 adis_dev_unlock(&st->adis);
359 /*
360 * If decimation is used, then gyro and accel data will have meaningful
361 * bits on the LSB registers. This info is used on the trigger handler.
362 */
363 assign_bit(ADIS16475_LSB_DEC_MASK, &st->lsb_flag, dec);
364
365 return 0;
366 error:
367 adis_dev_unlock(&st->adis);
368 return ret;
369 }
370
371 /* The values are approximated. */
372 static const u32 adis16475_3db_freqs[] = {
373 [0] = 720, /* Filter disabled, full BW (~720Hz) */
374 [1] = 360,
375 [2] = 164,
376 [3] = 80,
377 [4] = 40,
378 [5] = 20,
379 [6] = 10,
380 };
381
adis16475_get_filter(struct adis16475 * st,u32 * filter)382 static int adis16475_get_filter(struct adis16475 *st, u32 *filter)
383 {
384 u16 filter_sz;
385 int ret;
386 const int mask = ADIS16475_FILT_CTRL_MASK;
387
388 ret = adis_read_reg_16(&st->adis, ADIS16475_REG_FILT_CTRL, &filter_sz);
389 if (ret)
390 return ret;
391
392 *filter = adis16475_3db_freqs[filter_sz & mask];
393
394 return 0;
395 }
396
adis16475_set_filter(struct adis16475 * st,const u32 filter)397 static int adis16475_set_filter(struct adis16475 *st, const u32 filter)
398 {
399 int i = ARRAY_SIZE(adis16475_3db_freqs);
400 int ret;
401
402 while (--i) {
403 if (adis16475_3db_freqs[i] >= filter)
404 break;
405 }
406
407 ret = adis_write_reg_16(&st->adis, ADIS16475_REG_FILT_CTRL,
408 ADIS16475_FILT_CTRL(i));
409 if (ret)
410 return ret;
411
412 /*
413 * If FIR is used, then gyro and accel data will have meaningful
414 * bits on the LSB registers. This info is used on the trigger handler.
415 */
416 assign_bit(ADIS16475_LSB_FIR_MASK, &st->lsb_flag, i);
417
418 return 0;
419 }
420
421 static const u32 adis16475_calib_regs[] = {
422 [ADIS16475_SCAN_GYRO_X] = ADIS16475_REG_X_GYRO_BIAS_L,
423 [ADIS16475_SCAN_GYRO_Y] = ADIS16475_REG_Y_GYRO_BIAS_L,
424 [ADIS16475_SCAN_GYRO_Z] = ADIS16475_REG_Z_GYRO_BIAS_L,
425 [ADIS16475_SCAN_ACCEL_X] = ADIS16475_REG_X_ACCEL_BIAS_L,
426 [ADIS16475_SCAN_ACCEL_Y] = ADIS16475_REG_Y_ACCEL_BIAS_L,
427 [ADIS16475_SCAN_ACCEL_Z] = ADIS16475_REG_Z_ACCEL_BIAS_L,
428 };
429
adis16475_read_raw(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,int * val,int * val2,long info)430 static int adis16475_read_raw(struct iio_dev *indio_dev,
431 const struct iio_chan_spec *chan,
432 int *val, int *val2, long info)
433 {
434 struct adis16475 *st = iio_priv(indio_dev);
435 int ret;
436 u32 tmp;
437
438 switch (info) {
439 case IIO_CHAN_INFO_RAW:
440 return adis_single_conversion(indio_dev, chan, 0, val);
441 case IIO_CHAN_INFO_SCALE:
442 switch (chan->type) {
443 case IIO_ANGL_VEL:
444 *val = st->info->gyro_max_val;
445 *val2 = st->info->gyro_max_scale;
446 return IIO_VAL_FRACTIONAL;
447 case IIO_ACCEL:
448 *val = st->info->accel_max_val;
449 *val2 = st->info->accel_max_scale;
450 return IIO_VAL_FRACTIONAL;
451 case IIO_TEMP:
452 *val = st->info->temp_scale;
453 return IIO_VAL_INT;
454 default:
455 return -EINVAL;
456 }
457 case IIO_CHAN_INFO_CALIBBIAS:
458 ret = adis_read_reg_32(&st->adis,
459 adis16475_calib_regs[chan->scan_index],
460 val);
461 if (ret)
462 return ret;
463
464 return IIO_VAL_INT;
465 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
466 ret = adis16475_get_filter(st, val);
467 if (ret)
468 return ret;
469
470 return IIO_VAL_INT;
471 case IIO_CHAN_INFO_SAMP_FREQ:
472 ret = adis16475_get_freq(st, &tmp);
473 if (ret)
474 return ret;
475
476 *val = tmp / 1000;
477 *val2 = (tmp % 1000) * 1000;
478 return IIO_VAL_INT_PLUS_MICRO;
479 default:
480 return -EINVAL;
481 }
482 }
483
adis16475_write_raw(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,int val,int val2,long info)484 static int adis16475_write_raw(struct iio_dev *indio_dev,
485 const struct iio_chan_spec *chan,
486 int val, int val2, long info)
487 {
488 struct adis16475 *st = iio_priv(indio_dev);
489 u32 tmp;
490
491 switch (info) {
492 case IIO_CHAN_INFO_SAMP_FREQ:
493 tmp = val * 1000 + val2 / 1000;
494 return adis16475_set_freq(st, tmp);
495 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
496 return adis16475_set_filter(st, val);
497 case IIO_CHAN_INFO_CALIBBIAS:
498 return adis_write_reg_32(&st->adis,
499 adis16475_calib_regs[chan->scan_index],
500 val);
501 default:
502 return -EINVAL;
503 }
504 }
505
506 #define ADIS16475_MOD_CHAN(_type, _mod, _address, _si, _r_bits, _s_bits) \
507 { \
508 .type = (_type), \
509 .modified = 1, \
510 .channel2 = (_mod), \
511 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
512 BIT(IIO_CHAN_INFO_CALIBBIAS), \
513 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
514 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
515 BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
516 .address = (_address), \
517 .scan_index = (_si), \
518 .scan_type = { \
519 .sign = 's', \
520 .realbits = (_r_bits), \
521 .storagebits = (_s_bits), \
522 .endianness = IIO_BE, \
523 }, \
524 }
525
526 #define ADIS16475_GYRO_CHANNEL(_mod) \
527 ADIS16475_MOD_CHAN(IIO_ANGL_VEL, IIO_MOD_ ## _mod, \
528 ADIS16475_REG_ ## _mod ## _GYRO_L, \
529 ADIS16475_SCAN_GYRO_ ## _mod, 32, 32)
530
531 #define ADIS16475_ACCEL_CHANNEL(_mod) \
532 ADIS16475_MOD_CHAN(IIO_ACCEL, IIO_MOD_ ## _mod, \
533 ADIS16475_REG_ ## _mod ## _ACCEL_L, \
534 ADIS16475_SCAN_ACCEL_ ## _mod, 32, 32)
535
536 #define ADIS16475_TEMP_CHANNEL() { \
537 .type = IIO_TEMP, \
538 .indexed = 1, \
539 .channel = 0, \
540 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
541 BIT(IIO_CHAN_INFO_SCALE), \
542 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
543 BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
544 .address = ADIS16475_REG_TEMP_OUT, \
545 .scan_index = ADIS16475_SCAN_TEMP, \
546 .scan_type = { \
547 .sign = 's', \
548 .realbits = 16, \
549 .storagebits = 16, \
550 .endianness = IIO_BE, \
551 }, \
552 }
553
554 static const struct iio_chan_spec adis16475_channels[] = {
555 ADIS16475_GYRO_CHANNEL(X),
556 ADIS16475_GYRO_CHANNEL(Y),
557 ADIS16475_GYRO_CHANNEL(Z),
558 ADIS16475_ACCEL_CHANNEL(X),
559 ADIS16475_ACCEL_CHANNEL(Y),
560 ADIS16475_ACCEL_CHANNEL(Z),
561 ADIS16475_TEMP_CHANNEL(),
562 IIO_CHAN_SOFT_TIMESTAMP(7)
563 };
564
565 enum adis16475_variant {
566 ADIS16470,
567 ADIS16475_1,
568 ADIS16475_2,
569 ADIS16475_3,
570 ADIS16477_1,
571 ADIS16477_2,
572 ADIS16477_3,
573 ADIS16465_1,
574 ADIS16465_2,
575 ADIS16465_3,
576 ADIS16467_1,
577 ADIS16467_2,
578 ADIS16467_3,
579 ADIS16500,
580 ADIS16505_1,
581 ADIS16505_2,
582 ADIS16505_3,
583 ADIS16507_1,
584 ADIS16507_2,
585 ADIS16507_3,
586 };
587
588 enum {
589 ADIS16475_DIAG_STAT_DATA_PATH = 1,
590 ADIS16475_DIAG_STAT_FLASH_MEM,
591 ADIS16475_DIAG_STAT_SPI,
592 ADIS16475_DIAG_STAT_STANDBY,
593 ADIS16475_DIAG_STAT_SENSOR,
594 ADIS16475_DIAG_STAT_MEMORY,
595 ADIS16475_DIAG_STAT_CLK,
596 };
597
598 static const char * const adis16475_status_error_msgs[] = {
599 [ADIS16475_DIAG_STAT_DATA_PATH] = "Data Path Overrun",
600 [ADIS16475_DIAG_STAT_FLASH_MEM] = "Flash memory update failure",
601 [ADIS16475_DIAG_STAT_SPI] = "SPI communication error",
602 [ADIS16475_DIAG_STAT_STANDBY] = "Standby mode",
603 [ADIS16475_DIAG_STAT_SENSOR] = "Sensor failure",
604 [ADIS16475_DIAG_STAT_MEMORY] = "Memory failure",
605 [ADIS16475_DIAG_STAT_CLK] = "Clock error",
606 };
607
608 #define ADIS16475_DATA(_prod_id, _timeouts) \
609 { \
610 .msc_ctrl_reg = ADIS16475_REG_MSG_CTRL, \
611 .glob_cmd_reg = ADIS16475_REG_GLOB_CMD, \
612 .diag_stat_reg = ADIS16475_REG_DIAG_STAT, \
613 .prod_id_reg = ADIS16475_REG_PROD_ID, \
614 .prod_id = (_prod_id), \
615 .self_test_mask = BIT(2), \
616 .self_test_reg = ADIS16475_REG_GLOB_CMD, \
617 .cs_change_delay = 16, \
618 .read_delay = 5, \
619 .write_delay = 5, \
620 .status_error_msgs = adis16475_status_error_msgs, \
621 .status_error_mask = BIT(ADIS16475_DIAG_STAT_DATA_PATH) | \
622 BIT(ADIS16475_DIAG_STAT_FLASH_MEM) | \
623 BIT(ADIS16475_DIAG_STAT_SPI) | \
624 BIT(ADIS16475_DIAG_STAT_STANDBY) | \
625 BIT(ADIS16475_DIAG_STAT_SENSOR) | \
626 BIT(ADIS16475_DIAG_STAT_MEMORY) | \
627 BIT(ADIS16475_DIAG_STAT_CLK), \
628 .unmasked_drdy = true, \
629 .timeouts = (_timeouts), \
630 .burst_reg_cmd = ADIS16475_REG_GLOB_CMD, \
631 .burst_len = ADIS16475_BURST_MAX_DATA, \
632 .burst_max_len = ADIS16475_BURST32_MAX_DATA, \
633 .burst_max_speed_hz = ADIS16475_BURST_MAX_SPEED \
634 }
635
636 static const struct adis16475_sync adis16475_sync_mode[] = {
637 { ADIS16475_SYNC_OUTPUT },
638 { ADIS16475_SYNC_DIRECT, 1900, 2100 },
639 { ADIS16475_SYNC_SCALED, 1, 128 },
640 { ADIS16475_SYNC_PULSE, 1000, 2100 },
641 };
642
643 static const struct adis_timeout adis16475_timeouts = {
644 .reset_ms = 200,
645 .sw_reset_ms = 200,
646 .self_test_ms = 20,
647 };
648
649 static const struct adis_timeout adis1650x_timeouts = {
650 .reset_ms = 260,
651 .sw_reset_ms = 260,
652 .self_test_ms = 30,
653 };
654
655 static const struct adis16475_chip_info adis16475_chip_info[] = {
656 [ADIS16470] = {
657 .name = "adis16470",
658 .num_channels = ARRAY_SIZE(adis16475_channels),
659 .channels = adis16475_channels,
660 .gyro_max_val = 1,
661 .gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16),
662 .accel_max_val = 1,
663 .accel_max_scale = IIO_M_S_2_TO_G(800 << 16),
664 .temp_scale = 100,
665 .int_clk = 2000,
666 .max_dec = 1999,
667 .sync = adis16475_sync_mode,
668 .num_sync = ARRAY_SIZE(adis16475_sync_mode),
669 .adis_data = ADIS16475_DATA(16470, &adis16475_timeouts),
670 },
671 [ADIS16475_1] = {
672 .name = "adis16475-1",
673 .num_channels = ARRAY_SIZE(adis16475_channels),
674 .channels = adis16475_channels,
675 .gyro_max_val = 1,
676 .gyro_max_scale = IIO_RAD_TO_DEGREE(160 << 16),
677 .accel_max_val = 1,
678 .accel_max_scale = IIO_M_S_2_TO_G(4000 << 16),
679 .temp_scale = 100,
680 .int_clk = 2000,
681 .max_dec = 1999,
682 .sync = adis16475_sync_mode,
683 .num_sync = ARRAY_SIZE(adis16475_sync_mode),
684 .adis_data = ADIS16475_DATA(16475, &adis16475_timeouts),
685 },
686 [ADIS16475_2] = {
687 .name = "adis16475-2",
688 .num_channels = ARRAY_SIZE(adis16475_channels),
689 .channels = adis16475_channels,
690 .gyro_max_val = 1,
691 .gyro_max_scale = IIO_RAD_TO_DEGREE(40 << 16),
692 .accel_max_val = 1,
693 .accel_max_scale = IIO_M_S_2_TO_G(4000 << 16),
694 .temp_scale = 100,
695 .int_clk = 2000,
696 .max_dec = 1999,
697 .sync = adis16475_sync_mode,
698 .num_sync = ARRAY_SIZE(adis16475_sync_mode),
699 .adis_data = ADIS16475_DATA(16475, &adis16475_timeouts),
700 },
701 [ADIS16475_3] = {
702 .name = "adis16475-3",
703 .num_channels = ARRAY_SIZE(adis16475_channels),
704 .channels = adis16475_channels,
705 .gyro_max_val = 1,
706 .gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16),
707 .accel_max_val = 1,
708 .accel_max_scale = IIO_M_S_2_TO_G(4000 << 16),
709 .temp_scale = 100,
710 .int_clk = 2000,
711 .max_dec = 1999,
712 .sync = adis16475_sync_mode,
713 .num_sync = ARRAY_SIZE(adis16475_sync_mode),
714 .adis_data = ADIS16475_DATA(16475, &adis16475_timeouts),
715 },
716 [ADIS16477_1] = {
717 .name = "adis16477-1",
718 .num_channels = ARRAY_SIZE(adis16475_channels),
719 .channels = adis16475_channels,
720 .gyro_max_val = 1,
721 .gyro_max_scale = IIO_RAD_TO_DEGREE(160 << 16),
722 .accel_max_val = 1,
723 .accel_max_scale = IIO_M_S_2_TO_G(800 << 16),
724 .temp_scale = 100,
725 .int_clk = 2000,
726 .max_dec = 1999,
727 .sync = adis16475_sync_mode,
728 .num_sync = ARRAY_SIZE(adis16475_sync_mode),
729 .has_burst32 = true,
730 .adis_data = ADIS16475_DATA(16477, &adis16475_timeouts),
731 },
732 [ADIS16477_2] = {
733 .name = "adis16477-2",
734 .num_channels = ARRAY_SIZE(adis16475_channels),
735 .channels = adis16475_channels,
736 .gyro_max_val = 1,
737 .gyro_max_scale = IIO_RAD_TO_DEGREE(40 << 16),
738 .accel_max_val = 1,
739 .accel_max_scale = IIO_M_S_2_TO_G(800 << 16),
740 .temp_scale = 100,
741 .int_clk = 2000,
742 .max_dec = 1999,
743 .sync = adis16475_sync_mode,
744 .num_sync = ARRAY_SIZE(adis16475_sync_mode),
745 .has_burst32 = true,
746 .adis_data = ADIS16475_DATA(16477, &adis16475_timeouts),
747 },
748 [ADIS16477_3] = {
749 .name = "adis16477-3",
750 .num_channels = ARRAY_SIZE(adis16475_channels),
751 .channels = adis16475_channels,
752 .gyro_max_val = 1,
753 .gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16),
754 .accel_max_val = 1,
755 .accel_max_scale = IIO_M_S_2_TO_G(800 << 16),
756 .temp_scale = 100,
757 .int_clk = 2000,
758 .max_dec = 1999,
759 .sync = adis16475_sync_mode,
760 .num_sync = ARRAY_SIZE(adis16475_sync_mode),
761 .has_burst32 = true,
762 .adis_data = ADIS16475_DATA(16477, &adis16475_timeouts),
763 },
764 [ADIS16465_1] = {
765 .name = "adis16465-1",
766 .num_channels = ARRAY_SIZE(adis16475_channels),
767 .channels = adis16475_channels,
768 .gyro_max_val = 1,
769 .gyro_max_scale = IIO_RAD_TO_DEGREE(160 << 16),
770 .accel_max_val = 1,
771 .accel_max_scale = IIO_M_S_2_TO_G(4000 << 16),
772 .temp_scale = 100,
773 .int_clk = 2000,
774 .max_dec = 1999,
775 .sync = adis16475_sync_mode,
776 .num_sync = ARRAY_SIZE(adis16475_sync_mode),
777 .adis_data = ADIS16475_DATA(16465, &adis16475_timeouts),
778 },
779 [ADIS16465_2] = {
780 .name = "adis16465-2",
781 .num_channels = ARRAY_SIZE(adis16475_channels),
782 .channels = adis16475_channels,
783 .gyro_max_val = 1,
784 .gyro_max_scale = IIO_RAD_TO_DEGREE(40 << 16),
785 .accel_max_val = 1,
786 .accel_max_scale = IIO_M_S_2_TO_G(4000 << 16),
787 .temp_scale = 100,
788 .int_clk = 2000,
789 .max_dec = 1999,
790 .sync = adis16475_sync_mode,
791 .num_sync = ARRAY_SIZE(adis16475_sync_mode),
792 .adis_data = ADIS16475_DATA(16465, &adis16475_timeouts),
793 },
794 [ADIS16465_3] = {
795 .name = "adis16465-3",
796 .num_channels = ARRAY_SIZE(adis16475_channels),
797 .channels = adis16475_channels,
798 .gyro_max_val = 1,
799 .gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16),
800 .accel_max_val = 1,
801 .accel_max_scale = IIO_M_S_2_TO_G(4000 << 16),
802 .temp_scale = 100,
803 .int_clk = 2000,
804 .max_dec = 1999,
805 .sync = adis16475_sync_mode,
806 .num_sync = ARRAY_SIZE(adis16475_sync_mode),
807 .adis_data = ADIS16475_DATA(16465, &adis16475_timeouts),
808 },
809 [ADIS16467_1] = {
810 .name = "adis16467-1",
811 .num_channels = ARRAY_SIZE(adis16475_channels),
812 .channels = adis16475_channels,
813 .gyro_max_val = 1,
814 .gyro_max_scale = IIO_RAD_TO_DEGREE(160 << 16),
815 .accel_max_val = 1,
816 .accel_max_scale = IIO_M_S_2_TO_G(800 << 16),
817 .temp_scale = 100,
818 .int_clk = 2000,
819 .max_dec = 1999,
820 .sync = adis16475_sync_mode,
821 .num_sync = ARRAY_SIZE(adis16475_sync_mode),
822 .adis_data = ADIS16475_DATA(16467, &adis16475_timeouts),
823 },
824 [ADIS16467_2] = {
825 .name = "adis16467-2",
826 .num_channels = ARRAY_SIZE(adis16475_channels),
827 .channels = adis16475_channels,
828 .gyro_max_val = 1,
829 .gyro_max_scale = IIO_RAD_TO_DEGREE(40 << 16),
830 .accel_max_val = 1,
831 .accel_max_scale = IIO_M_S_2_TO_G(800 << 16),
832 .temp_scale = 100,
833 .int_clk = 2000,
834 .max_dec = 1999,
835 .sync = adis16475_sync_mode,
836 .num_sync = ARRAY_SIZE(adis16475_sync_mode),
837 .adis_data = ADIS16475_DATA(16467, &adis16475_timeouts),
838 },
839 [ADIS16467_3] = {
840 .name = "adis16467-3",
841 .num_channels = ARRAY_SIZE(adis16475_channels),
842 .channels = adis16475_channels,
843 .gyro_max_val = 1,
844 .gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16),
845 .accel_max_val = 1,
846 .accel_max_scale = IIO_M_S_2_TO_G(800 << 16),
847 .temp_scale = 100,
848 .int_clk = 2000,
849 .max_dec = 1999,
850 .sync = adis16475_sync_mode,
851 .num_sync = ARRAY_SIZE(adis16475_sync_mode),
852 .adis_data = ADIS16475_DATA(16467, &adis16475_timeouts),
853 },
854 [ADIS16500] = {
855 .name = "adis16500",
856 .num_channels = ARRAY_SIZE(adis16475_channels),
857 .channels = adis16475_channels,
858 .gyro_max_val = 1,
859 .gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16),
860 .accel_max_val = 392,
861 .accel_max_scale = 32000 << 16,
862 .temp_scale = 100,
863 .int_clk = 2000,
864 .max_dec = 1999,
865 .sync = adis16475_sync_mode,
866 /* pulse sync not supported */
867 .num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1,
868 .has_burst32 = true,
869 .adis_data = ADIS16475_DATA(16500, &adis1650x_timeouts),
870 },
871 [ADIS16505_1] = {
872 .name = "adis16505-1",
873 .num_channels = ARRAY_SIZE(adis16475_channels),
874 .channels = adis16475_channels,
875 .gyro_max_val = 1,
876 .gyro_max_scale = IIO_RAD_TO_DEGREE(160 << 16),
877 .accel_max_val = 78,
878 .accel_max_scale = 32000 << 16,
879 .temp_scale = 100,
880 .int_clk = 2000,
881 .max_dec = 1999,
882 .sync = adis16475_sync_mode,
883 /* pulse sync not supported */
884 .num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1,
885 .has_burst32 = true,
886 .adis_data = ADIS16475_DATA(16505, &adis1650x_timeouts),
887 },
888 [ADIS16505_2] = {
889 .name = "adis16505-2",
890 .num_channels = ARRAY_SIZE(adis16475_channels),
891 .channels = adis16475_channels,
892 .gyro_max_val = 1,
893 .gyro_max_scale = IIO_RAD_TO_DEGREE(40 << 16),
894 .accel_max_val = 78,
895 .accel_max_scale = 32000 << 16,
896 .temp_scale = 100,
897 .int_clk = 2000,
898 .max_dec = 1999,
899 .sync = adis16475_sync_mode,
900 /* pulse sync not supported */
901 .num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1,
902 .has_burst32 = true,
903 .adis_data = ADIS16475_DATA(16505, &adis1650x_timeouts),
904 },
905 [ADIS16505_3] = {
906 .name = "adis16505-3",
907 .num_channels = ARRAY_SIZE(adis16475_channels),
908 .channels = adis16475_channels,
909 .gyro_max_val = 1,
910 .gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16),
911 .accel_max_val = 78,
912 .accel_max_scale = 32000 << 16,
913 .temp_scale = 100,
914 .int_clk = 2000,
915 .max_dec = 1999,
916 .sync = adis16475_sync_mode,
917 /* pulse sync not supported */
918 .num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1,
919 .has_burst32 = true,
920 .adis_data = ADIS16475_DATA(16505, &adis1650x_timeouts),
921 },
922 [ADIS16507_1] = {
923 .name = "adis16507-1",
924 .num_channels = ARRAY_SIZE(adis16475_channels),
925 .channels = adis16475_channels,
926 .gyro_max_val = 1,
927 .gyro_max_scale = IIO_RAD_TO_DEGREE(160 << 16),
928 .accel_max_val = 392,
929 .accel_max_scale = 32000 << 16,
930 .temp_scale = 100,
931 .int_clk = 2000,
932 .max_dec = 1999,
933 .sync = adis16475_sync_mode,
934 /* pulse sync not supported */
935 .num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1,
936 .has_burst32 = true,
937 .adis_data = ADIS16475_DATA(16507, &adis1650x_timeouts),
938 },
939 [ADIS16507_2] = {
940 .name = "adis16507-2",
941 .num_channels = ARRAY_SIZE(adis16475_channels),
942 .channels = adis16475_channels,
943 .gyro_max_val = 1,
944 .gyro_max_scale = IIO_RAD_TO_DEGREE(40 << 16),
945 .accel_max_val = 392,
946 .accel_max_scale = 32000 << 16,
947 .temp_scale = 100,
948 .int_clk = 2000,
949 .max_dec = 1999,
950 .sync = adis16475_sync_mode,
951 /* pulse sync not supported */
952 .num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1,
953 .has_burst32 = true,
954 .adis_data = ADIS16475_DATA(16507, &adis1650x_timeouts),
955 },
956 [ADIS16507_3] = {
957 .name = "adis16507-3",
958 .num_channels = ARRAY_SIZE(adis16475_channels),
959 .channels = adis16475_channels,
960 .gyro_max_val = 1,
961 .gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16),
962 .accel_max_val = 392,
963 .accel_max_scale = 32000 << 16,
964 .temp_scale = 100,
965 .int_clk = 2000,
966 .max_dec = 1999,
967 .sync = adis16475_sync_mode,
968 /* pulse sync not supported */
969 .num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1,
970 .has_burst32 = true,
971 .adis_data = ADIS16475_DATA(16507, &adis1650x_timeouts),
972 },
973 };
974
975 static const struct iio_info adis16475_info = {
976 .read_raw = &adis16475_read_raw,
977 .write_raw = &adis16475_write_raw,
978 .update_scan_mode = adis_update_scan_mode,
979 .debugfs_reg_access = adis_debugfs_reg_access,
980 };
981
adis16475_validate_crc(const u8 * buffer,u16 crc,const bool burst32)982 static bool adis16475_validate_crc(const u8 *buffer, u16 crc,
983 const bool burst32)
984 {
985 int i;
986 /* extra 6 elements for low gyro and accel */
987 const u16 sz = burst32 ? ADIS16475_BURST32_MAX_DATA :
988 ADIS16475_BURST_MAX_DATA;
989
990 for (i = 0; i < sz - 2; i++)
991 crc -= buffer[i];
992
993 return crc == 0;
994 }
995
adis16475_burst32_check(struct adis16475 * st)996 static void adis16475_burst32_check(struct adis16475 *st)
997 {
998 int ret;
999 struct adis *adis = &st->adis;
1000
1001 if (!st->info->has_burst32)
1002 return;
1003
1004 if (st->lsb_flag && !st->burst32) {
1005 const u16 en = ADIS16500_BURST32(1);
1006
1007 ret = __adis_update_bits(&st->adis, ADIS16475_REG_MSG_CTRL,
1008 ADIS16500_BURST32_MASK, en);
1009 if (ret)
1010 return;
1011
1012 st->burst32 = true;
1013
1014 /*
1015 * In 32-bit mode we need extra 2 bytes for all gyro
1016 * and accel channels.
1017 */
1018 adis->burst_extra_len = 6 * sizeof(u16);
1019 adis->xfer[1].len += 6 * sizeof(u16);
1020 dev_dbg(&adis->spi->dev, "Enable burst32 mode, xfer:%d",
1021 adis->xfer[1].len);
1022
1023 } else if (!st->lsb_flag && st->burst32) {
1024 const u16 en = ADIS16500_BURST32(0);
1025
1026 ret = __adis_update_bits(&st->adis, ADIS16475_REG_MSG_CTRL,
1027 ADIS16500_BURST32_MASK, en);
1028 if (ret)
1029 return;
1030
1031 st->burst32 = false;
1032
1033 /* Remove the extra bits */
1034 adis->burst_extra_len = 0;
1035 adis->xfer[1].len -= 6 * sizeof(u16);
1036 dev_dbg(&adis->spi->dev, "Disable burst32 mode, xfer:%d\n",
1037 adis->xfer[1].len);
1038 }
1039 }
1040
adis16475_trigger_handler(int irq,void * p)1041 static irqreturn_t adis16475_trigger_handler(int irq, void *p)
1042 {
1043 struct iio_poll_func *pf = p;
1044 struct iio_dev *indio_dev = pf->indio_dev;
1045 struct adis16475 *st = iio_priv(indio_dev);
1046 struct adis *adis = &st->adis;
1047 int ret, bit, i = 0;
1048 __be16 *buffer;
1049 u16 crc;
1050 bool valid;
1051 /* offset until the first element after gyro and accel */
1052 const u8 offset = st->burst32 ? 13 : 7;
1053
1054 ret = spi_sync(adis->spi, &adis->msg);
1055 if (ret)
1056 goto check_burst32;
1057
1058 buffer = adis->buffer;
1059
1060 crc = be16_to_cpu(buffer[offset + 2]);
1061 valid = adis16475_validate_crc(adis->buffer, crc, st->burst32);
1062 if (!valid) {
1063 dev_err(&adis->spi->dev, "Invalid crc\n");
1064 goto check_burst32;
1065 }
1066
1067 for_each_set_bit(bit, indio_dev->active_scan_mask,
1068 indio_dev->masklength) {
1069 /*
1070 * When burst mode is used, system flags is the first data
1071 * channel in the sequence, but the scan index is 7.
1072 */
1073 switch (bit) {
1074 case ADIS16475_SCAN_TEMP:
1075 st->data[i++] = buffer[offset];
1076 break;
1077 case ADIS16475_SCAN_GYRO_X ... ADIS16475_SCAN_ACCEL_Z:
1078 /*
1079 * The first 2 bytes on the received data are the
1080 * DIAG_STAT reg, hence the +1 offset here...
1081 */
1082 if (st->burst32) {
1083 /* upper 16 */
1084 st->data[i++] = buffer[bit * 2 + 2];
1085 /* lower 16 */
1086 st->data[i++] = buffer[bit * 2 + 1];
1087 } else {
1088 st->data[i++] = buffer[bit + 1];
1089 /*
1090 * Don't bother in doing the manual read if the
1091 * device supports burst32. burst32 will be
1092 * enabled in the next call to
1093 * adis16475_burst32_check()...
1094 */
1095 if (st->lsb_flag && !st->info->has_burst32) {
1096 u16 val = 0;
1097 const u32 reg = ADIS16475_REG_X_GYRO_L +
1098 bit * 4;
1099
1100 adis_read_reg_16(adis, reg, &val);
1101 st->data[i++] = cpu_to_be16(val);
1102 } else {
1103 /* lower not used */
1104 st->data[i++] = 0;
1105 }
1106 }
1107 break;
1108 }
1109 }
1110
1111 iio_push_to_buffers_with_timestamp(indio_dev, st->data, pf->timestamp);
1112 check_burst32:
1113 /*
1114 * We only check the burst mode at the end of the current capture since
1115 * it takes a full data ready cycle for the device to update the burst
1116 * array.
1117 */
1118 adis16475_burst32_check(st);
1119 iio_trigger_notify_done(indio_dev->trig);
1120
1121 return IRQ_HANDLED;
1122 }
1123
adis16475_config_sync_mode(struct adis16475 * st)1124 static int adis16475_config_sync_mode(struct adis16475 *st)
1125 {
1126 int ret;
1127 struct device *dev = &st->adis.spi->dev;
1128 const struct adis16475_sync *sync;
1129 u32 sync_mode;
1130
1131 /* default to internal clk */
1132 st->clk_freq = st->info->int_clk * 1000;
1133
1134 ret = device_property_read_u32(dev, "adi,sync-mode", &sync_mode);
1135 if (ret)
1136 return 0;
1137
1138 if (sync_mode >= st->info->num_sync) {
1139 dev_err(dev, "Invalid sync mode: %u for %s\n", sync_mode,
1140 st->info->name);
1141 return -EINVAL;
1142 }
1143
1144 sync = &st->info->sync[sync_mode];
1145 st->sync_mode = sync->sync_mode;
1146
1147 /* All the other modes require external input signal */
1148 if (sync->sync_mode != ADIS16475_SYNC_OUTPUT) {
1149 struct clk *clk = devm_clk_get_enabled(dev, NULL);
1150
1151 if (IS_ERR(clk))
1152 return PTR_ERR(clk);
1153
1154 st->clk_freq = clk_get_rate(clk);
1155 if (st->clk_freq < sync->min_rate ||
1156 st->clk_freq > sync->max_rate) {
1157 dev_err(dev,
1158 "Clk rate:%u not in a valid range:[%u %u]\n",
1159 st->clk_freq, sync->min_rate, sync->max_rate);
1160 return -EINVAL;
1161 }
1162
1163 if (sync->sync_mode == ADIS16475_SYNC_SCALED) {
1164 u16 up_scale;
1165
1166 /*
1167 * In sync scaled mode, the IMU sample rate is the clk_freq * sync_scale.
1168 * Hence, default the IMU sample rate to the highest multiple of the input
1169 * clock lower than the IMU max sample rate. The optimal range is
1170 * 1900-2100 sps...
1171 */
1172 up_scale = 2100 / st->clk_freq;
1173
1174 ret = __adis_write_reg_16(&st->adis,
1175 ADIS16475_REG_UP_SCALE,
1176 up_scale);
1177 if (ret)
1178 return ret;
1179 }
1180
1181 st->clk_freq *= 1000;
1182 }
1183 /*
1184 * Keep in mind that the mask for the clk modes in adis1650*
1185 * chips is different (1100 instead of 11100). However, we
1186 * are not configuring BIT(4) in these chips and the default
1187 * value is 0, so we are fine in doing the below operations.
1188 * I'm keeping this for simplicity and avoiding extra variables
1189 * in chip_info.
1190 */
1191 ret = __adis_update_bits(&st->adis, ADIS16475_REG_MSG_CTRL,
1192 ADIS16475_SYNC_MODE_MASK, sync->sync_mode);
1193 if (ret)
1194 return ret;
1195
1196 usleep_range(250, 260);
1197
1198 return 0;
1199 }
1200
adis16475_config_irq_pin(struct adis16475 * st)1201 static int adis16475_config_irq_pin(struct adis16475 *st)
1202 {
1203 int ret;
1204 struct irq_data *desc;
1205 u32 irq_type;
1206 u16 val = 0;
1207 u8 polarity;
1208 struct spi_device *spi = st->adis.spi;
1209
1210 desc = irq_get_irq_data(spi->irq);
1211 if (!desc) {
1212 dev_err(&spi->dev, "Could not find IRQ %d\n", spi->irq);
1213 return -EINVAL;
1214 }
1215 /*
1216 * It is possible to configure the data ready polarity. Furthermore, we
1217 * need to update the adis struct if we want data ready as active low.
1218 */
1219 irq_type = irqd_get_trigger_type(desc);
1220 if (irq_type == IRQ_TYPE_EDGE_RISING) {
1221 polarity = 1;
1222 st->adis.irq_flag = IRQF_TRIGGER_RISING;
1223 } else if (irq_type == IRQ_TYPE_EDGE_FALLING) {
1224 polarity = 0;
1225 st->adis.irq_flag = IRQF_TRIGGER_FALLING;
1226 } else {
1227 dev_err(&spi->dev, "Invalid interrupt type 0x%x specified\n",
1228 irq_type);
1229 return -EINVAL;
1230 }
1231
1232 val = ADIS16475_MSG_CTRL_DR_POL(polarity);
1233 ret = __adis_update_bits(&st->adis, ADIS16475_REG_MSG_CTRL,
1234 ADIS16475_MSG_CTRL_DR_POL_MASK, val);
1235 if (ret)
1236 return ret;
1237 /*
1238 * There is a delay writing to any bits written to the MSC_CTRL
1239 * register. It should not be bigger than 200us, so 250 should be more
1240 * than enough!
1241 */
1242 usleep_range(250, 260);
1243
1244 return 0;
1245 }
1246
1247 static const struct of_device_id adis16475_of_match[] = {
1248 { .compatible = "adi,adis16470",
1249 .data = &adis16475_chip_info[ADIS16470] },
1250 { .compatible = "adi,adis16475-1",
1251 .data = &adis16475_chip_info[ADIS16475_1] },
1252 { .compatible = "adi,adis16475-2",
1253 .data = &adis16475_chip_info[ADIS16475_2] },
1254 { .compatible = "adi,adis16475-3",
1255 .data = &adis16475_chip_info[ADIS16475_3] },
1256 { .compatible = "adi,adis16477-1",
1257 .data = &adis16475_chip_info[ADIS16477_1] },
1258 { .compatible = "adi,adis16477-2",
1259 .data = &adis16475_chip_info[ADIS16477_2] },
1260 { .compatible = "adi,adis16477-3",
1261 .data = &adis16475_chip_info[ADIS16477_3] },
1262 { .compatible = "adi,adis16465-1",
1263 .data = &adis16475_chip_info[ADIS16465_1] },
1264 { .compatible = "adi,adis16465-2",
1265 .data = &adis16475_chip_info[ADIS16465_2] },
1266 { .compatible = "adi,adis16465-3",
1267 .data = &adis16475_chip_info[ADIS16465_3] },
1268 { .compatible = "adi,adis16467-1",
1269 .data = &adis16475_chip_info[ADIS16467_1] },
1270 { .compatible = "adi,adis16467-2",
1271 .data = &adis16475_chip_info[ADIS16467_2] },
1272 { .compatible = "adi,adis16467-3",
1273 .data = &adis16475_chip_info[ADIS16467_3] },
1274 { .compatible = "adi,adis16500",
1275 .data = &adis16475_chip_info[ADIS16500] },
1276 { .compatible = "adi,adis16505-1",
1277 .data = &adis16475_chip_info[ADIS16505_1] },
1278 { .compatible = "adi,adis16505-2",
1279 .data = &adis16475_chip_info[ADIS16505_2] },
1280 { .compatible = "adi,adis16505-3",
1281 .data = &adis16475_chip_info[ADIS16505_3] },
1282 { .compatible = "adi,adis16507-1",
1283 .data = &adis16475_chip_info[ADIS16507_1] },
1284 { .compatible = "adi,adis16507-2",
1285 .data = &adis16475_chip_info[ADIS16507_2] },
1286 { .compatible = "adi,adis16507-3",
1287 .data = &adis16475_chip_info[ADIS16507_3] },
1288 { },
1289 };
1290 MODULE_DEVICE_TABLE(of, adis16475_of_match);
1291
adis16475_probe(struct spi_device * spi)1292 static int adis16475_probe(struct spi_device *spi)
1293 {
1294 struct iio_dev *indio_dev;
1295 struct adis16475 *st;
1296 int ret;
1297
1298 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
1299 if (!indio_dev)
1300 return -ENOMEM;
1301
1302 st = iio_priv(indio_dev);
1303
1304 st->info = device_get_match_data(&spi->dev);
1305 if (!st->info)
1306 return -EINVAL;
1307
1308 ret = adis_init(&st->adis, indio_dev, spi, &st->info->adis_data);
1309 if (ret)
1310 return ret;
1311
1312 indio_dev->name = st->info->name;
1313 indio_dev->channels = st->info->channels;
1314 indio_dev->num_channels = st->info->num_channels;
1315 indio_dev->info = &adis16475_info;
1316 indio_dev->modes = INDIO_DIRECT_MODE;
1317
1318 ret = __adis_initial_startup(&st->adis);
1319 if (ret)
1320 return ret;
1321
1322 ret = adis16475_config_irq_pin(st);
1323 if (ret)
1324 return ret;
1325
1326 ret = adis16475_config_sync_mode(st);
1327 if (ret)
1328 return ret;
1329
1330 ret = devm_adis_setup_buffer_and_trigger(&st->adis, indio_dev,
1331 adis16475_trigger_handler);
1332 if (ret)
1333 return ret;
1334
1335 ret = devm_iio_device_register(&spi->dev, indio_dev);
1336 if (ret)
1337 return ret;
1338
1339 adis16475_debugfs_init(indio_dev);
1340
1341 return 0;
1342 }
1343
1344 static struct spi_driver adis16475_driver = {
1345 .driver = {
1346 .name = "adis16475",
1347 .of_match_table = adis16475_of_match,
1348 },
1349 .probe = adis16475_probe,
1350 };
1351 module_spi_driver(adis16475_driver);
1352
1353 MODULE_AUTHOR("Nuno Sa <nuno.sa@analog.com>");
1354 MODULE_DESCRIPTION("Analog Devices ADIS16475 IMU driver");
1355 MODULE_LICENSE("GPL");
1356 MODULE_IMPORT_NS(IIO_ADISLIB);
1357
