1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (c) 2022 Richtek Technology Corp.
4 *
5 * ChiYuan Huang <cy_huang@richtek.com>
6 */
7
8 #include <linux/bitops.h>
9 #include <linux/delay.h>
10 #include <linux/i2c.h>
11 #include <linux/kernel.h>
12 #include <linux/mod_devicetable.h>
13 #include <linux/module.h>
14 #include <linux/pm_runtime.h>
15 #include <linux/property.h>
16 #include <linux/regmap.h>
17 #include <linux/sysfs.h>
18 #include <linux/types.h>
19 #include <linux/util_macros.h>
20
21 #include <linux/iio/buffer.h>
22 #include <linux/iio/iio.h>
23 #include <linux/iio/sysfs.h>
24 #include <linux/iio/trigger_consumer.h>
25 #include <linux/iio/triggered_buffer.h>
26
27 #define RTQ6056_REG_CONFIG 0x00
28 #define RTQ6056_REG_SHUNTVOLT 0x01
29 #define RTQ6056_REG_BUSVOLT 0x02
30 #define RTQ6056_REG_POWER 0x03
31 #define RTQ6056_REG_CURRENT 0x04
32 #define RTQ6056_REG_CALIBRATION 0x05
33 #define RTQ6056_REG_MASKENABLE 0x06
34 #define RTQ6056_REG_ALERTLIMIT 0x07
35 #define RTQ6056_REG_MANUFACTID 0xFE
36 #define RTQ6056_REG_DIEID 0xFF
37
38 #define RTQ6056_VENDOR_ID 0x1214
39 #define RTQ6056_DEFAULT_CONFIG 0x4127
40 #define RTQ6056_CONT_ALLON 7
41
42 enum {
43 RTQ6056_CH_VSHUNT = 0,
44 RTQ6056_CH_VBUS,
45 RTQ6056_CH_POWER,
46 RTQ6056_CH_CURRENT,
47 RTQ6056_MAX_CHANNEL
48 };
49
50 enum {
51 F_OPMODE = 0,
52 F_VSHUNTCT,
53 F_VBUSCT,
54 F_AVG,
55 F_RESET,
56 F_MAX_FIELDS
57 };
58
59 struct rtq6056_priv {
60 struct device *dev;
61 struct regmap *regmap;
62 struct regmap_field *rm_fields[F_MAX_FIELDS];
63 u32 shunt_resistor_uohm;
64 int vshuntct_us;
65 int vbusct_us;
66 int avg_sample;
67 };
68
69 static const struct reg_field rtq6056_reg_fields[F_MAX_FIELDS] = {
70 [F_OPMODE] = REG_FIELD(RTQ6056_REG_CONFIG, 0, 2),
71 [F_VSHUNTCT] = REG_FIELD(RTQ6056_REG_CONFIG, 3, 5),
72 [F_VBUSCT] = REG_FIELD(RTQ6056_REG_CONFIG, 6, 8),
73 [F_AVG] = REG_FIELD(RTQ6056_REG_CONFIG, 9, 11),
74 [F_RESET] = REG_FIELD(RTQ6056_REG_CONFIG, 15, 15),
75 };
76
77 static const struct iio_chan_spec rtq6056_channels[RTQ6056_MAX_CHANNEL + 1] = {
78 {
79 .type = IIO_VOLTAGE,
80 .indexed = 1,
81 .channel = 0,
82 .address = RTQ6056_REG_SHUNTVOLT,
83 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
84 BIT(IIO_CHAN_INFO_SCALE) |
85 BIT(IIO_CHAN_INFO_SAMP_FREQ),
86 .info_mask_separate_available = BIT(IIO_CHAN_INFO_SAMP_FREQ),
87 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
88 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
89 .scan_index = 0,
90 .scan_type = {
91 .sign = 's',
92 .realbits = 16,
93 .storagebits = 16,
94 .endianness = IIO_CPU,
95 },
96 },
97 {
98 .type = IIO_VOLTAGE,
99 .indexed = 1,
100 .channel = 1,
101 .address = RTQ6056_REG_BUSVOLT,
102 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
103 BIT(IIO_CHAN_INFO_SCALE) |
104 BIT(IIO_CHAN_INFO_SAMP_FREQ),
105 .info_mask_separate_available = BIT(IIO_CHAN_INFO_SAMP_FREQ),
106 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
107 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
108 .scan_index = 1,
109 .scan_type = {
110 .sign = 'u',
111 .realbits = 16,
112 .storagebits = 16,
113 .endianness = IIO_CPU,
114 },
115 },
116 {
117 .type = IIO_POWER,
118 .indexed = 1,
119 .channel = 2,
120 .address = RTQ6056_REG_POWER,
121 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
122 BIT(IIO_CHAN_INFO_SCALE) |
123 BIT(IIO_CHAN_INFO_SAMP_FREQ),
124 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
125 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
126 .scan_index = 2,
127 .scan_type = {
128 .sign = 'u',
129 .realbits = 16,
130 .storagebits = 16,
131 .endianness = IIO_CPU,
132 },
133 },
134 {
135 .type = IIO_CURRENT,
136 .indexed = 1,
137 .channel = 3,
138 .address = RTQ6056_REG_CURRENT,
139 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
140 BIT(IIO_CHAN_INFO_SAMP_FREQ),
141 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
142 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO),
143 .scan_index = 3,
144 .scan_type = {
145 .sign = 's',
146 .realbits = 16,
147 .storagebits = 16,
148 .endianness = IIO_CPU,
149 },
150 },
151 IIO_CHAN_SOFT_TIMESTAMP(RTQ6056_MAX_CHANNEL),
152 };
153
rtq6056_adc_read_channel(struct rtq6056_priv * priv,struct iio_chan_spec const * ch,int * val)154 static int rtq6056_adc_read_channel(struct rtq6056_priv *priv,
155 struct iio_chan_spec const *ch,
156 int *val)
157 {
158 struct device *dev = priv->dev;
159 unsigned int addr = ch->address;
160 unsigned int regval;
161 int ret;
162
163 pm_runtime_get_sync(dev);
164 ret = regmap_read(priv->regmap, addr, ®val);
165 pm_runtime_mark_last_busy(dev);
166 pm_runtime_put(dev);
167 if (ret)
168 return ret;
169
170 /* Power and VBUS is unsigned 16-bit, others are signed 16-bit */
171 if (addr == RTQ6056_REG_BUSVOLT || addr == RTQ6056_REG_POWER)
172 *val = regval;
173 else
174 *val = sign_extend32(regval, 16);
175
176 return IIO_VAL_INT;
177 }
178
rtq6056_adc_read_scale(struct iio_chan_spec const * ch,int * val,int * val2)179 static int rtq6056_adc_read_scale(struct iio_chan_spec const *ch, int *val,
180 int *val2)
181 {
182 switch (ch->address) {
183 case RTQ6056_REG_SHUNTVOLT:
184 /* VSHUNT lsb 2.5uV */
185 *val = 2500;
186 *val2 = 1000000;
187 return IIO_VAL_FRACTIONAL;
188 case RTQ6056_REG_BUSVOLT:
189 /* VBUS lsb 1.25mV */
190 *val = 1250;
191 *val2 = 1000;
192 return IIO_VAL_FRACTIONAL;
193 case RTQ6056_REG_POWER:
194 /* Power lsb 25mW */
195 *val = 25;
196 return IIO_VAL_INT;
197 default:
198 return -EINVAL;
199 }
200 }
201
202 /*
203 * Sample frequency for channel VSHUNT and VBUS. The indices correspond
204 * with the bit value expected by the chip. And it can be found at
205 * https://www.richtek.com/assets/product_file/RTQ6056/DSQ6056-00.pdf
206 */
207 static const int rtq6056_samp_freq_list[] = {
208 7194, 4926, 3717, 1904, 964, 485, 243, 122,
209 };
210
rtq6056_adc_set_samp_freq(struct rtq6056_priv * priv,struct iio_chan_spec const * ch,int val)211 static int rtq6056_adc_set_samp_freq(struct rtq6056_priv *priv,
212 struct iio_chan_spec const *ch, int val)
213 {
214 struct regmap_field *rm_field;
215 unsigned int selector;
216 int *ct, ret;
217
218 if (val > 7194 || val < 122)
219 return -EINVAL;
220
221 if (ch->address == RTQ6056_REG_SHUNTVOLT) {
222 rm_field = priv->rm_fields[F_VSHUNTCT];
223 ct = &priv->vshuntct_us;
224 } else if (ch->address == RTQ6056_REG_BUSVOLT) {
225 rm_field = priv->rm_fields[F_VBUSCT];
226 ct = &priv->vbusct_us;
227 } else
228 return -EINVAL;
229
230 selector = find_closest_descending(val, rtq6056_samp_freq_list,
231 ARRAY_SIZE(rtq6056_samp_freq_list));
232
233 ret = regmap_field_write(rm_field, selector);
234 if (ret)
235 return ret;
236
237 *ct = 1000000 / rtq6056_samp_freq_list[selector];
238
239 return 0;
240 }
241
242 /*
243 * Available averaging rate for rtq6056. The indices correspond with the bit
244 * value expected by the chip. And it can be found at
245 * https://www.richtek.com/assets/product_file/RTQ6056/DSQ6056-00.pdf
246 */
247 static const int rtq6056_avg_sample_list[] = {
248 1, 4, 16, 64, 128, 256, 512, 1024,
249 };
250
rtq6056_adc_set_average(struct rtq6056_priv * priv,int val)251 static int rtq6056_adc_set_average(struct rtq6056_priv *priv, int val)
252 {
253 unsigned int selector;
254 int ret;
255
256 if (val > 1024 || val < 1)
257 return -EINVAL;
258
259 selector = find_closest(val, rtq6056_avg_sample_list,
260 ARRAY_SIZE(rtq6056_avg_sample_list));
261
262 ret = regmap_field_write(priv->rm_fields[F_AVG], selector);
263 if (ret)
264 return ret;
265
266 priv->avg_sample = rtq6056_avg_sample_list[selector];
267
268 return 0;
269 }
270
rtq6056_adc_get_sample_freq(struct rtq6056_priv * priv,struct iio_chan_spec const * ch,int * val)271 static int rtq6056_adc_get_sample_freq(struct rtq6056_priv *priv,
272 struct iio_chan_spec const *ch, int *val)
273 {
274 int sample_time;
275
276 if (ch->address == RTQ6056_REG_SHUNTVOLT)
277 sample_time = priv->vshuntct_us;
278 else if (ch->address == RTQ6056_REG_BUSVOLT)
279 sample_time = priv->vbusct_us;
280 else {
281 sample_time = priv->vshuntct_us + priv->vbusct_us;
282 sample_time *= priv->avg_sample;
283 }
284
285 *val = 1000000 / sample_time;
286
287 return IIO_VAL_INT;
288 }
289
rtq6056_adc_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)290 static int rtq6056_adc_read_raw(struct iio_dev *indio_dev,
291 struct iio_chan_spec const *chan, int *val,
292 int *val2, long mask)
293 {
294 struct rtq6056_priv *priv = iio_priv(indio_dev);
295
296 switch (mask) {
297 case IIO_CHAN_INFO_RAW:
298 return rtq6056_adc_read_channel(priv, chan, val);
299 case IIO_CHAN_INFO_SCALE:
300 return rtq6056_adc_read_scale(chan, val, val2);
301 case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
302 *val = priv->avg_sample;
303 return IIO_VAL_INT;
304 case IIO_CHAN_INFO_SAMP_FREQ:
305 return rtq6056_adc_get_sample_freq(priv, chan, val);
306 default:
307 return -EINVAL;
308 }
309 }
310
rtq6056_adc_read_avail(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,const int ** vals,int * type,int * length,long mask)311 static int rtq6056_adc_read_avail(struct iio_dev *indio_dev,
312 struct iio_chan_spec const *chan,
313 const int **vals, int *type, int *length,
314 long mask)
315 {
316 switch (mask) {
317 case IIO_CHAN_INFO_SAMP_FREQ:
318 *vals = rtq6056_samp_freq_list;
319 *type = IIO_VAL_INT;
320 *length = ARRAY_SIZE(rtq6056_samp_freq_list);
321 return IIO_AVAIL_LIST;
322 case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
323 *vals = rtq6056_avg_sample_list;
324 *type = IIO_VAL_INT;
325 *length = ARRAY_SIZE(rtq6056_avg_sample_list);
326 return IIO_AVAIL_LIST;
327 default:
328 return -EINVAL;
329 }
330 }
331
rtq6056_adc_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)332 static int rtq6056_adc_write_raw(struct iio_dev *indio_dev,
333 struct iio_chan_spec const *chan, int val,
334 int val2, long mask)
335 {
336 struct rtq6056_priv *priv = iio_priv(indio_dev);
337 int ret;
338
339 ret = iio_device_claim_direct_mode(indio_dev);
340 if (ret)
341 return ret;
342
343 switch (mask) {
344 case IIO_CHAN_INFO_SAMP_FREQ:
345 ret = rtq6056_adc_set_samp_freq(priv, chan, val);
346 break;
347 case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
348 ret = rtq6056_adc_set_average(priv, val);
349 break;
350 default:
351 ret = -EINVAL;
352 break;
353 }
354
355 iio_device_release_direct_mode(indio_dev);
356
357 return ret;
358 }
359
360 static const char *rtq6056_channel_labels[RTQ6056_MAX_CHANNEL] = {
361 [RTQ6056_CH_VSHUNT] = "Vshunt",
362 [RTQ6056_CH_VBUS] = "Vbus",
363 [RTQ6056_CH_POWER] = "Power",
364 [RTQ6056_CH_CURRENT] = "Current",
365 };
366
rtq6056_adc_read_label(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,char * label)367 static int rtq6056_adc_read_label(struct iio_dev *indio_dev,
368 struct iio_chan_spec const *chan,
369 char *label)
370 {
371 return sysfs_emit(label, "%s\n", rtq6056_channel_labels[chan->channel]);
372 }
373
rtq6056_set_shunt_resistor(struct rtq6056_priv * priv,int resistor_uohm)374 static int rtq6056_set_shunt_resistor(struct rtq6056_priv *priv,
375 int resistor_uohm)
376 {
377 unsigned int calib_val;
378 int ret;
379
380 if (resistor_uohm <= 0) {
381 dev_err(priv->dev, "Invalid resistor [%d]\n", resistor_uohm);
382 return -EINVAL;
383 }
384
385 /* calibration = 5120000 / (Rshunt (uOhm) * current lsb (1mA)) */
386 calib_val = 5120000 / resistor_uohm;
387 ret = regmap_write(priv->regmap, RTQ6056_REG_CALIBRATION, calib_val);
388 if (ret)
389 return ret;
390
391 priv->shunt_resistor_uohm = resistor_uohm;
392
393 return 0;
394 }
395
shunt_resistor_show(struct device * dev,struct device_attribute * attr,char * buf)396 static ssize_t shunt_resistor_show(struct device *dev,
397 struct device_attribute *attr, char *buf)
398 {
399 struct rtq6056_priv *priv = iio_priv(dev_to_iio_dev(dev));
400 int vals[2] = { priv->shunt_resistor_uohm, 1000000 };
401
402 return iio_format_value(buf, IIO_VAL_FRACTIONAL, 1, vals);
403 }
404
shunt_resistor_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)405 static ssize_t shunt_resistor_store(struct device *dev,
406 struct device_attribute *attr,
407 const char *buf, size_t len)
408 {
409 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
410 struct rtq6056_priv *priv = iio_priv(indio_dev);
411 int val, val_fract, ret;
412
413 ret = iio_device_claim_direct_mode(indio_dev);
414 if (ret)
415 return ret;
416
417 ret = iio_str_to_fixpoint(buf, 100000, &val, &val_fract);
418 if (ret)
419 goto out_store;
420
421 ret = rtq6056_set_shunt_resistor(priv, val * 1000000 + val_fract);
422
423 out_store:
424 iio_device_release_direct_mode(indio_dev);
425
426 return ret ?: len;
427 }
428
429 static IIO_DEVICE_ATTR_RW(shunt_resistor, 0);
430
431 static struct attribute *rtq6056_attributes[] = {
432 &iio_dev_attr_shunt_resistor.dev_attr.attr,
433 NULL
434 };
435
436 static const struct attribute_group rtq6056_attribute_group = {
437 .attrs = rtq6056_attributes,
438 };
439
440 static const struct iio_info rtq6056_info = {
441 .attrs = &rtq6056_attribute_group,
442 .read_raw = rtq6056_adc_read_raw,
443 .read_avail = rtq6056_adc_read_avail,
444 .write_raw = rtq6056_adc_write_raw,
445 .read_label = rtq6056_adc_read_label,
446 };
447
rtq6056_buffer_trigger_handler(int irq,void * p)448 static irqreturn_t rtq6056_buffer_trigger_handler(int irq, void *p)
449 {
450 struct iio_poll_func *pf = p;
451 struct iio_dev *indio_dev = pf->indio_dev;
452 struct rtq6056_priv *priv = iio_priv(indio_dev);
453 struct device *dev = priv->dev;
454 struct {
455 u16 vals[RTQ6056_MAX_CHANNEL];
456 s64 timestamp __aligned(8);
457 } data;
458 unsigned int raw;
459 int i = 0, bit, ret;
460
461 memset(&data, 0, sizeof(data));
462
463 pm_runtime_get_sync(dev);
464
465 for_each_set_bit(bit, indio_dev->active_scan_mask, indio_dev->masklength) {
466 unsigned int addr = rtq6056_channels[bit].address;
467
468 ret = regmap_read(priv->regmap, addr, &raw);
469 if (ret)
470 goto out;
471
472 data.vals[i++] = raw;
473 }
474
475 iio_push_to_buffers_with_timestamp(indio_dev, &data, iio_get_time_ns(indio_dev));
476
477 out:
478 pm_runtime_mark_last_busy(dev);
479 pm_runtime_put(dev);
480
481 iio_trigger_notify_done(indio_dev->trig);
482
483 return IRQ_HANDLED;
484 }
485
rtq6056_enter_shutdown_state(void * dev)486 static void rtq6056_enter_shutdown_state(void *dev)
487 {
488 struct rtq6056_priv *priv = dev_get_drvdata(dev);
489
490 /* Enter shutdown state */
491 regmap_field_write(priv->rm_fields[F_OPMODE], 0);
492 }
493
rtq6056_is_readable_reg(struct device * dev,unsigned int reg)494 static bool rtq6056_is_readable_reg(struct device *dev, unsigned int reg)
495 {
496 switch (reg) {
497 case RTQ6056_REG_CONFIG ... RTQ6056_REG_ALERTLIMIT:
498 case RTQ6056_REG_MANUFACTID ... RTQ6056_REG_DIEID:
499 return true;
500 default:
501 return false;
502 }
503 }
504
rtq6056_is_writeable_reg(struct device * dev,unsigned int reg)505 static bool rtq6056_is_writeable_reg(struct device *dev, unsigned int reg)
506 {
507 switch (reg) {
508 case RTQ6056_REG_CONFIG:
509 case RTQ6056_REG_CALIBRATION ... RTQ6056_REG_ALERTLIMIT:
510 return true;
511 default:
512 return false;
513 }
514 }
515
516 static const struct regmap_config rtq6056_regmap_config = {
517 .reg_bits = 8,
518 .val_bits = 16,
519 .val_format_endian = REGMAP_ENDIAN_BIG,
520 .max_register = RTQ6056_REG_DIEID,
521 .readable_reg = rtq6056_is_readable_reg,
522 .writeable_reg = rtq6056_is_writeable_reg,
523 };
524
rtq6056_probe(struct i2c_client * i2c)525 static int rtq6056_probe(struct i2c_client *i2c)
526 {
527 struct iio_dev *indio_dev;
528 struct rtq6056_priv *priv;
529 struct device *dev = &i2c->dev;
530 struct regmap *regmap;
531 unsigned int vendor_id, shunt_resistor_uohm;
532 int ret;
533
534 if (!i2c_check_functionality(i2c->adapter, I2C_FUNC_SMBUS_WORD_DATA))
535 return -EOPNOTSUPP;
536
537 indio_dev = devm_iio_device_alloc(dev, sizeof(*priv));
538 if (!indio_dev)
539 return -ENOMEM;
540
541 priv = iio_priv(indio_dev);
542 priv->dev = dev;
543 priv->vshuntct_us = priv->vbusct_us = 1037;
544 priv->avg_sample = 1;
545 i2c_set_clientdata(i2c, priv);
546
547 regmap = devm_regmap_init_i2c(i2c, &rtq6056_regmap_config);
548 if (IS_ERR(regmap))
549 return dev_err_probe(dev, PTR_ERR(regmap),
550 "Failed to init regmap\n");
551
552 priv->regmap = regmap;
553
554 ret = regmap_read(regmap, RTQ6056_REG_MANUFACTID, &vendor_id);
555 if (ret)
556 return dev_err_probe(dev, ret,
557 "Failed to get manufacturer info\n");
558
559 if (vendor_id != RTQ6056_VENDOR_ID)
560 return dev_err_probe(dev, -ENODEV,
561 "Invalid vendor id 0x%04x\n", vendor_id);
562
563 ret = devm_regmap_field_bulk_alloc(dev, regmap, priv->rm_fields,
564 rtq6056_reg_fields, F_MAX_FIELDS);
565 if (ret)
566 return dev_err_probe(dev, ret, "Failed to init regmap field\n");
567
568 /*
569 * By default, configure average sample as 1, bus and shunt conversion
570 * time as 1037 microsecond, and operating mode to all on.
571 */
572 ret = regmap_write(regmap, RTQ6056_REG_CONFIG, RTQ6056_DEFAULT_CONFIG);
573 if (ret)
574 return dev_err_probe(dev, ret,
575 "Failed to enable continuous sensing\n");
576
577 ret = devm_add_action_or_reset(dev, rtq6056_enter_shutdown_state, dev);
578 if (ret)
579 return ret;
580
581 pm_runtime_set_autosuspend_delay(dev, MSEC_PER_SEC);
582 pm_runtime_use_autosuspend(dev);
583 pm_runtime_set_active(dev);
584 pm_runtime_mark_last_busy(dev);
585 ret = devm_pm_runtime_enable(dev);
586 if (ret)
587 return dev_err_probe(dev, ret, "Failed to enable pm_runtime\n");
588
589 /* By default, use 2000 micro-Ohm resistor */
590 shunt_resistor_uohm = 2000;
591 device_property_read_u32(dev, "shunt-resistor-micro-ohms",
592 &shunt_resistor_uohm);
593
594 ret = rtq6056_set_shunt_resistor(priv, shunt_resistor_uohm);
595 if (ret)
596 return dev_err_probe(dev, ret,
597 "Failed to init shunt resistor\n");
598
599 indio_dev->name = "rtq6056";
600 indio_dev->modes = INDIO_DIRECT_MODE;
601 indio_dev->channels = rtq6056_channels;
602 indio_dev->num_channels = ARRAY_SIZE(rtq6056_channels);
603 indio_dev->info = &rtq6056_info;
604
605 ret = devm_iio_triggered_buffer_setup(dev, indio_dev, NULL,
606 rtq6056_buffer_trigger_handler,
607 NULL);
608 if (ret)
609 return dev_err_probe(dev, ret,
610 "Failed to allocate iio trigger buffer\n");
611
612 return devm_iio_device_register(dev, indio_dev);
613 }
614
rtq6056_runtime_suspend(struct device * dev)615 static int rtq6056_runtime_suspend(struct device *dev)
616 {
617 struct rtq6056_priv *priv = dev_get_drvdata(dev);
618
619 /* Configure to shutdown mode */
620 return regmap_field_write(priv->rm_fields[F_OPMODE], 0);
621 }
622
rtq6056_runtime_resume(struct device * dev)623 static int rtq6056_runtime_resume(struct device *dev)
624 {
625 struct rtq6056_priv *priv = dev_get_drvdata(dev);
626 int sample_rdy_time_us, ret;
627
628 ret = regmap_field_write(priv->rm_fields[F_OPMODE], RTQ6056_CONT_ALLON);
629 if (ret)
630 return ret;
631
632 sample_rdy_time_us = priv->vbusct_us + priv->vshuntct_us;
633 sample_rdy_time_us *= priv->avg_sample;
634
635 usleep_range(sample_rdy_time_us, sample_rdy_time_us + 100);
636
637 return 0;
638 }
639
640 static DEFINE_RUNTIME_DEV_PM_OPS(rtq6056_pm_ops, rtq6056_runtime_suspend,
641 rtq6056_runtime_resume, NULL);
642
643 static const struct of_device_id rtq6056_device_match[] = {
644 { .compatible = "richtek,rtq6056" },
645 {}
646 };
647 MODULE_DEVICE_TABLE(of, rtq6056_device_match);
648
649 static struct i2c_driver rtq6056_driver = {
650 .driver = {
651 .name = "rtq6056",
652 .of_match_table = rtq6056_device_match,
653 .pm = pm_ptr(&rtq6056_pm_ops),
654 },
655 .probe = rtq6056_probe,
656 };
657 module_i2c_driver(rtq6056_driver);
658
659 MODULE_AUTHOR("ChiYuan Huang <cy_huang@richtek.com>");
660 MODULE_DESCRIPTION("Richtek RTQ6056 Driver");
661 MODULE_LICENSE("GPL v2");
662
