1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /*
3  * Copyright 2020-2021 Advanced Micro Devices, Inc.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice shall be included in
13  * all copies or substantial portions of the Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21  * OTHER DEALINGS IN THE SOFTWARE.
22  */
23 
24 #include <linux/types.h>
25 #include <linux/sched/task.h>
26 #include <linux/dynamic_debug.h>
27 #include <drm/ttm/ttm_tt.h>
28 #include <drm/drm_exec.h>
29 
30 #include "amdgpu_sync.h"
31 #include "amdgpu_object.h"
32 #include "amdgpu_vm.h"
33 #include "amdgpu_hmm.h"
34 #include "amdgpu.h"
35 #include "amdgpu_xgmi.h"
36 #include "kfd_priv.h"
37 #include "kfd_svm.h"
38 #include "kfd_migrate.h"
39 #include "kfd_smi_events.h"
40 
41 #ifdef dev_fmt
42 #undef dev_fmt
43 #endif
44 #define dev_fmt(fmt) "kfd_svm: %s: " fmt, __func__
45 
46 #define AMDGPU_SVM_RANGE_RESTORE_DELAY_MS 1
47 
48 /* Long enough to ensure no retry fault comes after svm range is restored and
49  * page table is updated.
50  */
51 #define AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING	(2UL * NSEC_PER_MSEC)
52 #if IS_ENABLED(CONFIG_DYNAMIC_DEBUG)
53 #define dynamic_svm_range_dump(svms) \
54 	_dynamic_func_call_no_desc("svm_range_dump", svm_range_debug_dump, svms)
55 #else
56 #define dynamic_svm_range_dump(svms) \
57 	do { if (0) svm_range_debug_dump(svms); } while (0)
58 #endif
59 
60 /* Giant svm range split into smaller ranges based on this, it is decided using
61  * minimum of all dGPU/APU 1/32 VRAM size, between 2MB to 1GB and alignment to
62  * power of 2MB.
63  */
64 static uint64_t max_svm_range_pages;
65 
66 struct criu_svm_metadata {
67 	struct list_head list;
68 	struct kfd_criu_svm_range_priv_data data;
69 };
70 
71 static void svm_range_evict_svm_bo_worker(struct work_struct *work);
72 static bool
73 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni,
74 				    const struct mmu_notifier_range *range,
75 				    unsigned long cur_seq);
76 static int
77 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last,
78 		   uint64_t *bo_s, uint64_t *bo_l);
79 static const struct mmu_interval_notifier_ops svm_range_mn_ops = {
80 	.invalidate = svm_range_cpu_invalidate_pagetables,
81 };
82 
83 /**
84  * svm_range_unlink - unlink svm_range from lists and interval tree
85  * @prange: svm range structure to be removed
86  *
87  * Remove the svm_range from the svms and svm_bo lists and the svms
88  * interval tree.
89  *
90  * Context: The caller must hold svms->lock
91  */
svm_range_unlink(struct svm_range * prange)92 static void svm_range_unlink(struct svm_range *prange)
93 {
94 	pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms,
95 		 prange, prange->start, prange->last);
96 
97 	if (prange->svm_bo) {
98 		spin_lock(&prange->svm_bo->list_lock);
99 		list_del(&prange->svm_bo_list);
100 		spin_unlock(&prange->svm_bo->list_lock);
101 	}
102 
103 	list_del(&prange->list);
104 	if (prange->it_node.start != 0 && prange->it_node.last != 0)
105 		interval_tree_remove(&prange->it_node, &prange->svms->objects);
106 }
107 
108 static void
svm_range_add_notifier_locked(struct mm_struct * mm,struct svm_range * prange)109 svm_range_add_notifier_locked(struct mm_struct *mm, struct svm_range *prange)
110 {
111 	pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms,
112 		 prange, prange->start, prange->last);
113 
114 	mmu_interval_notifier_insert_locked(&prange->notifier, mm,
115 				     prange->start << PAGE_SHIFT,
116 				     prange->npages << PAGE_SHIFT,
117 				     &svm_range_mn_ops);
118 }
119 
120 /**
121  * svm_range_add_to_svms - add svm range to svms
122  * @prange: svm range structure to be added
123  *
124  * Add the svm range to svms interval tree and link list
125  *
126  * Context: The caller must hold svms->lock
127  */
svm_range_add_to_svms(struct svm_range * prange)128 static void svm_range_add_to_svms(struct svm_range *prange)
129 {
130 	pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms,
131 		 prange, prange->start, prange->last);
132 
133 	list_move_tail(&prange->list, &prange->svms->list);
134 	prange->it_node.start = prange->start;
135 	prange->it_node.last = prange->last;
136 	interval_tree_insert(&prange->it_node, &prange->svms->objects);
137 }
138 
svm_range_remove_notifier(struct svm_range * prange)139 static void svm_range_remove_notifier(struct svm_range *prange)
140 {
141 	pr_debug("remove notifier svms 0x%p prange 0x%p [0x%lx 0x%lx]\n",
142 		 prange->svms, prange,
143 		 prange->notifier.interval_tree.start >> PAGE_SHIFT,
144 		 prange->notifier.interval_tree.last >> PAGE_SHIFT);
145 
146 	if (prange->notifier.interval_tree.start != 0 &&
147 	    prange->notifier.interval_tree.last != 0)
148 		mmu_interval_notifier_remove(&prange->notifier);
149 }
150 
151 static bool
svm_is_valid_dma_mapping_addr(struct device * dev,dma_addr_t dma_addr)152 svm_is_valid_dma_mapping_addr(struct device *dev, dma_addr_t dma_addr)
153 {
154 	return dma_addr && !dma_mapping_error(dev, dma_addr) &&
155 	       !(dma_addr & SVM_RANGE_VRAM_DOMAIN);
156 }
157 
158 static int
svm_range_dma_map_dev(struct amdgpu_device * adev,struct svm_range * prange,unsigned long offset,unsigned long npages,unsigned long * hmm_pfns,uint32_t gpuidx)159 svm_range_dma_map_dev(struct amdgpu_device *adev, struct svm_range *prange,
160 		      unsigned long offset, unsigned long npages,
161 		      unsigned long *hmm_pfns, uint32_t gpuidx)
162 {
163 	enum dma_data_direction dir = DMA_BIDIRECTIONAL;
164 	dma_addr_t *addr = prange->dma_addr[gpuidx];
165 	struct device *dev = adev->dev;
166 	struct page *page;
167 	int i, r;
168 
169 	if (!addr) {
170 		addr = kvcalloc(prange->npages, sizeof(*addr), GFP_KERNEL);
171 		if (!addr)
172 			return -ENOMEM;
173 		prange->dma_addr[gpuidx] = addr;
174 	}
175 
176 	addr += offset;
177 	for (i = 0; i < npages; i++) {
178 		if (svm_is_valid_dma_mapping_addr(dev, addr[i]))
179 			dma_unmap_page(dev, addr[i], PAGE_SIZE, dir);
180 
181 		page = hmm_pfn_to_page(hmm_pfns[i]);
182 		if (is_zone_device_page(page)) {
183 			struct amdgpu_device *bo_adev = prange->svm_bo->node->adev;
184 
185 			addr[i] = (hmm_pfns[i] << PAGE_SHIFT) +
186 				   bo_adev->vm_manager.vram_base_offset -
187 				   bo_adev->kfd.pgmap.range.start;
188 			addr[i] |= SVM_RANGE_VRAM_DOMAIN;
189 			pr_debug_ratelimited("vram address: 0x%llx\n", addr[i]);
190 			continue;
191 		}
192 		addr[i] = dma_map_page(dev, page, 0, PAGE_SIZE, dir);
193 		r = dma_mapping_error(dev, addr[i]);
194 		if (r) {
195 			dev_err(dev, "failed %d dma_map_page\n", r);
196 			return r;
197 		}
198 		pr_debug_ratelimited("dma mapping 0x%llx for page addr 0x%lx\n",
199 				     addr[i] >> PAGE_SHIFT, page_to_pfn(page));
200 	}
201 	return 0;
202 }
203 
204 static int
svm_range_dma_map(struct svm_range * prange,unsigned long * bitmap,unsigned long offset,unsigned long npages,unsigned long * hmm_pfns)205 svm_range_dma_map(struct svm_range *prange, unsigned long *bitmap,
206 		  unsigned long offset, unsigned long npages,
207 		  unsigned long *hmm_pfns)
208 {
209 	struct kfd_process *p;
210 	uint32_t gpuidx;
211 	int r;
212 
213 	p = container_of(prange->svms, struct kfd_process, svms);
214 
215 	for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) {
216 		struct kfd_process_device *pdd;
217 
218 		pr_debug("mapping to gpu idx 0x%x\n", gpuidx);
219 		pdd = kfd_process_device_from_gpuidx(p, gpuidx);
220 		if (!pdd) {
221 			pr_debug("failed to find device idx %d\n", gpuidx);
222 			return -EINVAL;
223 		}
224 
225 		r = svm_range_dma_map_dev(pdd->dev->adev, prange, offset, npages,
226 					  hmm_pfns, gpuidx);
227 		if (r)
228 			break;
229 	}
230 
231 	return r;
232 }
233 
svm_range_dma_unmap(struct device * dev,dma_addr_t * dma_addr,unsigned long offset,unsigned long npages)234 void svm_range_dma_unmap(struct device *dev, dma_addr_t *dma_addr,
235 			 unsigned long offset, unsigned long npages)
236 {
237 	enum dma_data_direction dir = DMA_BIDIRECTIONAL;
238 	int i;
239 
240 	if (!dma_addr)
241 		return;
242 
243 	for (i = offset; i < offset + npages; i++) {
244 		if (!svm_is_valid_dma_mapping_addr(dev, dma_addr[i]))
245 			continue;
246 		pr_debug_ratelimited("unmap 0x%llx\n", dma_addr[i] >> PAGE_SHIFT);
247 		dma_unmap_page(dev, dma_addr[i], PAGE_SIZE, dir);
248 		dma_addr[i] = 0;
249 	}
250 }
251 
svm_range_free_dma_mappings(struct svm_range * prange,bool unmap_dma)252 void svm_range_free_dma_mappings(struct svm_range *prange, bool unmap_dma)
253 {
254 	struct kfd_process_device *pdd;
255 	dma_addr_t *dma_addr;
256 	struct device *dev;
257 	struct kfd_process *p;
258 	uint32_t gpuidx;
259 
260 	p = container_of(prange->svms, struct kfd_process, svms);
261 
262 	for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) {
263 		dma_addr = prange->dma_addr[gpuidx];
264 		if (!dma_addr)
265 			continue;
266 
267 		pdd = kfd_process_device_from_gpuidx(p, gpuidx);
268 		if (!pdd) {
269 			pr_debug("failed to find device idx %d\n", gpuidx);
270 			continue;
271 		}
272 		dev = &pdd->dev->adev->pdev->dev;
273 		if (unmap_dma)
274 			svm_range_dma_unmap(dev, dma_addr, 0, prange->npages);
275 		kvfree(dma_addr);
276 		prange->dma_addr[gpuidx] = NULL;
277 	}
278 }
279 
svm_range_free(struct svm_range * prange,bool do_unmap)280 static void svm_range_free(struct svm_range *prange, bool do_unmap)
281 {
282 	uint64_t size = (prange->last - prange->start + 1) << PAGE_SHIFT;
283 	struct kfd_process *p = container_of(prange->svms, struct kfd_process, svms);
284 
285 	pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, prange,
286 		 prange->start, prange->last);
287 
288 	svm_range_vram_node_free(prange);
289 	svm_range_free_dma_mappings(prange, do_unmap);
290 
291 	if (do_unmap && !p->xnack_enabled) {
292 		pr_debug("unreserve prange 0x%p size: 0x%llx\n", prange, size);
293 		amdgpu_amdkfd_unreserve_mem_limit(NULL, size,
294 					KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0);
295 	}
296 	mutex_destroy(&prange->lock);
297 	mutex_destroy(&prange->migrate_mutex);
298 	kfree(prange);
299 }
300 
301 static void
svm_range_set_default_attributes(int32_t * location,int32_t * prefetch_loc,uint8_t * granularity,uint32_t * flags)302 svm_range_set_default_attributes(int32_t *location, int32_t *prefetch_loc,
303 				 uint8_t *granularity, uint32_t *flags)
304 {
305 	*location = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
306 	*prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
307 	*granularity = 9;
308 	*flags =
309 		KFD_IOCTL_SVM_FLAG_HOST_ACCESS | KFD_IOCTL_SVM_FLAG_COHERENT;
310 }
311 
312 static struct
svm_range_new(struct svm_range_list * svms,uint64_t start,uint64_t last,bool update_mem_usage)313 svm_range *svm_range_new(struct svm_range_list *svms, uint64_t start,
314 			 uint64_t last, bool update_mem_usage)
315 {
316 	uint64_t size = last - start + 1;
317 	struct svm_range *prange;
318 	struct kfd_process *p;
319 
320 	prange = kzalloc(sizeof(*prange), GFP_KERNEL);
321 	if (!prange)
322 		return NULL;
323 
324 	p = container_of(svms, struct kfd_process, svms);
325 	if (!p->xnack_enabled && update_mem_usage &&
326 	    amdgpu_amdkfd_reserve_mem_limit(NULL, size << PAGE_SHIFT,
327 				    KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0)) {
328 		pr_info("SVM mapping failed, exceeds resident system memory limit\n");
329 		kfree(prange);
330 		return NULL;
331 	}
332 	prange->npages = size;
333 	prange->svms = svms;
334 	prange->start = start;
335 	prange->last = last;
336 	INIT_LIST_HEAD(&prange->list);
337 	INIT_LIST_HEAD(&prange->update_list);
338 	INIT_LIST_HEAD(&prange->svm_bo_list);
339 	INIT_LIST_HEAD(&prange->deferred_list);
340 	INIT_LIST_HEAD(&prange->child_list);
341 	atomic_set(&prange->invalid, 0);
342 	prange->validate_timestamp = 0;
343 	mutex_init(&prange->migrate_mutex);
344 	mutex_init(&prange->lock);
345 
346 	if (p->xnack_enabled)
347 		bitmap_copy(prange->bitmap_access, svms->bitmap_supported,
348 			    MAX_GPU_INSTANCE);
349 
350 	svm_range_set_default_attributes(&prange->preferred_loc,
351 					 &prange->prefetch_loc,
352 					 &prange->granularity, &prange->flags);
353 
354 	pr_debug("svms 0x%p [0x%llx 0x%llx]\n", svms, start, last);
355 
356 	return prange;
357 }
358 
svm_bo_ref_unless_zero(struct svm_range_bo * svm_bo)359 static bool svm_bo_ref_unless_zero(struct svm_range_bo *svm_bo)
360 {
361 	if (!svm_bo || !kref_get_unless_zero(&svm_bo->kref))
362 		return false;
363 
364 	return true;
365 }
366 
svm_range_bo_release(struct kref * kref)367 static void svm_range_bo_release(struct kref *kref)
368 {
369 	struct svm_range_bo *svm_bo;
370 
371 	svm_bo = container_of(kref, struct svm_range_bo, kref);
372 	pr_debug("svm_bo 0x%p\n", svm_bo);
373 
374 	spin_lock(&svm_bo->list_lock);
375 	while (!list_empty(&svm_bo->range_list)) {
376 		struct svm_range *prange =
377 				list_first_entry(&svm_bo->range_list,
378 						struct svm_range, svm_bo_list);
379 		/* list_del_init tells a concurrent svm_range_vram_node_new when
380 		 * it's safe to reuse the svm_bo pointer and svm_bo_list head.
381 		 */
382 		list_del_init(&prange->svm_bo_list);
383 		spin_unlock(&svm_bo->list_lock);
384 
385 		pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms,
386 			 prange->start, prange->last);
387 		mutex_lock(&prange->lock);
388 		prange->svm_bo = NULL;
389 		mutex_unlock(&prange->lock);
390 
391 		spin_lock(&svm_bo->list_lock);
392 	}
393 	spin_unlock(&svm_bo->list_lock);
394 	if (!dma_fence_is_signaled(&svm_bo->eviction_fence->base)) {
395 		/* We're not in the eviction worker.
396 		 * Signal the fence and synchronize with any
397 		 * pending eviction work.
398 		 */
399 		dma_fence_signal(&svm_bo->eviction_fence->base);
400 		cancel_work_sync(&svm_bo->eviction_work);
401 	}
402 	dma_fence_put(&svm_bo->eviction_fence->base);
403 	amdgpu_bo_unref(&svm_bo->bo);
404 	kfree(svm_bo);
405 }
406 
svm_range_bo_wq_release(struct work_struct * work)407 static void svm_range_bo_wq_release(struct work_struct *work)
408 {
409 	struct svm_range_bo *svm_bo;
410 
411 	svm_bo = container_of(work, struct svm_range_bo, release_work);
412 	svm_range_bo_release(&svm_bo->kref);
413 }
414 
svm_range_bo_release_async(struct kref * kref)415 static void svm_range_bo_release_async(struct kref *kref)
416 {
417 	struct svm_range_bo *svm_bo;
418 
419 	svm_bo = container_of(kref, struct svm_range_bo, kref);
420 	pr_debug("svm_bo 0x%p\n", svm_bo);
421 	INIT_WORK(&svm_bo->release_work, svm_range_bo_wq_release);
422 	schedule_work(&svm_bo->release_work);
423 }
424 
svm_range_bo_unref_async(struct svm_range_bo * svm_bo)425 void svm_range_bo_unref_async(struct svm_range_bo *svm_bo)
426 {
427 	kref_put(&svm_bo->kref, svm_range_bo_release_async);
428 }
429 
svm_range_bo_unref(struct svm_range_bo * svm_bo)430 static void svm_range_bo_unref(struct svm_range_bo *svm_bo)
431 {
432 	if (svm_bo)
433 		kref_put(&svm_bo->kref, svm_range_bo_release);
434 }
435 
436 static bool
svm_range_validate_svm_bo(struct kfd_node * node,struct svm_range * prange)437 svm_range_validate_svm_bo(struct kfd_node *node, struct svm_range *prange)
438 {
439 	mutex_lock(&prange->lock);
440 	if (!prange->svm_bo) {
441 		mutex_unlock(&prange->lock);
442 		return false;
443 	}
444 	if (prange->ttm_res) {
445 		/* We still have a reference, all is well */
446 		mutex_unlock(&prange->lock);
447 		return true;
448 	}
449 	if (svm_bo_ref_unless_zero(prange->svm_bo)) {
450 		/*
451 		 * Migrate from GPU to GPU, remove range from source svm_bo->node
452 		 * range list, and return false to allocate svm_bo from destination
453 		 * node.
454 		 */
455 		if (prange->svm_bo->node != node) {
456 			mutex_unlock(&prange->lock);
457 
458 			spin_lock(&prange->svm_bo->list_lock);
459 			list_del_init(&prange->svm_bo_list);
460 			spin_unlock(&prange->svm_bo->list_lock);
461 
462 			svm_range_bo_unref(prange->svm_bo);
463 			return false;
464 		}
465 		if (READ_ONCE(prange->svm_bo->evicting)) {
466 			struct dma_fence *f;
467 			struct svm_range_bo *svm_bo;
468 			/* The BO is getting evicted,
469 			 * we need to get a new one
470 			 */
471 			mutex_unlock(&prange->lock);
472 			svm_bo = prange->svm_bo;
473 			f = dma_fence_get(&svm_bo->eviction_fence->base);
474 			svm_range_bo_unref(prange->svm_bo);
475 			/* wait for the fence to avoid long spin-loop
476 			 * at list_empty_careful
477 			 */
478 			dma_fence_wait(f, false);
479 			dma_fence_put(f);
480 		} else {
481 			/* The BO was still around and we got
482 			 * a new reference to it
483 			 */
484 			mutex_unlock(&prange->lock);
485 			pr_debug("reuse old bo svms 0x%p [0x%lx 0x%lx]\n",
486 				 prange->svms, prange->start, prange->last);
487 
488 			prange->ttm_res = prange->svm_bo->bo->tbo.resource;
489 			return true;
490 		}
491 
492 	} else {
493 		mutex_unlock(&prange->lock);
494 	}
495 
496 	/* We need a new svm_bo. Spin-loop to wait for concurrent
497 	 * svm_range_bo_release to finish removing this range from
498 	 * its range list. After this, it is safe to reuse the
499 	 * svm_bo pointer and svm_bo_list head.
500 	 */
501 	while (!list_empty_careful(&prange->svm_bo_list))
502 		;
503 
504 	return false;
505 }
506 
svm_range_bo_new(void)507 static struct svm_range_bo *svm_range_bo_new(void)
508 {
509 	struct svm_range_bo *svm_bo;
510 
511 	svm_bo = kzalloc(sizeof(*svm_bo), GFP_KERNEL);
512 	if (!svm_bo)
513 		return NULL;
514 
515 	kref_init(&svm_bo->kref);
516 	INIT_LIST_HEAD(&svm_bo->range_list);
517 	spin_lock_init(&svm_bo->list_lock);
518 
519 	return svm_bo;
520 }
521 
522 int
svm_range_vram_node_new(struct kfd_node * node,struct svm_range * prange,bool clear)523 svm_range_vram_node_new(struct kfd_node *node, struct svm_range *prange,
524 			bool clear)
525 {
526 	struct amdgpu_bo_param bp;
527 	struct svm_range_bo *svm_bo;
528 	struct amdgpu_bo_user *ubo;
529 	struct amdgpu_bo *bo;
530 	struct kfd_process *p;
531 	struct mm_struct *mm;
532 	int r;
533 
534 	p = container_of(prange->svms, struct kfd_process, svms);
535 	pr_debug("pasid: %x svms 0x%p [0x%lx 0x%lx]\n", p->pasid, prange->svms,
536 		 prange->start, prange->last);
537 
538 	if (svm_range_validate_svm_bo(node, prange))
539 		return 0;
540 
541 	svm_bo = svm_range_bo_new();
542 	if (!svm_bo) {
543 		pr_debug("failed to alloc svm bo\n");
544 		return -ENOMEM;
545 	}
546 	mm = get_task_mm(p->lead_thread);
547 	if (!mm) {
548 		pr_debug("failed to get mm\n");
549 		kfree(svm_bo);
550 		return -ESRCH;
551 	}
552 	svm_bo->node = node;
553 	svm_bo->eviction_fence =
554 		amdgpu_amdkfd_fence_create(dma_fence_context_alloc(1),
555 					   mm,
556 					   svm_bo);
557 	mmput(mm);
558 	INIT_WORK(&svm_bo->eviction_work, svm_range_evict_svm_bo_worker);
559 	svm_bo->evicting = 0;
560 	memset(&bp, 0, sizeof(bp));
561 	bp.size = prange->npages * PAGE_SIZE;
562 	bp.byte_align = PAGE_SIZE;
563 	bp.domain = AMDGPU_GEM_DOMAIN_VRAM;
564 	bp.flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS;
565 	bp.flags |= clear ? AMDGPU_GEM_CREATE_VRAM_CLEARED : 0;
566 	bp.flags |= AMDGPU_GEM_CREATE_DISCARDABLE;
567 	bp.type = ttm_bo_type_device;
568 	bp.resv = NULL;
569 	if (node->xcp)
570 		bp.xcp_id_plus1 = node->xcp->id + 1;
571 
572 	r = amdgpu_bo_create_user(node->adev, &bp, &ubo);
573 	if (r) {
574 		pr_debug("failed %d to create bo\n", r);
575 		goto create_bo_failed;
576 	}
577 	bo = &ubo->bo;
578 
579 	pr_debug("alloc bo at offset 0x%lx size 0x%lx on partition %d\n",
580 		 bo->tbo.resource->start << PAGE_SHIFT, bp.size,
581 		 bp.xcp_id_plus1 - 1);
582 
583 	r = amdgpu_bo_reserve(bo, true);
584 	if (r) {
585 		pr_debug("failed %d to reserve bo\n", r);
586 		goto reserve_bo_failed;
587 	}
588 
589 	if (clear) {
590 		r = amdgpu_bo_sync_wait(bo, AMDGPU_FENCE_OWNER_KFD, false);
591 		if (r) {
592 			pr_debug("failed %d to sync bo\n", r);
593 			amdgpu_bo_unreserve(bo);
594 			goto reserve_bo_failed;
595 		}
596 	}
597 
598 	r = dma_resv_reserve_fences(bo->tbo.base.resv, 1);
599 	if (r) {
600 		pr_debug("failed %d to reserve bo\n", r);
601 		amdgpu_bo_unreserve(bo);
602 		goto reserve_bo_failed;
603 	}
604 	amdgpu_bo_fence(bo, &svm_bo->eviction_fence->base, true);
605 
606 	amdgpu_bo_unreserve(bo);
607 
608 	svm_bo->bo = bo;
609 	prange->svm_bo = svm_bo;
610 	prange->ttm_res = bo->tbo.resource;
611 	prange->offset = 0;
612 
613 	spin_lock(&svm_bo->list_lock);
614 	list_add(&prange->svm_bo_list, &svm_bo->range_list);
615 	spin_unlock(&svm_bo->list_lock);
616 
617 	return 0;
618 
619 reserve_bo_failed:
620 	amdgpu_bo_unref(&bo);
621 create_bo_failed:
622 	dma_fence_put(&svm_bo->eviction_fence->base);
623 	kfree(svm_bo);
624 	prange->ttm_res = NULL;
625 
626 	return r;
627 }
628 
svm_range_vram_node_free(struct svm_range * prange)629 void svm_range_vram_node_free(struct svm_range *prange)
630 {
631 	svm_range_bo_unref(prange->svm_bo);
632 	prange->ttm_res = NULL;
633 }
634 
635 struct kfd_node *
svm_range_get_node_by_id(struct svm_range * prange,uint32_t gpu_id)636 svm_range_get_node_by_id(struct svm_range *prange, uint32_t gpu_id)
637 {
638 	struct kfd_process *p;
639 	struct kfd_process_device *pdd;
640 
641 	p = container_of(prange->svms, struct kfd_process, svms);
642 	pdd = kfd_process_device_data_by_id(p, gpu_id);
643 	if (!pdd) {
644 		pr_debug("failed to get kfd process device by id 0x%x\n", gpu_id);
645 		return NULL;
646 	}
647 
648 	return pdd->dev;
649 }
650 
651 struct kfd_process_device *
svm_range_get_pdd_by_node(struct svm_range * prange,struct kfd_node * node)652 svm_range_get_pdd_by_node(struct svm_range *prange, struct kfd_node *node)
653 {
654 	struct kfd_process *p;
655 
656 	p = container_of(prange->svms, struct kfd_process, svms);
657 
658 	return kfd_get_process_device_data(node, p);
659 }
660 
svm_range_bo_validate(void * param,struct amdgpu_bo * bo)661 static int svm_range_bo_validate(void *param, struct amdgpu_bo *bo)
662 {
663 	struct ttm_operation_ctx ctx = { false, false };
664 
665 	amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM);
666 
667 	return ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
668 }
669 
670 static int
svm_range_check_attr(struct kfd_process * p,uint32_t nattr,struct kfd_ioctl_svm_attribute * attrs)671 svm_range_check_attr(struct kfd_process *p,
672 		     uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs)
673 {
674 	uint32_t i;
675 
676 	for (i = 0; i < nattr; i++) {
677 		uint32_t val = attrs[i].value;
678 		int gpuidx = MAX_GPU_INSTANCE;
679 
680 		switch (attrs[i].type) {
681 		case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC:
682 			if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM &&
683 			    val != KFD_IOCTL_SVM_LOCATION_UNDEFINED)
684 				gpuidx = kfd_process_gpuidx_from_gpuid(p, val);
685 			break;
686 		case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
687 			if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM)
688 				gpuidx = kfd_process_gpuidx_from_gpuid(p, val);
689 			break;
690 		case KFD_IOCTL_SVM_ATTR_ACCESS:
691 		case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE:
692 		case KFD_IOCTL_SVM_ATTR_NO_ACCESS:
693 			gpuidx = kfd_process_gpuidx_from_gpuid(p, val);
694 			break;
695 		case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
696 			break;
697 		case KFD_IOCTL_SVM_ATTR_CLR_FLAGS:
698 			break;
699 		case KFD_IOCTL_SVM_ATTR_GRANULARITY:
700 			break;
701 		default:
702 			pr_debug("unknown attr type 0x%x\n", attrs[i].type);
703 			return -EINVAL;
704 		}
705 
706 		if (gpuidx < 0) {
707 			pr_debug("no GPU 0x%x found\n", val);
708 			return -EINVAL;
709 		} else if (gpuidx < MAX_GPU_INSTANCE &&
710 			   !test_bit(gpuidx, p->svms.bitmap_supported)) {
711 			pr_debug("GPU 0x%x not supported\n", val);
712 			return -EINVAL;
713 		}
714 	}
715 
716 	return 0;
717 }
718 
719 static void
svm_range_apply_attrs(struct kfd_process * p,struct svm_range * prange,uint32_t nattr,struct kfd_ioctl_svm_attribute * attrs,bool * update_mapping)720 svm_range_apply_attrs(struct kfd_process *p, struct svm_range *prange,
721 		      uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs,
722 		      bool *update_mapping)
723 {
724 	uint32_t i;
725 	int gpuidx;
726 
727 	for (i = 0; i < nattr; i++) {
728 		switch (attrs[i].type) {
729 		case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC:
730 			prange->preferred_loc = attrs[i].value;
731 			break;
732 		case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
733 			prange->prefetch_loc = attrs[i].value;
734 			break;
735 		case KFD_IOCTL_SVM_ATTR_ACCESS:
736 		case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE:
737 		case KFD_IOCTL_SVM_ATTR_NO_ACCESS:
738 			if (!p->xnack_enabled)
739 				*update_mapping = true;
740 
741 			gpuidx = kfd_process_gpuidx_from_gpuid(p,
742 							       attrs[i].value);
743 			if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) {
744 				bitmap_clear(prange->bitmap_access, gpuidx, 1);
745 				bitmap_clear(prange->bitmap_aip, gpuidx, 1);
746 			} else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) {
747 				bitmap_set(prange->bitmap_access, gpuidx, 1);
748 				bitmap_clear(prange->bitmap_aip, gpuidx, 1);
749 			} else {
750 				bitmap_clear(prange->bitmap_access, gpuidx, 1);
751 				bitmap_set(prange->bitmap_aip, gpuidx, 1);
752 			}
753 			break;
754 		case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
755 			*update_mapping = true;
756 			prange->flags |= attrs[i].value;
757 			break;
758 		case KFD_IOCTL_SVM_ATTR_CLR_FLAGS:
759 			*update_mapping = true;
760 			prange->flags &= ~attrs[i].value;
761 			break;
762 		case KFD_IOCTL_SVM_ATTR_GRANULARITY:
763 			prange->granularity = attrs[i].value;
764 			break;
765 		default:
766 			WARN_ONCE(1, "svm_range_check_attrs wasn't called?");
767 		}
768 	}
769 }
770 
771 static bool
svm_range_is_same_attrs(struct kfd_process * p,struct svm_range * prange,uint32_t nattr,struct kfd_ioctl_svm_attribute * attrs)772 svm_range_is_same_attrs(struct kfd_process *p, struct svm_range *prange,
773 			uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs)
774 {
775 	uint32_t i;
776 	int gpuidx;
777 
778 	for (i = 0; i < nattr; i++) {
779 		switch (attrs[i].type) {
780 		case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC:
781 			if (prange->preferred_loc != attrs[i].value)
782 				return false;
783 			break;
784 		case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
785 			/* Prefetch should always trigger a migration even
786 			 * if the value of the attribute didn't change.
787 			 */
788 			return false;
789 		case KFD_IOCTL_SVM_ATTR_ACCESS:
790 		case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE:
791 		case KFD_IOCTL_SVM_ATTR_NO_ACCESS:
792 			gpuidx = kfd_process_gpuidx_from_gpuid(p,
793 							       attrs[i].value);
794 			if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) {
795 				if (test_bit(gpuidx, prange->bitmap_access) ||
796 				    test_bit(gpuidx, prange->bitmap_aip))
797 					return false;
798 			} else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) {
799 				if (!test_bit(gpuidx, prange->bitmap_access))
800 					return false;
801 			} else {
802 				if (!test_bit(gpuidx, prange->bitmap_aip))
803 					return false;
804 			}
805 			break;
806 		case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
807 			if ((prange->flags & attrs[i].value) != attrs[i].value)
808 				return false;
809 			break;
810 		case KFD_IOCTL_SVM_ATTR_CLR_FLAGS:
811 			if ((prange->flags & attrs[i].value) != 0)
812 				return false;
813 			break;
814 		case KFD_IOCTL_SVM_ATTR_GRANULARITY:
815 			if (prange->granularity != attrs[i].value)
816 				return false;
817 			break;
818 		default:
819 			WARN_ONCE(1, "svm_range_check_attrs wasn't called?");
820 		}
821 	}
822 
823 	return !prange->is_error_flag;
824 }
825 
826 /**
827  * svm_range_debug_dump - print all range information from svms
828  * @svms: svm range list header
829  *
830  * debug output svm range start, end, prefetch location from svms
831  * interval tree and link list
832  *
833  * Context: The caller must hold svms->lock
834  */
svm_range_debug_dump(struct svm_range_list * svms)835 static void svm_range_debug_dump(struct svm_range_list *svms)
836 {
837 	struct interval_tree_node *node;
838 	struct svm_range *prange;
839 
840 	pr_debug("dump svms 0x%p list\n", svms);
841 	pr_debug("range\tstart\tpage\tend\t\tlocation\n");
842 
843 	list_for_each_entry(prange, &svms->list, list) {
844 		pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n",
845 			 prange, prange->start, prange->npages,
846 			 prange->start + prange->npages - 1,
847 			 prange->actual_loc);
848 	}
849 
850 	pr_debug("dump svms 0x%p interval tree\n", svms);
851 	pr_debug("range\tstart\tpage\tend\t\tlocation\n");
852 	node = interval_tree_iter_first(&svms->objects, 0, ~0ULL);
853 	while (node) {
854 		prange = container_of(node, struct svm_range, it_node);
855 		pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n",
856 			 prange, prange->start, prange->npages,
857 			 prange->start + prange->npages - 1,
858 			 prange->actual_loc);
859 		node = interval_tree_iter_next(node, 0, ~0ULL);
860 	}
861 }
862 
863 static void *
svm_range_copy_array(void * psrc,size_t size,uint64_t num_elements,uint64_t offset)864 svm_range_copy_array(void *psrc, size_t size, uint64_t num_elements,
865 		     uint64_t offset)
866 {
867 	unsigned char *dst;
868 
869 	dst = kvmalloc_array(num_elements, size, GFP_KERNEL);
870 	if (!dst)
871 		return NULL;
872 	memcpy(dst, (unsigned char *)psrc + offset, num_elements * size);
873 
874 	return (void *)dst;
875 }
876 
877 static int
svm_range_copy_dma_addrs(struct svm_range * dst,struct svm_range * src)878 svm_range_copy_dma_addrs(struct svm_range *dst, struct svm_range *src)
879 {
880 	int i;
881 
882 	for (i = 0; i < MAX_GPU_INSTANCE; i++) {
883 		if (!src->dma_addr[i])
884 			continue;
885 		dst->dma_addr[i] = svm_range_copy_array(src->dma_addr[i],
886 					sizeof(*src->dma_addr[i]), src->npages, 0);
887 		if (!dst->dma_addr[i])
888 			return -ENOMEM;
889 	}
890 
891 	return 0;
892 }
893 
894 static int
svm_range_split_array(void * ppnew,void * ppold,size_t size,uint64_t old_start,uint64_t old_n,uint64_t new_start,uint64_t new_n)895 svm_range_split_array(void *ppnew, void *ppold, size_t size,
896 		      uint64_t old_start, uint64_t old_n,
897 		      uint64_t new_start, uint64_t new_n)
898 {
899 	unsigned char *new, *old, *pold;
900 	uint64_t d;
901 
902 	if (!ppold)
903 		return 0;
904 	pold = *(unsigned char **)ppold;
905 	if (!pold)
906 		return 0;
907 
908 	d = (new_start - old_start) * size;
909 	new = svm_range_copy_array(pold, size, new_n, d);
910 	if (!new)
911 		return -ENOMEM;
912 	d = (new_start == old_start) ? new_n * size : 0;
913 	old = svm_range_copy_array(pold, size, old_n, d);
914 	if (!old) {
915 		kvfree(new);
916 		return -ENOMEM;
917 	}
918 	kvfree(pold);
919 	*(void **)ppold = old;
920 	*(void **)ppnew = new;
921 
922 	return 0;
923 }
924 
925 static int
svm_range_split_pages(struct svm_range * new,struct svm_range * old,uint64_t start,uint64_t last)926 svm_range_split_pages(struct svm_range *new, struct svm_range *old,
927 		      uint64_t start, uint64_t last)
928 {
929 	uint64_t npages = last - start + 1;
930 	int i, r;
931 
932 	for (i = 0; i < MAX_GPU_INSTANCE; i++) {
933 		r = svm_range_split_array(&new->dma_addr[i], &old->dma_addr[i],
934 					  sizeof(*old->dma_addr[i]), old->start,
935 					  npages, new->start, new->npages);
936 		if (r)
937 			return r;
938 	}
939 
940 	return 0;
941 }
942 
943 static int
svm_range_split_nodes(struct svm_range * new,struct svm_range * old,uint64_t start,uint64_t last)944 svm_range_split_nodes(struct svm_range *new, struct svm_range *old,
945 		      uint64_t start, uint64_t last)
946 {
947 	uint64_t npages = last - start + 1;
948 
949 	pr_debug("svms 0x%p new prange 0x%p start 0x%lx [0x%llx 0x%llx]\n",
950 		 new->svms, new, new->start, start, last);
951 
952 	if (new->start == old->start) {
953 		new->offset = old->offset;
954 		old->offset += new->npages;
955 	} else {
956 		new->offset = old->offset + npages;
957 	}
958 
959 	new->svm_bo = svm_range_bo_ref(old->svm_bo);
960 	new->ttm_res = old->ttm_res;
961 
962 	spin_lock(&new->svm_bo->list_lock);
963 	list_add(&new->svm_bo_list, &new->svm_bo->range_list);
964 	spin_unlock(&new->svm_bo->list_lock);
965 
966 	return 0;
967 }
968 
969 /**
970  * svm_range_split_adjust - split range and adjust
971  *
972  * @new: new range
973  * @old: the old range
974  * @start: the old range adjust to start address in pages
975  * @last: the old range adjust to last address in pages
976  *
977  * Copy system memory dma_addr or vram ttm_res in old range to new
978  * range from new_start up to size new->npages, the remaining old range is from
979  * start to last
980  *
981  * Return:
982  * 0 - OK, -ENOMEM - out of memory
983  */
984 static int
svm_range_split_adjust(struct svm_range * new,struct svm_range * old,uint64_t start,uint64_t last)985 svm_range_split_adjust(struct svm_range *new, struct svm_range *old,
986 		      uint64_t start, uint64_t last)
987 {
988 	int r;
989 
990 	pr_debug("svms 0x%p new 0x%lx old [0x%lx 0x%lx] => [0x%llx 0x%llx]\n",
991 		 new->svms, new->start, old->start, old->last, start, last);
992 
993 	if (new->start < old->start ||
994 	    new->last > old->last) {
995 		WARN_ONCE(1, "invalid new range start or last\n");
996 		return -EINVAL;
997 	}
998 
999 	r = svm_range_split_pages(new, old, start, last);
1000 	if (r)
1001 		return r;
1002 
1003 	if (old->actual_loc && old->ttm_res) {
1004 		r = svm_range_split_nodes(new, old, start, last);
1005 		if (r)
1006 			return r;
1007 	}
1008 
1009 	old->npages = last - start + 1;
1010 	old->start = start;
1011 	old->last = last;
1012 	new->flags = old->flags;
1013 	new->preferred_loc = old->preferred_loc;
1014 	new->prefetch_loc = old->prefetch_loc;
1015 	new->actual_loc = old->actual_loc;
1016 	new->granularity = old->granularity;
1017 	new->mapped_to_gpu = old->mapped_to_gpu;
1018 	bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE);
1019 	bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE);
1020 
1021 	return 0;
1022 }
1023 
1024 /**
1025  * svm_range_split - split a range in 2 ranges
1026  *
1027  * @prange: the svm range to split
1028  * @start: the remaining range start address in pages
1029  * @last: the remaining range last address in pages
1030  * @new: the result new range generated
1031  *
1032  * Two cases only:
1033  * case 1: if start == prange->start
1034  *         prange ==> prange[start, last]
1035  *         new range [last + 1, prange->last]
1036  *
1037  * case 2: if last == prange->last
1038  *         prange ==> prange[start, last]
1039  *         new range [prange->start, start - 1]
1040  *
1041  * Return:
1042  * 0 - OK, -ENOMEM - out of memory, -EINVAL - invalid start, last
1043  */
1044 static int
svm_range_split(struct svm_range * prange,uint64_t start,uint64_t last,struct svm_range ** new)1045 svm_range_split(struct svm_range *prange, uint64_t start, uint64_t last,
1046 		struct svm_range **new)
1047 {
1048 	uint64_t old_start = prange->start;
1049 	uint64_t old_last = prange->last;
1050 	struct svm_range_list *svms;
1051 	int r = 0;
1052 
1053 	pr_debug("svms 0x%p [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", prange->svms,
1054 		 old_start, old_last, start, last);
1055 
1056 	if (old_start != start && old_last != last)
1057 		return -EINVAL;
1058 	if (start < old_start || last > old_last)
1059 		return -EINVAL;
1060 
1061 	svms = prange->svms;
1062 	if (old_start == start)
1063 		*new = svm_range_new(svms, last + 1, old_last, false);
1064 	else
1065 		*new = svm_range_new(svms, old_start, start - 1, false);
1066 	if (!*new)
1067 		return -ENOMEM;
1068 
1069 	r = svm_range_split_adjust(*new, prange, start, last);
1070 	if (r) {
1071 		pr_debug("failed %d split [0x%llx 0x%llx] to [0x%llx 0x%llx]\n",
1072 			 r, old_start, old_last, start, last);
1073 		svm_range_free(*new, false);
1074 		*new = NULL;
1075 	}
1076 
1077 	return r;
1078 }
1079 
1080 static int
svm_range_split_tail(struct svm_range * prange,uint64_t new_last,struct list_head * insert_list)1081 svm_range_split_tail(struct svm_range *prange,
1082 		     uint64_t new_last, struct list_head *insert_list)
1083 {
1084 	struct svm_range *tail;
1085 	int r = svm_range_split(prange, prange->start, new_last, &tail);
1086 
1087 	if (!r)
1088 		list_add(&tail->list, insert_list);
1089 	return r;
1090 }
1091 
1092 static int
svm_range_split_head(struct svm_range * prange,uint64_t new_start,struct list_head * insert_list)1093 svm_range_split_head(struct svm_range *prange,
1094 		     uint64_t new_start, struct list_head *insert_list)
1095 {
1096 	struct svm_range *head;
1097 	int r = svm_range_split(prange, new_start, prange->last, &head);
1098 
1099 	if (!r)
1100 		list_add(&head->list, insert_list);
1101 	return r;
1102 }
1103 
1104 static void
svm_range_add_child(struct svm_range * prange,struct mm_struct * mm,struct svm_range * pchild,enum svm_work_list_ops op)1105 svm_range_add_child(struct svm_range *prange, struct mm_struct *mm,
1106 		    struct svm_range *pchild, enum svm_work_list_ops op)
1107 {
1108 	pr_debug("add child 0x%p [0x%lx 0x%lx] to prange 0x%p child list %d\n",
1109 		 pchild, pchild->start, pchild->last, prange, op);
1110 
1111 	pchild->work_item.mm = mm;
1112 	pchild->work_item.op = op;
1113 	list_add_tail(&pchild->child_list, &prange->child_list);
1114 }
1115 
1116 /**
1117  * svm_range_split_by_granularity - collect ranges within granularity boundary
1118  *
1119  * @p: the process with svms list
1120  * @mm: mm structure
1121  * @addr: the vm fault address in pages, to split the prange
1122  * @parent: parent range if prange is from child list
1123  * @prange: prange to split
1124  *
1125  * Trims @prange to be a single aligned block of prange->granularity if
1126  * possible. The head and tail are added to the child_list in @parent.
1127  *
1128  * Context: caller must hold mmap_read_lock and prange->lock
1129  *
1130  * Return:
1131  * 0 - OK, otherwise error code
1132  */
1133 int
svm_range_split_by_granularity(struct kfd_process * p,struct mm_struct * mm,unsigned long addr,struct svm_range * parent,struct svm_range * prange)1134 svm_range_split_by_granularity(struct kfd_process *p, struct mm_struct *mm,
1135 			       unsigned long addr, struct svm_range *parent,
1136 			       struct svm_range *prange)
1137 {
1138 	struct svm_range *head, *tail;
1139 	unsigned long start, last, size;
1140 	int r;
1141 
1142 	/* Align splited range start and size to granularity size, then a single
1143 	 * PTE will be used for whole range, this reduces the number of PTE
1144 	 * updated and the L1 TLB space used for translation.
1145 	 */
1146 	size = 1UL << prange->granularity;
1147 	start = ALIGN_DOWN(addr, size);
1148 	last = ALIGN(addr + 1, size) - 1;
1149 
1150 	pr_debug("svms 0x%p split [0x%lx 0x%lx] to [0x%lx 0x%lx] size 0x%lx\n",
1151 		 prange->svms, prange->start, prange->last, start, last, size);
1152 
1153 	if (start > prange->start) {
1154 		r = svm_range_split(prange, start, prange->last, &head);
1155 		if (r)
1156 			return r;
1157 		svm_range_add_child(parent, mm, head, SVM_OP_ADD_RANGE);
1158 	}
1159 
1160 	if (last < prange->last) {
1161 		r = svm_range_split(prange, prange->start, last, &tail);
1162 		if (r)
1163 			return r;
1164 		svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE);
1165 	}
1166 
1167 	/* xnack on, update mapping on GPUs with ACCESS_IN_PLACE */
1168 	if (p->xnack_enabled && prange->work_item.op == SVM_OP_ADD_RANGE) {
1169 		prange->work_item.op = SVM_OP_ADD_RANGE_AND_MAP;
1170 		pr_debug("change prange 0x%p [0x%lx 0x%lx] op %d\n",
1171 			 prange, prange->start, prange->last,
1172 			 SVM_OP_ADD_RANGE_AND_MAP);
1173 	}
1174 	return 0;
1175 }
1176 static bool
svm_nodes_in_same_hive(struct kfd_node * node_a,struct kfd_node * node_b)1177 svm_nodes_in_same_hive(struct kfd_node *node_a, struct kfd_node *node_b)
1178 {
1179 	return (node_a->adev == node_b->adev ||
1180 		amdgpu_xgmi_same_hive(node_a->adev, node_b->adev));
1181 }
1182 
1183 static uint64_t
svm_range_get_pte_flags(struct kfd_node * node,struct svm_range * prange,int domain)1184 svm_range_get_pte_flags(struct kfd_node *node,
1185 			struct svm_range *prange, int domain)
1186 {
1187 	struct kfd_node *bo_node;
1188 	uint32_t flags = prange->flags;
1189 	uint32_t mapping_flags = 0;
1190 	uint64_t pte_flags;
1191 	bool snoop = (domain != SVM_RANGE_VRAM_DOMAIN);
1192 	bool coherent = flags & KFD_IOCTL_SVM_FLAG_COHERENT;
1193 	bool uncached = false; /*flags & KFD_IOCTL_SVM_FLAG_UNCACHED;*/
1194 	unsigned int mtype_local;
1195 
1196 	if (domain == SVM_RANGE_VRAM_DOMAIN)
1197 		bo_node = prange->svm_bo->node;
1198 
1199 	switch (node->adev->ip_versions[GC_HWIP][0]) {
1200 	case IP_VERSION(9, 4, 1):
1201 		if (domain == SVM_RANGE_VRAM_DOMAIN) {
1202 			if (bo_node == node) {
1203 				mapping_flags |= coherent ?
1204 					AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW;
1205 			} else {
1206 				mapping_flags |= coherent ?
1207 					AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1208 				if (svm_nodes_in_same_hive(node, bo_node))
1209 					snoop = true;
1210 			}
1211 		} else {
1212 			mapping_flags |= coherent ?
1213 				AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1214 		}
1215 		break;
1216 	case IP_VERSION(9, 4, 2):
1217 		if (domain == SVM_RANGE_VRAM_DOMAIN) {
1218 			if (bo_node == node) {
1219 				mapping_flags |= coherent ?
1220 					AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW;
1221 				if (node->adev->gmc.xgmi.connected_to_cpu)
1222 					snoop = true;
1223 			} else {
1224 				mapping_flags |= coherent ?
1225 					AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1226 				if (svm_nodes_in_same_hive(node, bo_node))
1227 					snoop = true;
1228 			}
1229 		} else {
1230 			mapping_flags |= coherent ?
1231 				AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1232 		}
1233 		break;
1234 	case IP_VERSION(9, 4, 3):
1235 		mtype_local = amdgpu_mtype_local == 1 ? AMDGPU_VM_MTYPE_NC :
1236 			     (amdgpu_mtype_local == 2 ? AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW);
1237 		snoop = true;
1238 		if (uncached) {
1239 			mapping_flags |= AMDGPU_VM_MTYPE_UC;
1240 		} else if (domain == SVM_RANGE_VRAM_DOMAIN) {
1241 			/* local HBM region close to partition */
1242 			if (bo_node->adev == node->adev &&
1243 			    (!bo_node->xcp || !node->xcp || bo_node->xcp->mem_id == node->xcp->mem_id))
1244 				mapping_flags |= mtype_local;
1245 			/* local HBM region far from partition or remote XGMI GPU */
1246 			else if (svm_nodes_in_same_hive(bo_node, node))
1247 				mapping_flags |= AMDGPU_VM_MTYPE_NC;
1248 			/* PCIe P2P */
1249 			else
1250 				mapping_flags |= AMDGPU_VM_MTYPE_UC;
1251 		/* system memory accessed by the APU */
1252 		} else if (node->adev->flags & AMD_IS_APU) {
1253 			/* On NUMA systems, locality is determined per-page
1254 			 * in amdgpu_gmc_override_vm_pte_flags
1255 			 */
1256 			if (num_possible_nodes() <= 1)
1257 				mapping_flags |= mtype_local;
1258 			else
1259 				mapping_flags |= AMDGPU_VM_MTYPE_NC;
1260 		/* system memory accessed by the dGPU */
1261 		} else {
1262 			mapping_flags |= AMDGPU_VM_MTYPE_UC;
1263 		}
1264 		break;
1265 	default:
1266 		mapping_flags |= coherent ?
1267 			AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1268 	}
1269 
1270 	mapping_flags |= AMDGPU_VM_PAGE_READABLE | AMDGPU_VM_PAGE_WRITEABLE;
1271 
1272 	if (flags & KFD_IOCTL_SVM_FLAG_GPU_RO)
1273 		mapping_flags &= ~AMDGPU_VM_PAGE_WRITEABLE;
1274 	if (flags & KFD_IOCTL_SVM_FLAG_GPU_EXEC)
1275 		mapping_flags |= AMDGPU_VM_PAGE_EXECUTABLE;
1276 
1277 	pte_flags = AMDGPU_PTE_VALID;
1278 	pte_flags |= (domain == SVM_RANGE_VRAM_DOMAIN) ? 0 : AMDGPU_PTE_SYSTEM;
1279 	pte_flags |= snoop ? AMDGPU_PTE_SNOOPED : 0;
1280 
1281 	pte_flags |= amdgpu_gem_va_map_flags(node->adev, mapping_flags);
1282 	return pte_flags;
1283 }
1284 
1285 static int
svm_range_unmap_from_gpu(struct amdgpu_device * adev,struct amdgpu_vm * vm,uint64_t start,uint64_t last,struct dma_fence ** fence)1286 svm_range_unmap_from_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm,
1287 			 uint64_t start, uint64_t last,
1288 			 struct dma_fence **fence)
1289 {
1290 	uint64_t init_pte_value = 0;
1291 
1292 	pr_debug("[0x%llx 0x%llx]\n", start, last);
1293 
1294 	return amdgpu_vm_update_range(adev, vm, false, true, true, NULL, start,
1295 				      last, init_pte_value, 0, 0, NULL, NULL,
1296 				      fence);
1297 }
1298 
1299 static int
svm_range_unmap_from_gpus(struct svm_range * prange,unsigned long start,unsigned long last,uint32_t trigger)1300 svm_range_unmap_from_gpus(struct svm_range *prange, unsigned long start,
1301 			  unsigned long last, uint32_t trigger)
1302 {
1303 	DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE);
1304 	struct kfd_process_device *pdd;
1305 	struct dma_fence *fence = NULL;
1306 	struct kfd_process *p;
1307 	uint32_t gpuidx;
1308 	int r = 0;
1309 
1310 	if (!prange->mapped_to_gpu) {
1311 		pr_debug("prange 0x%p [0x%lx 0x%lx] not mapped to GPU\n",
1312 			 prange, prange->start, prange->last);
1313 		return 0;
1314 	}
1315 
1316 	if (prange->start == start && prange->last == last) {
1317 		pr_debug("unmap svms 0x%p prange 0x%p\n", prange->svms, prange);
1318 		prange->mapped_to_gpu = false;
1319 	}
1320 
1321 	bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip,
1322 		  MAX_GPU_INSTANCE);
1323 	p = container_of(prange->svms, struct kfd_process, svms);
1324 
1325 	for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) {
1326 		pr_debug("unmap from gpu idx 0x%x\n", gpuidx);
1327 		pdd = kfd_process_device_from_gpuidx(p, gpuidx);
1328 		if (!pdd) {
1329 			pr_debug("failed to find device idx %d\n", gpuidx);
1330 			return -EINVAL;
1331 		}
1332 
1333 		kfd_smi_event_unmap_from_gpu(pdd->dev, p->lead_thread->pid,
1334 					     start, last, trigger);
1335 
1336 		r = svm_range_unmap_from_gpu(pdd->dev->adev,
1337 					     drm_priv_to_vm(pdd->drm_priv),
1338 					     start, last, &fence);
1339 		if (r)
1340 			break;
1341 
1342 		if (fence) {
1343 			r = dma_fence_wait(fence, false);
1344 			dma_fence_put(fence);
1345 			fence = NULL;
1346 			if (r)
1347 				break;
1348 		}
1349 		kfd_flush_tlb(pdd, TLB_FLUSH_HEAVYWEIGHT);
1350 	}
1351 
1352 	return r;
1353 }
1354 
1355 static int
svm_range_map_to_gpu(struct kfd_process_device * pdd,struct svm_range * prange,unsigned long offset,unsigned long npages,bool readonly,dma_addr_t * dma_addr,struct amdgpu_device * bo_adev,struct dma_fence ** fence,bool flush_tlb)1356 svm_range_map_to_gpu(struct kfd_process_device *pdd, struct svm_range *prange,
1357 		     unsigned long offset, unsigned long npages, bool readonly,
1358 		     dma_addr_t *dma_addr, struct amdgpu_device *bo_adev,
1359 		     struct dma_fence **fence, bool flush_tlb)
1360 {
1361 	struct amdgpu_device *adev = pdd->dev->adev;
1362 	struct amdgpu_vm *vm = drm_priv_to_vm(pdd->drm_priv);
1363 	uint64_t pte_flags;
1364 	unsigned long last_start;
1365 	int last_domain;
1366 	int r = 0;
1367 	int64_t i, j;
1368 
1369 	last_start = prange->start + offset;
1370 
1371 	pr_debug("svms 0x%p [0x%lx 0x%lx] readonly %d\n", prange->svms,
1372 		 last_start, last_start + npages - 1, readonly);
1373 
1374 	for (i = offset; i < offset + npages; i++) {
1375 		last_domain = dma_addr[i] & SVM_RANGE_VRAM_DOMAIN;
1376 		dma_addr[i] &= ~SVM_RANGE_VRAM_DOMAIN;
1377 
1378 		/* Collect all pages in the same address range and memory domain
1379 		 * that can be mapped with a single call to update mapping.
1380 		 */
1381 		if (i < offset + npages - 1 &&
1382 		    last_domain == (dma_addr[i + 1] & SVM_RANGE_VRAM_DOMAIN))
1383 			continue;
1384 
1385 		pr_debug("Mapping range [0x%lx 0x%llx] on domain: %s\n",
1386 			 last_start, prange->start + i, last_domain ? "GPU" : "CPU");
1387 
1388 		pte_flags = svm_range_get_pte_flags(pdd->dev, prange, last_domain);
1389 		if (readonly)
1390 			pte_flags &= ~AMDGPU_PTE_WRITEABLE;
1391 
1392 		pr_debug("svms 0x%p map [0x%lx 0x%llx] vram %d PTE 0x%llx\n",
1393 			 prange->svms, last_start, prange->start + i,
1394 			 (last_domain == SVM_RANGE_VRAM_DOMAIN) ? 1 : 0,
1395 			 pte_flags);
1396 
1397 		/* For dGPU mode, we use same vm_manager to allocate VRAM for
1398 		 * different memory partition based on fpfn/lpfn, we should use
1399 		 * same vm_manager.vram_base_offset regardless memory partition.
1400 		 */
1401 		r = amdgpu_vm_update_range(adev, vm, false, false, flush_tlb, NULL,
1402 					   last_start, prange->start + i,
1403 					   pte_flags,
1404 					   (last_start - prange->start) << PAGE_SHIFT,
1405 					   bo_adev ? bo_adev->vm_manager.vram_base_offset : 0,
1406 					   NULL, dma_addr, &vm->last_update);
1407 
1408 		for (j = last_start - prange->start; j <= i; j++)
1409 			dma_addr[j] |= last_domain;
1410 
1411 		if (r) {
1412 			pr_debug("failed %d to map to gpu 0x%lx\n", r, prange->start);
1413 			goto out;
1414 		}
1415 		last_start = prange->start + i + 1;
1416 	}
1417 
1418 	r = amdgpu_vm_update_pdes(adev, vm, false);
1419 	if (r) {
1420 		pr_debug("failed %d to update directories 0x%lx\n", r,
1421 			 prange->start);
1422 		goto out;
1423 	}
1424 
1425 	if (fence)
1426 		*fence = dma_fence_get(vm->last_update);
1427 
1428 out:
1429 	return r;
1430 }
1431 
1432 static int
svm_range_map_to_gpus(struct svm_range * prange,unsigned long offset,unsigned long npages,bool readonly,unsigned long * bitmap,bool wait,bool flush_tlb)1433 svm_range_map_to_gpus(struct svm_range *prange, unsigned long offset,
1434 		      unsigned long npages, bool readonly,
1435 		      unsigned long *bitmap, bool wait, bool flush_tlb)
1436 {
1437 	struct kfd_process_device *pdd;
1438 	struct amdgpu_device *bo_adev = NULL;
1439 	struct kfd_process *p;
1440 	struct dma_fence *fence = NULL;
1441 	uint32_t gpuidx;
1442 	int r = 0;
1443 
1444 	if (prange->svm_bo && prange->ttm_res)
1445 		bo_adev = prange->svm_bo->node->adev;
1446 
1447 	p = container_of(prange->svms, struct kfd_process, svms);
1448 	for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) {
1449 		pr_debug("mapping to gpu idx 0x%x\n", gpuidx);
1450 		pdd = kfd_process_device_from_gpuidx(p, gpuidx);
1451 		if (!pdd) {
1452 			pr_debug("failed to find device idx %d\n", gpuidx);
1453 			return -EINVAL;
1454 		}
1455 
1456 		pdd = kfd_bind_process_to_device(pdd->dev, p);
1457 		if (IS_ERR(pdd))
1458 			return -EINVAL;
1459 
1460 		if (bo_adev && pdd->dev->adev != bo_adev &&
1461 		    !amdgpu_xgmi_same_hive(pdd->dev->adev, bo_adev)) {
1462 			pr_debug("cannot map to device idx %d\n", gpuidx);
1463 			continue;
1464 		}
1465 
1466 		r = svm_range_map_to_gpu(pdd, prange, offset, npages, readonly,
1467 					 prange->dma_addr[gpuidx],
1468 					 bo_adev, wait ? &fence : NULL,
1469 					 flush_tlb);
1470 		if (r)
1471 			break;
1472 
1473 		if (fence) {
1474 			r = dma_fence_wait(fence, false);
1475 			dma_fence_put(fence);
1476 			fence = NULL;
1477 			if (r) {
1478 				pr_debug("failed %d to dma fence wait\n", r);
1479 				break;
1480 			}
1481 		}
1482 
1483 		kfd_flush_tlb(pdd, TLB_FLUSH_LEGACY);
1484 	}
1485 
1486 	return r;
1487 }
1488 
1489 struct svm_validate_context {
1490 	struct kfd_process *process;
1491 	struct svm_range *prange;
1492 	bool intr;
1493 	DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE);
1494 	struct drm_exec exec;
1495 };
1496 
svm_range_reserve_bos(struct svm_validate_context * ctx,bool intr)1497 static int svm_range_reserve_bos(struct svm_validate_context *ctx, bool intr)
1498 {
1499 	struct kfd_process_device *pdd;
1500 	struct amdgpu_vm *vm;
1501 	uint32_t gpuidx;
1502 	int r;
1503 
1504 	drm_exec_init(&ctx->exec, intr ? DRM_EXEC_INTERRUPTIBLE_WAIT: 0);
1505 	drm_exec_until_all_locked(&ctx->exec) {
1506 		for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) {
1507 			pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx);
1508 			if (!pdd) {
1509 				pr_debug("failed to find device idx %d\n", gpuidx);
1510 				r = -EINVAL;
1511 				goto unreserve_out;
1512 			}
1513 			vm = drm_priv_to_vm(pdd->drm_priv);
1514 
1515 			r = amdgpu_vm_lock_pd(vm, &ctx->exec, 2);
1516 			drm_exec_retry_on_contention(&ctx->exec);
1517 			if (unlikely(r)) {
1518 				pr_debug("failed %d to reserve bo\n", r);
1519 				goto unreserve_out;
1520 			}
1521 		}
1522 	}
1523 
1524 	for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) {
1525 		pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx);
1526 		if (!pdd) {
1527 			pr_debug("failed to find device idx %d\n", gpuidx);
1528 			r = -EINVAL;
1529 			goto unreserve_out;
1530 		}
1531 
1532 		r = amdgpu_vm_validate_pt_bos(pdd->dev->adev,
1533 					      drm_priv_to_vm(pdd->drm_priv),
1534 					      svm_range_bo_validate, NULL);
1535 		if (r) {
1536 			pr_debug("failed %d validate pt bos\n", r);
1537 			goto unreserve_out;
1538 		}
1539 	}
1540 
1541 	return 0;
1542 
1543 unreserve_out:
1544 	drm_exec_fini(&ctx->exec);
1545 	return r;
1546 }
1547 
svm_range_unreserve_bos(struct svm_validate_context * ctx)1548 static void svm_range_unreserve_bos(struct svm_validate_context *ctx)
1549 {
1550 	drm_exec_fini(&ctx->exec);
1551 }
1552 
kfd_svm_page_owner(struct kfd_process * p,int32_t gpuidx)1553 static void *kfd_svm_page_owner(struct kfd_process *p, int32_t gpuidx)
1554 {
1555 	struct kfd_process_device *pdd;
1556 
1557 	pdd = kfd_process_device_from_gpuidx(p, gpuidx);
1558 	if (!pdd)
1559 		return NULL;
1560 
1561 	return SVM_ADEV_PGMAP_OWNER(pdd->dev->adev);
1562 }
1563 
1564 /*
1565  * Validation+GPU mapping with concurrent invalidation (MMU notifiers)
1566  *
1567  * To prevent concurrent destruction or change of range attributes, the
1568  * svm_read_lock must be held. The caller must not hold the svm_write_lock
1569  * because that would block concurrent evictions and lead to deadlocks. To
1570  * serialize concurrent migrations or validations of the same range, the
1571  * prange->migrate_mutex must be held.
1572  *
1573  * For VRAM ranges, the SVM BO must be allocated and valid (protected by its
1574  * eviction fence.
1575  *
1576  * The following sequence ensures race-free validation and GPU mapping:
1577  *
1578  * 1. Reserve page table (and SVM BO if range is in VRAM)
1579  * 2. hmm_range_fault to get page addresses (if system memory)
1580  * 3. DMA-map pages (if system memory)
1581  * 4-a. Take notifier lock
1582  * 4-b. Check that pages still valid (mmu_interval_read_retry)
1583  * 4-c. Check that the range was not split or otherwise invalidated
1584  * 4-d. Update GPU page table
1585  * 4.e. Release notifier lock
1586  * 5. Release page table (and SVM BO) reservation
1587  */
svm_range_validate_and_map(struct mm_struct * mm,struct svm_range * prange,int32_t gpuidx,bool intr,bool wait,bool flush_tlb)1588 static int svm_range_validate_and_map(struct mm_struct *mm,
1589 				      struct svm_range *prange, int32_t gpuidx,
1590 				      bool intr, bool wait, bool flush_tlb)
1591 {
1592 	struct svm_validate_context *ctx;
1593 	unsigned long start, end, addr;
1594 	struct kfd_process *p;
1595 	void *owner;
1596 	int32_t idx;
1597 	int r = 0;
1598 
1599 	ctx = kzalloc(sizeof(struct svm_validate_context), GFP_KERNEL);
1600 	if (!ctx)
1601 		return -ENOMEM;
1602 	ctx->process = container_of(prange->svms, struct kfd_process, svms);
1603 	ctx->prange = prange;
1604 	ctx->intr = intr;
1605 
1606 	if (gpuidx < MAX_GPU_INSTANCE) {
1607 		bitmap_zero(ctx->bitmap, MAX_GPU_INSTANCE);
1608 		bitmap_set(ctx->bitmap, gpuidx, 1);
1609 	} else if (ctx->process->xnack_enabled) {
1610 		bitmap_copy(ctx->bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE);
1611 
1612 		/* If prefetch range to GPU, or GPU retry fault migrate range to
1613 		 * GPU, which has ACCESS attribute to the range, create mapping
1614 		 * on that GPU.
1615 		 */
1616 		if (prange->actual_loc) {
1617 			gpuidx = kfd_process_gpuidx_from_gpuid(ctx->process,
1618 							prange->actual_loc);
1619 			if (gpuidx < 0) {
1620 				WARN_ONCE(1, "failed get device by id 0x%x\n",
1621 					 prange->actual_loc);
1622 				r = -EINVAL;
1623 				goto free_ctx;
1624 			}
1625 			if (test_bit(gpuidx, prange->bitmap_access))
1626 				bitmap_set(ctx->bitmap, gpuidx, 1);
1627 		}
1628 	} else {
1629 		bitmap_or(ctx->bitmap, prange->bitmap_access,
1630 			  prange->bitmap_aip, MAX_GPU_INSTANCE);
1631 	}
1632 
1633 	if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) {
1634 		bitmap_copy(ctx->bitmap, prange->bitmap_access, MAX_GPU_INSTANCE);
1635 		if (!prange->mapped_to_gpu ||
1636 		    bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) {
1637 			r = 0;
1638 			goto free_ctx;
1639 		}
1640 	}
1641 
1642 	if (prange->actual_loc && !prange->ttm_res) {
1643 		/* This should never happen. actual_loc gets set by
1644 		 * svm_migrate_ram_to_vram after allocating a BO.
1645 		 */
1646 		WARN_ONCE(1, "VRAM BO missing during validation\n");
1647 		r = -EINVAL;
1648 		goto free_ctx;
1649 	}
1650 
1651 	svm_range_reserve_bos(ctx, intr);
1652 
1653 	p = container_of(prange->svms, struct kfd_process, svms);
1654 	owner = kfd_svm_page_owner(p, find_first_bit(ctx->bitmap,
1655 						MAX_GPU_INSTANCE));
1656 	for_each_set_bit(idx, ctx->bitmap, MAX_GPU_INSTANCE) {
1657 		if (kfd_svm_page_owner(p, idx) != owner) {
1658 			owner = NULL;
1659 			break;
1660 		}
1661 	}
1662 
1663 	start = prange->start << PAGE_SHIFT;
1664 	end = (prange->last + 1) << PAGE_SHIFT;
1665 	for (addr = start; addr < end && !r; ) {
1666 		struct hmm_range *hmm_range;
1667 		struct vm_area_struct *vma;
1668 		unsigned long next;
1669 		unsigned long offset;
1670 		unsigned long npages;
1671 		bool readonly;
1672 
1673 		vma = vma_lookup(mm, addr);
1674 		if (!vma) {
1675 			r = -EFAULT;
1676 			goto unreserve_out;
1677 		}
1678 		readonly = !(vma->vm_flags & VM_WRITE);
1679 
1680 		next = min(vma->vm_end, end);
1681 		npages = (next - addr) >> PAGE_SHIFT;
1682 		WRITE_ONCE(p->svms.faulting_task, current);
1683 		r = amdgpu_hmm_range_get_pages(&prange->notifier, addr, npages,
1684 					       readonly, owner, NULL,
1685 					       &hmm_range);
1686 		WRITE_ONCE(p->svms.faulting_task, NULL);
1687 		if (r) {
1688 			pr_debug("failed %d to get svm range pages\n", r);
1689 			if (r == -EBUSY)
1690 				r = -EAGAIN;
1691 			goto unreserve_out;
1692 		}
1693 
1694 		offset = (addr - start) >> PAGE_SHIFT;
1695 		r = svm_range_dma_map(prange, ctx->bitmap, offset, npages,
1696 				      hmm_range->hmm_pfns);
1697 		if (r) {
1698 			pr_debug("failed %d to dma map range\n", r);
1699 			goto unreserve_out;
1700 		}
1701 
1702 		svm_range_lock(prange);
1703 		if (amdgpu_hmm_range_get_pages_done(hmm_range)) {
1704 			pr_debug("hmm update the range, need validate again\n");
1705 			r = -EAGAIN;
1706 			goto unlock_out;
1707 		}
1708 		if (!list_empty(&prange->child_list)) {
1709 			pr_debug("range split by unmap in parallel, validate again\n");
1710 			r = -EAGAIN;
1711 			goto unlock_out;
1712 		}
1713 
1714 		r = svm_range_map_to_gpus(prange, offset, npages, readonly,
1715 					  ctx->bitmap, wait, flush_tlb);
1716 
1717 unlock_out:
1718 		svm_range_unlock(prange);
1719 
1720 		addr = next;
1721 	}
1722 
1723 	if (addr == end) {
1724 		prange->validated_once = true;
1725 		prange->mapped_to_gpu = true;
1726 	}
1727 
1728 unreserve_out:
1729 	svm_range_unreserve_bos(ctx);
1730 
1731 	prange->is_error_flag = !!r;
1732 	if (!r)
1733 		prange->validate_timestamp = ktime_get_boottime();
1734 
1735 free_ctx:
1736 	kfree(ctx);
1737 
1738 	return r;
1739 }
1740 
1741 /**
1742  * svm_range_list_lock_and_flush_work - flush pending deferred work
1743  *
1744  * @svms: the svm range list
1745  * @mm: the mm structure
1746  *
1747  * Context: Returns with mmap write lock held, pending deferred work flushed
1748  *
1749  */
1750 void
svm_range_list_lock_and_flush_work(struct svm_range_list * svms,struct mm_struct * mm)1751 svm_range_list_lock_and_flush_work(struct svm_range_list *svms,
1752 				   struct mm_struct *mm)
1753 {
1754 retry_flush_work:
1755 	flush_work(&svms->deferred_list_work);
1756 	mmap_write_lock(mm);
1757 
1758 	if (list_empty(&svms->deferred_range_list))
1759 		return;
1760 	mmap_write_unlock(mm);
1761 	pr_debug("retry flush\n");
1762 	goto retry_flush_work;
1763 }
1764 
svm_range_restore_work(struct work_struct * work)1765 static void svm_range_restore_work(struct work_struct *work)
1766 {
1767 	struct delayed_work *dwork = to_delayed_work(work);
1768 	struct amdkfd_process_info *process_info;
1769 	struct svm_range_list *svms;
1770 	struct svm_range *prange;
1771 	struct kfd_process *p;
1772 	struct mm_struct *mm;
1773 	int evicted_ranges;
1774 	int invalid;
1775 	int r;
1776 
1777 	svms = container_of(dwork, struct svm_range_list, restore_work);
1778 	evicted_ranges = atomic_read(&svms->evicted_ranges);
1779 	if (!evicted_ranges)
1780 		return;
1781 
1782 	pr_debug("restore svm ranges\n");
1783 
1784 	p = container_of(svms, struct kfd_process, svms);
1785 	process_info = p->kgd_process_info;
1786 
1787 	/* Keep mm reference when svm_range_validate_and_map ranges */
1788 	mm = get_task_mm(p->lead_thread);
1789 	if (!mm) {
1790 		pr_debug("svms 0x%p process mm gone\n", svms);
1791 		return;
1792 	}
1793 
1794 	mutex_lock(&process_info->lock);
1795 	svm_range_list_lock_and_flush_work(svms, mm);
1796 	mutex_lock(&svms->lock);
1797 
1798 	evicted_ranges = atomic_read(&svms->evicted_ranges);
1799 
1800 	list_for_each_entry(prange, &svms->list, list) {
1801 		invalid = atomic_read(&prange->invalid);
1802 		if (!invalid)
1803 			continue;
1804 
1805 		pr_debug("restoring svms 0x%p prange 0x%p [0x%lx %lx] inv %d\n",
1806 			 prange->svms, prange, prange->start, prange->last,
1807 			 invalid);
1808 
1809 		/*
1810 		 * If range is migrating, wait for migration is done.
1811 		 */
1812 		mutex_lock(&prange->migrate_mutex);
1813 
1814 		r = svm_range_validate_and_map(mm, prange, MAX_GPU_INSTANCE,
1815 					       false, true, false);
1816 		if (r)
1817 			pr_debug("failed %d to map 0x%lx to gpus\n", r,
1818 				 prange->start);
1819 
1820 		mutex_unlock(&prange->migrate_mutex);
1821 		if (r)
1822 			goto out_reschedule;
1823 
1824 		if (atomic_cmpxchg(&prange->invalid, invalid, 0) != invalid)
1825 			goto out_reschedule;
1826 	}
1827 
1828 	if (atomic_cmpxchg(&svms->evicted_ranges, evicted_ranges, 0) !=
1829 	    evicted_ranges)
1830 		goto out_reschedule;
1831 
1832 	evicted_ranges = 0;
1833 
1834 	r = kgd2kfd_resume_mm(mm);
1835 	if (r) {
1836 		/* No recovery from this failure. Probably the CP is
1837 		 * hanging. No point trying again.
1838 		 */
1839 		pr_debug("failed %d to resume KFD\n", r);
1840 	}
1841 
1842 	pr_debug("restore svm ranges successfully\n");
1843 
1844 out_reschedule:
1845 	mutex_unlock(&svms->lock);
1846 	mmap_write_unlock(mm);
1847 	mutex_unlock(&process_info->lock);
1848 
1849 	/* If validation failed, reschedule another attempt */
1850 	if (evicted_ranges) {
1851 		pr_debug("reschedule to restore svm range\n");
1852 		schedule_delayed_work(&svms->restore_work,
1853 			msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS));
1854 
1855 		kfd_smi_event_queue_restore_rescheduled(mm);
1856 	}
1857 	mmput(mm);
1858 }
1859 
1860 /**
1861  * svm_range_evict - evict svm range
1862  * @prange: svm range structure
1863  * @mm: current process mm_struct
1864  * @start: starting process queue number
1865  * @last: last process queue number
1866  * @event: mmu notifier event when range is evicted or migrated
1867  *
1868  * Stop all queues of the process to ensure GPU doesn't access the memory, then
1869  * return to let CPU evict the buffer and proceed CPU pagetable update.
1870  *
1871  * Don't need use lock to sync cpu pagetable invalidation with GPU execution.
1872  * If invalidation happens while restore work is running, restore work will
1873  * restart to ensure to get the latest CPU pages mapping to GPU, then start
1874  * the queues.
1875  */
1876 static int
svm_range_evict(struct svm_range * prange,struct mm_struct * mm,unsigned long start,unsigned long last,enum mmu_notifier_event event)1877 svm_range_evict(struct svm_range *prange, struct mm_struct *mm,
1878 		unsigned long start, unsigned long last,
1879 		enum mmu_notifier_event event)
1880 {
1881 	struct svm_range_list *svms = prange->svms;
1882 	struct svm_range *pchild;
1883 	struct kfd_process *p;
1884 	int r = 0;
1885 
1886 	p = container_of(svms, struct kfd_process, svms);
1887 
1888 	pr_debug("invalidate svms 0x%p prange [0x%lx 0x%lx] [0x%lx 0x%lx]\n",
1889 		 svms, prange->start, prange->last, start, last);
1890 
1891 	if (!p->xnack_enabled ||
1892 	    (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) {
1893 		int evicted_ranges;
1894 		bool mapped = prange->mapped_to_gpu;
1895 
1896 		list_for_each_entry(pchild, &prange->child_list, child_list) {
1897 			if (!pchild->mapped_to_gpu)
1898 				continue;
1899 			mapped = true;
1900 			mutex_lock_nested(&pchild->lock, 1);
1901 			if (pchild->start <= last && pchild->last >= start) {
1902 				pr_debug("increment pchild invalid [0x%lx 0x%lx]\n",
1903 					 pchild->start, pchild->last);
1904 				atomic_inc(&pchild->invalid);
1905 			}
1906 			mutex_unlock(&pchild->lock);
1907 		}
1908 
1909 		if (!mapped)
1910 			return r;
1911 
1912 		if (prange->start <= last && prange->last >= start)
1913 			atomic_inc(&prange->invalid);
1914 
1915 		evicted_ranges = atomic_inc_return(&svms->evicted_ranges);
1916 		if (evicted_ranges != 1)
1917 			return r;
1918 
1919 		pr_debug("evicting svms 0x%p range [0x%lx 0x%lx]\n",
1920 			 prange->svms, prange->start, prange->last);
1921 
1922 		/* First eviction, stop the queues */
1923 		r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM);
1924 		if (r)
1925 			pr_debug("failed to quiesce KFD\n");
1926 
1927 		pr_debug("schedule to restore svm %p ranges\n", svms);
1928 		schedule_delayed_work(&svms->restore_work,
1929 			msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS));
1930 	} else {
1931 		unsigned long s, l;
1932 		uint32_t trigger;
1933 
1934 		if (event == MMU_NOTIFY_MIGRATE)
1935 			trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY_MIGRATE;
1936 		else
1937 			trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY;
1938 
1939 		pr_debug("invalidate unmap svms 0x%p [0x%lx 0x%lx] from GPUs\n",
1940 			 prange->svms, start, last);
1941 		list_for_each_entry(pchild, &prange->child_list, child_list) {
1942 			mutex_lock_nested(&pchild->lock, 1);
1943 			s = max(start, pchild->start);
1944 			l = min(last, pchild->last);
1945 			if (l >= s)
1946 				svm_range_unmap_from_gpus(pchild, s, l, trigger);
1947 			mutex_unlock(&pchild->lock);
1948 		}
1949 		s = max(start, prange->start);
1950 		l = min(last, prange->last);
1951 		if (l >= s)
1952 			svm_range_unmap_from_gpus(prange, s, l, trigger);
1953 	}
1954 
1955 	return r;
1956 }
1957 
svm_range_clone(struct svm_range * old)1958 static struct svm_range *svm_range_clone(struct svm_range *old)
1959 {
1960 	struct svm_range *new;
1961 
1962 	new = svm_range_new(old->svms, old->start, old->last, false);
1963 	if (!new)
1964 		return NULL;
1965 	if (svm_range_copy_dma_addrs(new, old)) {
1966 		svm_range_free(new, false);
1967 		return NULL;
1968 	}
1969 	if (old->svm_bo) {
1970 		new->ttm_res = old->ttm_res;
1971 		new->offset = old->offset;
1972 		new->svm_bo = svm_range_bo_ref(old->svm_bo);
1973 		spin_lock(&new->svm_bo->list_lock);
1974 		list_add(&new->svm_bo_list, &new->svm_bo->range_list);
1975 		spin_unlock(&new->svm_bo->list_lock);
1976 	}
1977 	new->flags = old->flags;
1978 	new->preferred_loc = old->preferred_loc;
1979 	new->prefetch_loc = old->prefetch_loc;
1980 	new->actual_loc = old->actual_loc;
1981 	new->granularity = old->granularity;
1982 	new->mapped_to_gpu = old->mapped_to_gpu;
1983 	bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE);
1984 	bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE);
1985 
1986 	return new;
1987 }
1988 
svm_range_set_max_pages(struct amdgpu_device * adev)1989 void svm_range_set_max_pages(struct amdgpu_device *adev)
1990 {
1991 	uint64_t max_pages;
1992 	uint64_t pages, _pages;
1993 	uint64_t min_pages = 0;
1994 	int i, id;
1995 
1996 	for (i = 0; i < adev->kfd.dev->num_nodes; i++) {
1997 		if (adev->kfd.dev->nodes[i]->xcp)
1998 			id = adev->kfd.dev->nodes[i]->xcp->id;
1999 		else
2000 			id = -1;
2001 		pages = KFD_XCP_MEMORY_SIZE(adev, id) >> 17;
2002 		pages = clamp(pages, 1ULL << 9, 1ULL << 18);
2003 		pages = rounddown_pow_of_two(pages);
2004 		min_pages = min_not_zero(min_pages, pages);
2005 	}
2006 
2007 	do {
2008 		max_pages = READ_ONCE(max_svm_range_pages);
2009 		_pages = min_not_zero(max_pages, min_pages);
2010 	} while (cmpxchg(&max_svm_range_pages, max_pages, _pages) != max_pages);
2011 }
2012 
2013 static int
svm_range_split_new(struct svm_range_list * svms,uint64_t start,uint64_t last,uint64_t max_pages,struct list_head * insert_list,struct list_head * update_list)2014 svm_range_split_new(struct svm_range_list *svms, uint64_t start, uint64_t last,
2015 		    uint64_t max_pages, struct list_head *insert_list,
2016 		    struct list_head *update_list)
2017 {
2018 	struct svm_range *prange;
2019 	uint64_t l;
2020 
2021 	pr_debug("max_svm_range_pages 0x%llx adding [0x%llx 0x%llx]\n",
2022 		 max_pages, start, last);
2023 
2024 	while (last >= start) {
2025 		l = min(last, ALIGN_DOWN(start + max_pages, max_pages) - 1);
2026 
2027 		prange = svm_range_new(svms, start, l, true);
2028 		if (!prange)
2029 			return -ENOMEM;
2030 		list_add(&prange->list, insert_list);
2031 		list_add(&prange->update_list, update_list);
2032 
2033 		start = l + 1;
2034 	}
2035 	return 0;
2036 }
2037 
2038 /**
2039  * svm_range_add - add svm range and handle overlap
2040  * @p: the range add to this process svms
2041  * @start: page size aligned
2042  * @size: page size aligned
2043  * @nattr: number of attributes
2044  * @attrs: array of attributes
2045  * @update_list: output, the ranges need validate and update GPU mapping
2046  * @insert_list: output, the ranges need insert to svms
2047  * @remove_list: output, the ranges are replaced and need remove from svms
2048  *
2049  * Check if the virtual address range has overlap with any existing ranges,
2050  * split partly overlapping ranges and add new ranges in the gaps. All changes
2051  * should be applied to the range_list and interval tree transactionally. If
2052  * any range split or allocation fails, the entire update fails. Therefore any
2053  * existing overlapping svm_ranges are cloned and the original svm_ranges left
2054  * unchanged.
2055  *
2056  * If the transaction succeeds, the caller can update and insert clones and
2057  * new ranges, then free the originals.
2058  *
2059  * Otherwise the caller can free the clones and new ranges, while the old
2060  * svm_ranges remain unchanged.
2061  *
2062  * Context: Process context, caller must hold svms->lock
2063  *
2064  * Return:
2065  * 0 - OK, otherwise error code
2066  */
2067 static int
svm_range_add(struct kfd_process * p,uint64_t start,uint64_t size,uint32_t nattr,struct kfd_ioctl_svm_attribute * attrs,struct list_head * update_list,struct list_head * insert_list,struct list_head * remove_list)2068 svm_range_add(struct kfd_process *p, uint64_t start, uint64_t size,
2069 	      uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs,
2070 	      struct list_head *update_list, struct list_head *insert_list,
2071 	      struct list_head *remove_list)
2072 {
2073 	unsigned long last = start + size - 1UL;
2074 	struct svm_range_list *svms = &p->svms;
2075 	struct interval_tree_node *node;
2076 	struct svm_range *prange;
2077 	struct svm_range *tmp;
2078 	struct list_head new_list;
2079 	int r = 0;
2080 
2081 	pr_debug("svms 0x%p [0x%llx 0x%lx]\n", &p->svms, start, last);
2082 
2083 	INIT_LIST_HEAD(update_list);
2084 	INIT_LIST_HEAD(insert_list);
2085 	INIT_LIST_HEAD(remove_list);
2086 	INIT_LIST_HEAD(&new_list);
2087 
2088 	node = interval_tree_iter_first(&svms->objects, start, last);
2089 	while (node) {
2090 		struct interval_tree_node *next;
2091 		unsigned long next_start;
2092 
2093 		pr_debug("found overlap node [0x%lx 0x%lx]\n", node->start,
2094 			 node->last);
2095 
2096 		prange = container_of(node, struct svm_range, it_node);
2097 		next = interval_tree_iter_next(node, start, last);
2098 		next_start = min(node->last, last) + 1;
2099 
2100 		if (svm_range_is_same_attrs(p, prange, nattr, attrs)) {
2101 			/* nothing to do */
2102 		} else if (node->start < start || node->last > last) {
2103 			/* node intersects the update range and its attributes
2104 			 * will change. Clone and split it, apply updates only
2105 			 * to the overlapping part
2106 			 */
2107 			struct svm_range *old = prange;
2108 
2109 			prange = svm_range_clone(old);
2110 			if (!prange) {
2111 				r = -ENOMEM;
2112 				goto out;
2113 			}
2114 
2115 			list_add(&old->update_list, remove_list);
2116 			list_add(&prange->list, insert_list);
2117 			list_add(&prange->update_list, update_list);
2118 
2119 			if (node->start < start) {
2120 				pr_debug("change old range start\n");
2121 				r = svm_range_split_head(prange, start,
2122 							 insert_list);
2123 				if (r)
2124 					goto out;
2125 			}
2126 			if (node->last > last) {
2127 				pr_debug("change old range last\n");
2128 				r = svm_range_split_tail(prange, last,
2129 							 insert_list);
2130 				if (r)
2131 					goto out;
2132 			}
2133 		} else {
2134 			/* The node is contained within start..last,
2135 			 * just update it
2136 			 */
2137 			list_add(&prange->update_list, update_list);
2138 		}
2139 
2140 		/* insert a new node if needed */
2141 		if (node->start > start) {
2142 			r = svm_range_split_new(svms, start, node->start - 1,
2143 						READ_ONCE(max_svm_range_pages),
2144 						&new_list, update_list);
2145 			if (r)
2146 				goto out;
2147 		}
2148 
2149 		node = next;
2150 		start = next_start;
2151 	}
2152 
2153 	/* add a final range at the end if needed */
2154 	if (start <= last)
2155 		r = svm_range_split_new(svms, start, last,
2156 					READ_ONCE(max_svm_range_pages),
2157 					&new_list, update_list);
2158 
2159 out:
2160 	if (r) {
2161 		list_for_each_entry_safe(prange, tmp, insert_list, list)
2162 			svm_range_free(prange, false);
2163 		list_for_each_entry_safe(prange, tmp, &new_list, list)
2164 			svm_range_free(prange, true);
2165 	} else {
2166 		list_splice(&new_list, insert_list);
2167 	}
2168 
2169 	return r;
2170 }
2171 
2172 static void
svm_range_update_notifier_and_interval_tree(struct mm_struct * mm,struct svm_range * prange)2173 svm_range_update_notifier_and_interval_tree(struct mm_struct *mm,
2174 					    struct svm_range *prange)
2175 {
2176 	unsigned long start;
2177 	unsigned long last;
2178 
2179 	start = prange->notifier.interval_tree.start >> PAGE_SHIFT;
2180 	last = prange->notifier.interval_tree.last >> PAGE_SHIFT;
2181 
2182 	if (prange->start == start && prange->last == last)
2183 		return;
2184 
2185 	pr_debug("up notifier 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n",
2186 		  prange->svms, prange, start, last, prange->start,
2187 		  prange->last);
2188 
2189 	if (start != 0 && last != 0) {
2190 		interval_tree_remove(&prange->it_node, &prange->svms->objects);
2191 		svm_range_remove_notifier(prange);
2192 	}
2193 	prange->it_node.start = prange->start;
2194 	prange->it_node.last = prange->last;
2195 
2196 	interval_tree_insert(&prange->it_node, &prange->svms->objects);
2197 	svm_range_add_notifier_locked(mm, prange);
2198 }
2199 
2200 static void
svm_range_handle_list_op(struct svm_range_list * svms,struct svm_range * prange,struct mm_struct * mm)2201 svm_range_handle_list_op(struct svm_range_list *svms, struct svm_range *prange,
2202 			 struct mm_struct *mm)
2203 {
2204 	switch (prange->work_item.op) {
2205 	case SVM_OP_NULL:
2206 		pr_debug("NULL OP 0x%p prange 0x%p [0x%lx 0x%lx]\n",
2207 			 svms, prange, prange->start, prange->last);
2208 		break;
2209 	case SVM_OP_UNMAP_RANGE:
2210 		pr_debug("remove 0x%p prange 0x%p [0x%lx 0x%lx]\n",
2211 			 svms, prange, prange->start, prange->last);
2212 		svm_range_unlink(prange);
2213 		svm_range_remove_notifier(prange);
2214 		svm_range_free(prange, true);
2215 		break;
2216 	case SVM_OP_UPDATE_RANGE_NOTIFIER:
2217 		pr_debug("update notifier 0x%p prange 0x%p [0x%lx 0x%lx]\n",
2218 			 svms, prange, prange->start, prange->last);
2219 		svm_range_update_notifier_and_interval_tree(mm, prange);
2220 		break;
2221 	case SVM_OP_UPDATE_RANGE_NOTIFIER_AND_MAP:
2222 		pr_debug("update and map 0x%p prange 0x%p [0x%lx 0x%lx]\n",
2223 			 svms, prange, prange->start, prange->last);
2224 		svm_range_update_notifier_and_interval_tree(mm, prange);
2225 		/* TODO: implement deferred validation and mapping */
2226 		break;
2227 	case SVM_OP_ADD_RANGE:
2228 		pr_debug("add 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, prange,
2229 			 prange->start, prange->last);
2230 		svm_range_add_to_svms(prange);
2231 		svm_range_add_notifier_locked(mm, prange);
2232 		break;
2233 	case SVM_OP_ADD_RANGE_AND_MAP:
2234 		pr_debug("add and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms,
2235 			 prange, prange->start, prange->last);
2236 		svm_range_add_to_svms(prange);
2237 		svm_range_add_notifier_locked(mm, prange);
2238 		/* TODO: implement deferred validation and mapping */
2239 		break;
2240 	default:
2241 		WARN_ONCE(1, "Unknown prange 0x%p work op %d\n", prange,
2242 			 prange->work_item.op);
2243 	}
2244 }
2245 
svm_range_drain_retry_fault(struct svm_range_list * svms)2246 static void svm_range_drain_retry_fault(struct svm_range_list *svms)
2247 {
2248 	struct kfd_process_device *pdd;
2249 	struct kfd_process *p;
2250 	int drain;
2251 	uint32_t i;
2252 
2253 	p = container_of(svms, struct kfd_process, svms);
2254 
2255 restart:
2256 	drain = atomic_read(&svms->drain_pagefaults);
2257 	if (!drain)
2258 		return;
2259 
2260 	for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) {
2261 		pdd = p->pdds[i];
2262 		if (!pdd)
2263 			continue;
2264 
2265 		pr_debug("drain retry fault gpu %d svms %p\n", i, svms);
2266 
2267 		amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev,
2268 				pdd->dev->adev->irq.retry_cam_enabled ?
2269 				&pdd->dev->adev->irq.ih :
2270 				&pdd->dev->adev->irq.ih1);
2271 
2272 		if (pdd->dev->adev->irq.retry_cam_enabled)
2273 			amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev,
2274 				&pdd->dev->adev->irq.ih_soft);
2275 
2276 
2277 		pr_debug("drain retry fault gpu %d svms 0x%p done\n", i, svms);
2278 	}
2279 	if (atomic_cmpxchg(&svms->drain_pagefaults, drain, 0) != drain)
2280 		goto restart;
2281 }
2282 
svm_range_deferred_list_work(struct work_struct * work)2283 static void svm_range_deferred_list_work(struct work_struct *work)
2284 {
2285 	struct svm_range_list *svms;
2286 	struct svm_range *prange;
2287 	struct mm_struct *mm;
2288 
2289 	svms = container_of(work, struct svm_range_list, deferred_list_work);
2290 	pr_debug("enter svms 0x%p\n", svms);
2291 
2292 	spin_lock(&svms->deferred_list_lock);
2293 	while (!list_empty(&svms->deferred_range_list)) {
2294 		prange = list_first_entry(&svms->deferred_range_list,
2295 					  struct svm_range, deferred_list);
2296 		spin_unlock(&svms->deferred_list_lock);
2297 
2298 		pr_debug("prange 0x%p [0x%lx 0x%lx] op %d\n", prange,
2299 			 prange->start, prange->last, prange->work_item.op);
2300 
2301 		mm = prange->work_item.mm;
2302 retry:
2303 		mmap_write_lock(mm);
2304 
2305 		/* Checking for the need to drain retry faults must be inside
2306 		 * mmap write lock to serialize with munmap notifiers.
2307 		 */
2308 		if (unlikely(atomic_read(&svms->drain_pagefaults))) {
2309 			mmap_write_unlock(mm);
2310 			svm_range_drain_retry_fault(svms);
2311 			goto retry;
2312 		}
2313 
2314 		/* Remove from deferred_list must be inside mmap write lock, for
2315 		 * two race cases:
2316 		 * 1. unmap_from_cpu may change work_item.op and add the range
2317 		 *    to deferred_list again, cause use after free bug.
2318 		 * 2. svm_range_list_lock_and_flush_work may hold mmap write
2319 		 *    lock and continue because deferred_list is empty, but
2320 		 *    deferred_list work is actually waiting for mmap lock.
2321 		 */
2322 		spin_lock(&svms->deferred_list_lock);
2323 		list_del_init(&prange->deferred_list);
2324 		spin_unlock(&svms->deferred_list_lock);
2325 
2326 		mutex_lock(&svms->lock);
2327 		mutex_lock(&prange->migrate_mutex);
2328 		while (!list_empty(&prange->child_list)) {
2329 			struct svm_range *pchild;
2330 
2331 			pchild = list_first_entry(&prange->child_list,
2332 						struct svm_range, child_list);
2333 			pr_debug("child prange 0x%p op %d\n", pchild,
2334 				 pchild->work_item.op);
2335 			list_del_init(&pchild->child_list);
2336 			svm_range_handle_list_op(svms, pchild, mm);
2337 		}
2338 		mutex_unlock(&prange->migrate_mutex);
2339 
2340 		svm_range_handle_list_op(svms, prange, mm);
2341 		mutex_unlock(&svms->lock);
2342 		mmap_write_unlock(mm);
2343 
2344 		/* Pairs with mmget in svm_range_add_list_work */
2345 		mmput(mm);
2346 
2347 		spin_lock(&svms->deferred_list_lock);
2348 	}
2349 	spin_unlock(&svms->deferred_list_lock);
2350 	pr_debug("exit svms 0x%p\n", svms);
2351 }
2352 
2353 void
svm_range_add_list_work(struct svm_range_list * svms,struct svm_range * prange,struct mm_struct * mm,enum svm_work_list_ops op)2354 svm_range_add_list_work(struct svm_range_list *svms, struct svm_range *prange,
2355 			struct mm_struct *mm, enum svm_work_list_ops op)
2356 {
2357 	spin_lock(&svms->deferred_list_lock);
2358 	/* if prange is on the deferred list */
2359 	if (!list_empty(&prange->deferred_list)) {
2360 		pr_debug("update exist prange 0x%p work op %d\n", prange, op);
2361 		WARN_ONCE(prange->work_item.mm != mm, "unmatch mm\n");
2362 		if (op != SVM_OP_NULL &&
2363 		    prange->work_item.op != SVM_OP_UNMAP_RANGE)
2364 			prange->work_item.op = op;
2365 	} else {
2366 		prange->work_item.op = op;
2367 
2368 		/* Pairs with mmput in deferred_list_work */
2369 		mmget(mm);
2370 		prange->work_item.mm = mm;
2371 		list_add_tail(&prange->deferred_list,
2372 			      &prange->svms->deferred_range_list);
2373 		pr_debug("add prange 0x%p [0x%lx 0x%lx] to work list op %d\n",
2374 			 prange, prange->start, prange->last, op);
2375 	}
2376 	spin_unlock(&svms->deferred_list_lock);
2377 }
2378 
schedule_deferred_list_work(struct svm_range_list * svms)2379 void schedule_deferred_list_work(struct svm_range_list *svms)
2380 {
2381 	spin_lock(&svms->deferred_list_lock);
2382 	if (!list_empty(&svms->deferred_range_list))
2383 		schedule_work(&svms->deferred_list_work);
2384 	spin_unlock(&svms->deferred_list_lock);
2385 }
2386 
2387 static void
svm_range_unmap_split(struct mm_struct * mm,struct svm_range * parent,struct svm_range * prange,unsigned long start,unsigned long last)2388 svm_range_unmap_split(struct mm_struct *mm, struct svm_range *parent,
2389 		      struct svm_range *prange, unsigned long start,
2390 		      unsigned long last)
2391 {
2392 	struct svm_range *head;
2393 	struct svm_range *tail;
2394 
2395 	if (prange->work_item.op == SVM_OP_UNMAP_RANGE) {
2396 		pr_debug("prange 0x%p [0x%lx 0x%lx] is already freed\n", prange,
2397 			 prange->start, prange->last);
2398 		return;
2399 	}
2400 	if (start > prange->last || last < prange->start)
2401 		return;
2402 
2403 	head = tail = prange;
2404 	if (start > prange->start)
2405 		svm_range_split(prange, prange->start, start - 1, &tail);
2406 	if (last < tail->last)
2407 		svm_range_split(tail, last + 1, tail->last, &head);
2408 
2409 	if (head != prange && tail != prange) {
2410 		svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE);
2411 		svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE);
2412 	} else if (tail != prange) {
2413 		svm_range_add_child(parent, mm, tail, SVM_OP_UNMAP_RANGE);
2414 	} else if (head != prange) {
2415 		svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE);
2416 	} else if (parent != prange) {
2417 		prange->work_item.op = SVM_OP_UNMAP_RANGE;
2418 	}
2419 }
2420 
2421 static void
svm_range_unmap_from_cpu(struct mm_struct * mm,struct svm_range * prange,unsigned long start,unsigned long last)2422 svm_range_unmap_from_cpu(struct mm_struct *mm, struct svm_range *prange,
2423 			 unsigned long start, unsigned long last)
2424 {
2425 	uint32_t trigger = KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU;
2426 	struct svm_range_list *svms;
2427 	struct svm_range *pchild;
2428 	struct kfd_process *p;
2429 	unsigned long s, l;
2430 	bool unmap_parent;
2431 
2432 	p = kfd_lookup_process_by_mm(mm);
2433 	if (!p)
2434 		return;
2435 	svms = &p->svms;
2436 
2437 	pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", svms,
2438 		 prange, prange->start, prange->last, start, last);
2439 
2440 	/* Make sure pending page faults are drained in the deferred worker
2441 	 * before the range is freed to avoid straggler interrupts on
2442 	 * unmapped memory causing "phantom faults".
2443 	 */
2444 	atomic_inc(&svms->drain_pagefaults);
2445 
2446 	unmap_parent = start <= prange->start && last >= prange->last;
2447 
2448 	list_for_each_entry(pchild, &prange->child_list, child_list) {
2449 		mutex_lock_nested(&pchild->lock, 1);
2450 		s = max(start, pchild->start);
2451 		l = min(last, pchild->last);
2452 		if (l >= s)
2453 			svm_range_unmap_from_gpus(pchild, s, l, trigger);
2454 		svm_range_unmap_split(mm, prange, pchild, start, last);
2455 		mutex_unlock(&pchild->lock);
2456 	}
2457 	s = max(start, prange->start);
2458 	l = min(last, prange->last);
2459 	if (l >= s)
2460 		svm_range_unmap_from_gpus(prange, s, l, trigger);
2461 	svm_range_unmap_split(mm, prange, prange, start, last);
2462 
2463 	if (unmap_parent)
2464 		svm_range_add_list_work(svms, prange, mm, SVM_OP_UNMAP_RANGE);
2465 	else
2466 		svm_range_add_list_work(svms, prange, mm,
2467 					SVM_OP_UPDATE_RANGE_NOTIFIER);
2468 	schedule_deferred_list_work(svms);
2469 
2470 	kfd_unref_process(p);
2471 }
2472 
2473 /**
2474  * svm_range_cpu_invalidate_pagetables - interval notifier callback
2475  * @mni: mmu_interval_notifier struct
2476  * @range: mmu_notifier_range struct
2477  * @cur_seq: value to pass to mmu_interval_set_seq()
2478  *
2479  * If event is MMU_NOTIFY_UNMAP, this is from CPU unmap range, otherwise, it
2480  * is from migration, or CPU page invalidation callback.
2481  *
2482  * For unmap event, unmap range from GPUs, remove prange from svms in a delayed
2483  * work thread, and split prange if only part of prange is unmapped.
2484  *
2485  * For invalidation event, if GPU retry fault is not enabled, evict the queues,
2486  * then schedule svm_range_restore_work to update GPU mapping and resume queues.
2487  * If GPU retry fault is enabled, unmap the svm range from GPU, retry fault will
2488  * update GPU mapping to recover.
2489  *
2490  * Context: mmap lock, notifier_invalidate_start lock are held
2491  *          for invalidate event, prange lock is held if this is from migration
2492  */
2493 static bool
svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier * mni,const struct mmu_notifier_range * range,unsigned long cur_seq)2494 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni,
2495 				    const struct mmu_notifier_range *range,
2496 				    unsigned long cur_seq)
2497 {
2498 	struct svm_range *prange;
2499 	unsigned long start;
2500 	unsigned long last;
2501 
2502 	if (range->event == MMU_NOTIFY_RELEASE)
2503 		return true;
2504 	if (!mmget_not_zero(mni->mm))
2505 		return true;
2506 
2507 	start = mni->interval_tree.start;
2508 	last = mni->interval_tree.last;
2509 	start = max(start, range->start) >> PAGE_SHIFT;
2510 	last = min(last, range->end - 1) >> PAGE_SHIFT;
2511 	pr_debug("[0x%lx 0x%lx] range[0x%lx 0x%lx] notifier[0x%lx 0x%lx] %d\n",
2512 		 start, last, range->start >> PAGE_SHIFT,
2513 		 (range->end - 1) >> PAGE_SHIFT,
2514 		 mni->interval_tree.start >> PAGE_SHIFT,
2515 		 mni->interval_tree.last >> PAGE_SHIFT, range->event);
2516 
2517 	prange = container_of(mni, struct svm_range, notifier);
2518 
2519 	svm_range_lock(prange);
2520 	mmu_interval_set_seq(mni, cur_seq);
2521 
2522 	switch (range->event) {
2523 	case MMU_NOTIFY_UNMAP:
2524 		svm_range_unmap_from_cpu(mni->mm, prange, start, last);
2525 		break;
2526 	default:
2527 		svm_range_evict(prange, mni->mm, start, last, range->event);
2528 		break;
2529 	}
2530 
2531 	svm_range_unlock(prange);
2532 	mmput(mni->mm);
2533 
2534 	return true;
2535 }
2536 
2537 /**
2538  * svm_range_from_addr - find svm range from fault address
2539  * @svms: svm range list header
2540  * @addr: address to search range interval tree, in pages
2541  * @parent: parent range if range is on child list
2542  *
2543  * Context: The caller must hold svms->lock
2544  *
2545  * Return: the svm_range found or NULL
2546  */
2547 struct svm_range *
svm_range_from_addr(struct svm_range_list * svms,unsigned long addr,struct svm_range ** parent)2548 svm_range_from_addr(struct svm_range_list *svms, unsigned long addr,
2549 		    struct svm_range **parent)
2550 {
2551 	struct interval_tree_node *node;
2552 	struct svm_range *prange;
2553 	struct svm_range *pchild;
2554 
2555 	node = interval_tree_iter_first(&svms->objects, addr, addr);
2556 	if (!node)
2557 		return NULL;
2558 
2559 	prange = container_of(node, struct svm_range, it_node);
2560 	pr_debug("address 0x%lx prange [0x%lx 0x%lx] node [0x%lx 0x%lx]\n",
2561 		 addr, prange->start, prange->last, node->start, node->last);
2562 
2563 	if (addr >= prange->start && addr <= prange->last) {
2564 		if (parent)
2565 			*parent = prange;
2566 		return prange;
2567 	}
2568 	list_for_each_entry(pchild, &prange->child_list, child_list)
2569 		if (addr >= pchild->start && addr <= pchild->last) {
2570 			pr_debug("found address 0x%lx pchild [0x%lx 0x%lx]\n",
2571 				 addr, pchild->start, pchild->last);
2572 			if (parent)
2573 				*parent = prange;
2574 			return pchild;
2575 		}
2576 
2577 	return NULL;
2578 }
2579 
2580 /* svm_range_best_restore_location - decide the best fault restore location
2581  * @prange: svm range structure
2582  * @adev: the GPU on which vm fault happened
2583  *
2584  * This is only called when xnack is on, to decide the best location to restore
2585  * the range mapping after GPU vm fault. Caller uses the best location to do
2586  * migration if actual loc is not best location, then update GPU page table
2587  * mapping to the best location.
2588  *
2589  * If the preferred loc is accessible by faulting GPU, use preferred loc.
2590  * If vm fault gpu idx is on range ACCESSIBLE bitmap, best_loc is vm fault gpu
2591  * If vm fault gpu idx is on range ACCESSIBLE_IN_PLACE bitmap, then
2592  *    if range actual loc is cpu, best_loc is cpu
2593  *    if vm fault gpu is on xgmi same hive of range actual loc gpu, best_loc is
2594  *    range actual loc.
2595  * Otherwise, GPU no access, best_loc is -1.
2596  *
2597  * Return:
2598  * -1 means vm fault GPU no access
2599  * 0 for CPU or GPU id
2600  */
2601 static int32_t
svm_range_best_restore_location(struct svm_range * prange,struct kfd_node * node,int32_t * gpuidx)2602 svm_range_best_restore_location(struct svm_range *prange,
2603 				struct kfd_node *node,
2604 				int32_t *gpuidx)
2605 {
2606 	struct kfd_node *bo_node, *preferred_node;
2607 	struct kfd_process *p;
2608 	uint32_t gpuid;
2609 	int r;
2610 
2611 	p = container_of(prange->svms, struct kfd_process, svms);
2612 
2613 	r = kfd_process_gpuid_from_node(p, node, &gpuid, gpuidx);
2614 	if (r < 0) {
2615 		pr_debug("failed to get gpuid from kgd\n");
2616 		return -1;
2617 	}
2618 
2619 	if (node->adev->gmc.is_app_apu)
2620 		return 0;
2621 
2622 	if (prange->preferred_loc == gpuid ||
2623 	    prange->preferred_loc == KFD_IOCTL_SVM_LOCATION_SYSMEM) {
2624 		return prange->preferred_loc;
2625 	} else if (prange->preferred_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED) {
2626 		preferred_node = svm_range_get_node_by_id(prange, prange->preferred_loc);
2627 		if (preferred_node && svm_nodes_in_same_hive(node, preferred_node))
2628 			return prange->preferred_loc;
2629 		/* fall through */
2630 	}
2631 
2632 	if (test_bit(*gpuidx, prange->bitmap_access))
2633 		return gpuid;
2634 
2635 	if (test_bit(*gpuidx, prange->bitmap_aip)) {
2636 		if (!prange->actual_loc)
2637 			return 0;
2638 
2639 		bo_node = svm_range_get_node_by_id(prange, prange->actual_loc);
2640 		if (bo_node && svm_nodes_in_same_hive(node, bo_node))
2641 			return prange->actual_loc;
2642 		else
2643 			return 0;
2644 	}
2645 
2646 	return -1;
2647 }
2648 
2649 static int
svm_range_get_range_boundaries(struct kfd_process * p,int64_t addr,unsigned long * start,unsigned long * last,bool * is_heap_stack)2650 svm_range_get_range_boundaries(struct kfd_process *p, int64_t addr,
2651 			       unsigned long *start, unsigned long *last,
2652 			       bool *is_heap_stack)
2653 {
2654 	struct vm_area_struct *vma;
2655 	struct interval_tree_node *node;
2656 	unsigned long start_limit, end_limit;
2657 
2658 	vma = vma_lookup(p->mm, addr << PAGE_SHIFT);
2659 	if (!vma) {
2660 		pr_debug("VMA does not exist in address [0x%llx]\n", addr);
2661 		return -EFAULT;
2662 	}
2663 
2664 	*is_heap_stack = vma_is_initial_heap(vma) || vma_is_initial_stack(vma);
2665 
2666 	start_limit = max(vma->vm_start >> PAGE_SHIFT,
2667 		      (unsigned long)ALIGN_DOWN(addr, 2UL << 8));
2668 	end_limit = min(vma->vm_end >> PAGE_SHIFT,
2669 		    (unsigned long)ALIGN(addr + 1, 2UL << 8));
2670 	/* First range that starts after the fault address */
2671 	node = interval_tree_iter_first(&p->svms.objects, addr + 1, ULONG_MAX);
2672 	if (node) {
2673 		end_limit = min(end_limit, node->start);
2674 		/* Last range that ends before the fault address */
2675 		node = container_of(rb_prev(&node->rb),
2676 				    struct interval_tree_node, rb);
2677 	} else {
2678 		/* Last range must end before addr because
2679 		 * there was no range after addr
2680 		 */
2681 		node = container_of(rb_last(&p->svms.objects.rb_root),
2682 				    struct interval_tree_node, rb);
2683 	}
2684 	if (node) {
2685 		if (node->last >= addr) {
2686 			WARN(1, "Overlap with prev node and page fault addr\n");
2687 			return -EFAULT;
2688 		}
2689 		start_limit = max(start_limit, node->last + 1);
2690 	}
2691 
2692 	*start = start_limit;
2693 	*last = end_limit - 1;
2694 
2695 	pr_debug("vma [0x%lx 0x%lx] range [0x%lx 0x%lx] is_heap_stack %d\n",
2696 		 vma->vm_start >> PAGE_SHIFT, vma->vm_end >> PAGE_SHIFT,
2697 		 *start, *last, *is_heap_stack);
2698 
2699 	return 0;
2700 }
2701 
2702 static int
svm_range_check_vm_userptr(struct kfd_process * p,uint64_t start,uint64_t last,uint64_t * bo_s,uint64_t * bo_l)2703 svm_range_check_vm_userptr(struct kfd_process *p, uint64_t start, uint64_t last,
2704 			   uint64_t *bo_s, uint64_t *bo_l)
2705 {
2706 	struct amdgpu_bo_va_mapping *mapping;
2707 	struct interval_tree_node *node;
2708 	struct amdgpu_bo *bo = NULL;
2709 	unsigned long userptr;
2710 	uint32_t i;
2711 	int r;
2712 
2713 	for (i = 0; i < p->n_pdds; i++) {
2714 		struct amdgpu_vm *vm;
2715 
2716 		if (!p->pdds[i]->drm_priv)
2717 			continue;
2718 
2719 		vm = drm_priv_to_vm(p->pdds[i]->drm_priv);
2720 		r = amdgpu_bo_reserve(vm->root.bo, false);
2721 		if (r)
2722 			return r;
2723 
2724 		/* Check userptr by searching entire vm->va interval tree */
2725 		node = interval_tree_iter_first(&vm->va, 0, ~0ULL);
2726 		while (node) {
2727 			mapping = container_of((struct rb_node *)node,
2728 					       struct amdgpu_bo_va_mapping, rb);
2729 			bo = mapping->bo_va->base.bo;
2730 
2731 			if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm,
2732 							 start << PAGE_SHIFT,
2733 							 last << PAGE_SHIFT,
2734 							 &userptr)) {
2735 				node = interval_tree_iter_next(node, 0, ~0ULL);
2736 				continue;
2737 			}
2738 
2739 			pr_debug("[0x%llx 0x%llx] already userptr mapped\n",
2740 				 start, last);
2741 			if (bo_s && bo_l) {
2742 				*bo_s = userptr >> PAGE_SHIFT;
2743 				*bo_l = *bo_s + bo->tbo.ttm->num_pages - 1;
2744 			}
2745 			amdgpu_bo_unreserve(vm->root.bo);
2746 			return -EADDRINUSE;
2747 		}
2748 		amdgpu_bo_unreserve(vm->root.bo);
2749 	}
2750 	return 0;
2751 }
2752 
2753 static struct
svm_range_create_unregistered_range(struct kfd_node * node,struct kfd_process * p,struct mm_struct * mm,int64_t addr)2754 svm_range *svm_range_create_unregistered_range(struct kfd_node *node,
2755 						struct kfd_process *p,
2756 						struct mm_struct *mm,
2757 						int64_t addr)
2758 {
2759 	struct svm_range *prange = NULL;
2760 	unsigned long start, last;
2761 	uint32_t gpuid, gpuidx;
2762 	bool is_heap_stack;
2763 	uint64_t bo_s = 0;
2764 	uint64_t bo_l = 0;
2765 	int r;
2766 
2767 	if (svm_range_get_range_boundaries(p, addr, &start, &last,
2768 					   &is_heap_stack))
2769 		return NULL;
2770 
2771 	r = svm_range_check_vm(p, start, last, &bo_s, &bo_l);
2772 	if (r != -EADDRINUSE)
2773 		r = svm_range_check_vm_userptr(p, start, last, &bo_s, &bo_l);
2774 
2775 	if (r == -EADDRINUSE) {
2776 		if (addr >= bo_s && addr <= bo_l)
2777 			return NULL;
2778 
2779 		/* Create one page svm range if 2MB range overlapping */
2780 		start = addr;
2781 		last = addr;
2782 	}
2783 
2784 	prange = svm_range_new(&p->svms, start, last, true);
2785 	if (!prange) {
2786 		pr_debug("Failed to create prange in address [0x%llx]\n", addr);
2787 		return NULL;
2788 	}
2789 	if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) {
2790 		pr_debug("failed to get gpuid from kgd\n");
2791 		svm_range_free(prange, true);
2792 		return NULL;
2793 	}
2794 
2795 	if (is_heap_stack)
2796 		prange->preferred_loc = KFD_IOCTL_SVM_LOCATION_SYSMEM;
2797 
2798 	svm_range_add_to_svms(prange);
2799 	svm_range_add_notifier_locked(mm, prange);
2800 
2801 	return prange;
2802 }
2803 
2804 /* svm_range_skip_recover - decide if prange can be recovered
2805  * @prange: svm range structure
2806  *
2807  * GPU vm retry fault handle skip recover the range for cases:
2808  * 1. prange is on deferred list to be removed after unmap, it is stale fault,
2809  *    deferred list work will drain the stale fault before free the prange.
2810  * 2. prange is on deferred list to add interval notifier after split, or
2811  * 3. prange is child range, it is split from parent prange, recover later
2812  *    after interval notifier is added.
2813  *
2814  * Return: true to skip recover, false to recover
2815  */
svm_range_skip_recover(struct svm_range * prange)2816 static bool svm_range_skip_recover(struct svm_range *prange)
2817 {
2818 	struct svm_range_list *svms = prange->svms;
2819 
2820 	spin_lock(&svms->deferred_list_lock);
2821 	if (list_empty(&prange->deferred_list) &&
2822 	    list_empty(&prange->child_list)) {
2823 		spin_unlock(&svms->deferred_list_lock);
2824 		return false;
2825 	}
2826 	spin_unlock(&svms->deferred_list_lock);
2827 
2828 	if (prange->work_item.op == SVM_OP_UNMAP_RANGE) {
2829 		pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] unmapped\n",
2830 			 svms, prange, prange->start, prange->last);
2831 		return true;
2832 	}
2833 	if (prange->work_item.op == SVM_OP_ADD_RANGE_AND_MAP ||
2834 	    prange->work_item.op == SVM_OP_ADD_RANGE) {
2835 		pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] not added yet\n",
2836 			 svms, prange, prange->start, prange->last);
2837 		return true;
2838 	}
2839 	return false;
2840 }
2841 
2842 static void
svm_range_count_fault(struct kfd_node * node,struct kfd_process * p,int32_t gpuidx)2843 svm_range_count_fault(struct kfd_node *node, struct kfd_process *p,
2844 		      int32_t gpuidx)
2845 {
2846 	struct kfd_process_device *pdd;
2847 
2848 	/* fault is on different page of same range
2849 	 * or fault is skipped to recover later
2850 	 * or fault is on invalid virtual address
2851 	 */
2852 	if (gpuidx == MAX_GPU_INSTANCE) {
2853 		uint32_t gpuid;
2854 		int r;
2855 
2856 		r = kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx);
2857 		if (r < 0)
2858 			return;
2859 	}
2860 
2861 	/* fault is recovered
2862 	 * or fault cannot recover because GPU no access on the range
2863 	 */
2864 	pdd = kfd_process_device_from_gpuidx(p, gpuidx);
2865 	if (pdd)
2866 		WRITE_ONCE(pdd->faults, pdd->faults + 1);
2867 }
2868 
2869 static bool
svm_fault_allowed(struct vm_area_struct * vma,bool write_fault)2870 svm_fault_allowed(struct vm_area_struct *vma, bool write_fault)
2871 {
2872 	unsigned long requested = VM_READ;
2873 
2874 	if (write_fault)
2875 		requested |= VM_WRITE;
2876 
2877 	pr_debug("requested 0x%lx, vma permission flags 0x%lx\n", requested,
2878 		vma->vm_flags);
2879 	return (vma->vm_flags & requested) == requested;
2880 }
2881 
2882 int
svm_range_restore_pages(struct amdgpu_device * adev,unsigned int pasid,uint32_t vmid,uint32_t node_id,uint64_t addr,bool write_fault)2883 svm_range_restore_pages(struct amdgpu_device *adev, unsigned int pasid,
2884 			uint32_t vmid, uint32_t node_id,
2885 			uint64_t addr, bool write_fault)
2886 {
2887 	struct mm_struct *mm = NULL;
2888 	struct svm_range_list *svms;
2889 	struct svm_range *prange;
2890 	struct kfd_process *p;
2891 	ktime_t timestamp = ktime_get_boottime();
2892 	struct kfd_node *node;
2893 	int32_t best_loc;
2894 	int32_t gpuidx = MAX_GPU_INSTANCE;
2895 	bool write_locked = false;
2896 	struct vm_area_struct *vma;
2897 	bool migration = false;
2898 	int r = 0;
2899 
2900 	if (!KFD_IS_SVM_API_SUPPORTED(adev)) {
2901 		pr_debug("device does not support SVM\n");
2902 		return -EFAULT;
2903 	}
2904 
2905 	p = kfd_lookup_process_by_pasid(pasid);
2906 	if (!p) {
2907 		pr_debug("kfd process not founded pasid 0x%x\n", pasid);
2908 		return 0;
2909 	}
2910 	svms = &p->svms;
2911 
2912 	pr_debug("restoring svms 0x%p fault address 0x%llx\n", svms, addr);
2913 
2914 	if (atomic_read(&svms->drain_pagefaults)) {
2915 		pr_debug("draining retry fault, drop fault 0x%llx\n", addr);
2916 		r = 0;
2917 		goto out;
2918 	}
2919 
2920 	if (!p->xnack_enabled) {
2921 		pr_debug("XNACK not enabled for pasid 0x%x\n", pasid);
2922 		r = -EFAULT;
2923 		goto out;
2924 	}
2925 
2926 	/* p->lead_thread is available as kfd_process_wq_release flush the work
2927 	 * before releasing task ref.
2928 	 */
2929 	mm = get_task_mm(p->lead_thread);
2930 	if (!mm) {
2931 		pr_debug("svms 0x%p failed to get mm\n", svms);
2932 		r = 0;
2933 		goto out;
2934 	}
2935 
2936 	node = kfd_node_by_irq_ids(adev, node_id, vmid);
2937 	if (!node) {
2938 		pr_debug("kfd node does not exist node_id: %d, vmid: %d\n", node_id,
2939 			 vmid);
2940 		r = -EFAULT;
2941 		goto out;
2942 	}
2943 	mmap_read_lock(mm);
2944 retry_write_locked:
2945 	mutex_lock(&svms->lock);
2946 	prange = svm_range_from_addr(svms, addr, NULL);
2947 	if (!prange) {
2948 		pr_debug("failed to find prange svms 0x%p address [0x%llx]\n",
2949 			 svms, addr);
2950 		if (!write_locked) {
2951 			/* Need the write lock to create new range with MMU notifier.
2952 			 * Also flush pending deferred work to make sure the interval
2953 			 * tree is up to date before we add a new range
2954 			 */
2955 			mutex_unlock(&svms->lock);
2956 			mmap_read_unlock(mm);
2957 			mmap_write_lock(mm);
2958 			write_locked = true;
2959 			goto retry_write_locked;
2960 		}
2961 		prange = svm_range_create_unregistered_range(node, p, mm, addr);
2962 		if (!prange) {
2963 			pr_debug("failed to create unregistered range svms 0x%p address [0x%llx]\n",
2964 				 svms, addr);
2965 			mmap_write_downgrade(mm);
2966 			r = -EFAULT;
2967 			goto out_unlock_svms;
2968 		}
2969 	}
2970 	if (write_locked)
2971 		mmap_write_downgrade(mm);
2972 
2973 	mutex_lock(&prange->migrate_mutex);
2974 
2975 	if (svm_range_skip_recover(prange)) {
2976 		amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid);
2977 		r = 0;
2978 		goto out_unlock_range;
2979 	}
2980 
2981 	/* skip duplicate vm fault on different pages of same range */
2982 	if (ktime_before(timestamp, ktime_add_ns(prange->validate_timestamp,
2983 				AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING))) {
2984 		pr_debug("svms 0x%p [0x%lx %lx] already restored\n",
2985 			 svms, prange->start, prange->last);
2986 		r = 0;
2987 		goto out_unlock_range;
2988 	}
2989 
2990 	/* __do_munmap removed VMA, return success as we are handling stale
2991 	 * retry fault.
2992 	 */
2993 	vma = vma_lookup(mm, addr << PAGE_SHIFT);
2994 	if (!vma) {
2995 		pr_debug("address 0x%llx VMA is removed\n", addr);
2996 		r = 0;
2997 		goto out_unlock_range;
2998 	}
2999 
3000 	if (!svm_fault_allowed(vma, write_fault)) {
3001 		pr_debug("fault addr 0x%llx no %s permission\n", addr,
3002 			write_fault ? "write" : "read");
3003 		r = -EPERM;
3004 		goto out_unlock_range;
3005 	}
3006 
3007 	best_loc = svm_range_best_restore_location(prange, node, &gpuidx);
3008 	if (best_loc == -1) {
3009 		pr_debug("svms %p failed get best restore loc [0x%lx 0x%lx]\n",
3010 			 svms, prange->start, prange->last);
3011 		r = -EACCES;
3012 		goto out_unlock_range;
3013 	}
3014 
3015 	pr_debug("svms %p [0x%lx 0x%lx] best restore 0x%x, actual loc 0x%x\n",
3016 		 svms, prange->start, prange->last, best_loc,
3017 		 prange->actual_loc);
3018 
3019 	kfd_smi_event_page_fault_start(node, p->lead_thread->pid, addr,
3020 				       write_fault, timestamp);
3021 
3022 	if (prange->actual_loc != best_loc) {
3023 		migration = true;
3024 		if (best_loc) {
3025 			r = svm_migrate_to_vram(prange, best_loc, mm,
3026 					KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU);
3027 			if (r) {
3028 				pr_debug("svm_migrate_to_vram failed (%d) at %llx, falling back to system memory\n",
3029 					 r, addr);
3030 				/* Fallback to system memory if migration to
3031 				 * VRAM failed
3032 				 */
3033 				if (prange->actual_loc)
3034 					r = svm_migrate_vram_to_ram(prange, mm,
3035 					   KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU,
3036 					   NULL);
3037 				else
3038 					r = 0;
3039 			}
3040 		} else {
3041 			r = svm_migrate_vram_to_ram(prange, mm,
3042 					KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU,
3043 					NULL);
3044 		}
3045 		if (r) {
3046 			pr_debug("failed %d to migrate svms %p [0x%lx 0x%lx]\n",
3047 				 r, svms, prange->start, prange->last);
3048 			goto out_unlock_range;
3049 		}
3050 	}
3051 
3052 	r = svm_range_validate_and_map(mm, prange, gpuidx, false, false, false);
3053 	if (r)
3054 		pr_debug("failed %d to map svms 0x%p [0x%lx 0x%lx] to gpus\n",
3055 			 r, svms, prange->start, prange->last);
3056 
3057 	kfd_smi_event_page_fault_end(node, p->lead_thread->pid, addr,
3058 				     migration);
3059 
3060 out_unlock_range:
3061 	mutex_unlock(&prange->migrate_mutex);
3062 out_unlock_svms:
3063 	mutex_unlock(&svms->lock);
3064 	mmap_read_unlock(mm);
3065 
3066 	svm_range_count_fault(node, p, gpuidx);
3067 
3068 	mmput(mm);
3069 out:
3070 	kfd_unref_process(p);
3071 
3072 	if (r == -EAGAIN) {
3073 		pr_debug("recover vm fault later\n");
3074 		amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid);
3075 		r = 0;
3076 	}
3077 	return r;
3078 }
3079 
3080 int
svm_range_switch_xnack_reserve_mem(struct kfd_process * p,bool xnack_enabled)3081 svm_range_switch_xnack_reserve_mem(struct kfd_process *p, bool xnack_enabled)
3082 {
3083 	struct svm_range *prange, *pchild;
3084 	uint64_t reserved_size = 0;
3085 	uint64_t size;
3086 	int r = 0;
3087 
3088 	pr_debug("switching xnack from %d to %d\n", p->xnack_enabled, xnack_enabled);
3089 
3090 	mutex_lock(&p->svms.lock);
3091 
3092 	list_for_each_entry(prange, &p->svms.list, list) {
3093 		svm_range_lock(prange);
3094 		list_for_each_entry(pchild, &prange->child_list, child_list) {
3095 			size = (pchild->last - pchild->start + 1) << PAGE_SHIFT;
3096 			if (xnack_enabled) {
3097 				amdgpu_amdkfd_unreserve_mem_limit(NULL, size,
3098 					KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0);
3099 			} else {
3100 				r = amdgpu_amdkfd_reserve_mem_limit(NULL, size,
3101 					KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0);
3102 				if (r)
3103 					goto out_unlock;
3104 				reserved_size += size;
3105 			}
3106 		}
3107 
3108 		size = (prange->last - prange->start + 1) << PAGE_SHIFT;
3109 		if (xnack_enabled) {
3110 			amdgpu_amdkfd_unreserve_mem_limit(NULL, size,
3111 					KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0);
3112 		} else {
3113 			r = amdgpu_amdkfd_reserve_mem_limit(NULL, size,
3114 					KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0);
3115 			if (r)
3116 				goto out_unlock;
3117 			reserved_size += size;
3118 		}
3119 out_unlock:
3120 		svm_range_unlock(prange);
3121 		if (r)
3122 			break;
3123 	}
3124 
3125 	if (r)
3126 		amdgpu_amdkfd_unreserve_mem_limit(NULL, reserved_size,
3127 					KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0);
3128 	else
3129 		/* Change xnack mode must be inside svms lock, to avoid race with
3130 		 * svm_range_deferred_list_work unreserve memory in parallel.
3131 		 */
3132 		p->xnack_enabled = xnack_enabled;
3133 
3134 	mutex_unlock(&p->svms.lock);
3135 	return r;
3136 }
3137 
svm_range_list_fini(struct kfd_process * p)3138 void svm_range_list_fini(struct kfd_process *p)
3139 {
3140 	struct svm_range *prange;
3141 	struct svm_range *next;
3142 
3143 	pr_debug("pasid 0x%x svms 0x%p\n", p->pasid, &p->svms);
3144 
3145 	cancel_delayed_work_sync(&p->svms.restore_work);
3146 
3147 	/* Ensure list work is finished before process is destroyed */
3148 	flush_work(&p->svms.deferred_list_work);
3149 
3150 	/*
3151 	 * Ensure no retry fault comes in afterwards, as page fault handler will
3152 	 * not find kfd process and take mm lock to recover fault.
3153 	 */
3154 	atomic_inc(&p->svms.drain_pagefaults);
3155 	svm_range_drain_retry_fault(&p->svms);
3156 
3157 	list_for_each_entry_safe(prange, next, &p->svms.list, list) {
3158 		svm_range_unlink(prange);
3159 		svm_range_remove_notifier(prange);
3160 		svm_range_free(prange, true);
3161 	}
3162 
3163 	mutex_destroy(&p->svms.lock);
3164 
3165 	pr_debug("pasid 0x%x svms 0x%p done\n", p->pasid, &p->svms);
3166 }
3167 
svm_range_list_init(struct kfd_process * p)3168 int svm_range_list_init(struct kfd_process *p)
3169 {
3170 	struct svm_range_list *svms = &p->svms;
3171 	int i;
3172 
3173 	svms->objects = RB_ROOT_CACHED;
3174 	mutex_init(&svms->lock);
3175 	INIT_LIST_HEAD(&svms->list);
3176 	atomic_set(&svms->evicted_ranges, 0);
3177 	atomic_set(&svms->drain_pagefaults, 0);
3178 	INIT_DELAYED_WORK(&svms->restore_work, svm_range_restore_work);
3179 	INIT_WORK(&svms->deferred_list_work, svm_range_deferred_list_work);
3180 	INIT_LIST_HEAD(&svms->deferred_range_list);
3181 	INIT_LIST_HEAD(&svms->criu_svm_metadata_list);
3182 	spin_lock_init(&svms->deferred_list_lock);
3183 
3184 	for (i = 0; i < p->n_pdds; i++)
3185 		if (KFD_IS_SVM_API_SUPPORTED(p->pdds[i]->dev->adev))
3186 			bitmap_set(svms->bitmap_supported, i, 1);
3187 
3188 	return 0;
3189 }
3190 
3191 /**
3192  * svm_range_check_vm - check if virtual address range mapped already
3193  * @p: current kfd_process
3194  * @start: range start address, in pages
3195  * @last: range last address, in pages
3196  * @bo_s: mapping start address in pages if address range already mapped
3197  * @bo_l: mapping last address in pages if address range already mapped
3198  *
3199  * The purpose is to avoid virtual address ranges already allocated by
3200  * kfd_ioctl_alloc_memory_of_gpu ioctl.
3201  * It looks for each pdd in the kfd_process.
3202  *
3203  * Context: Process context
3204  *
3205  * Return 0 - OK, if the range is not mapped.
3206  * Otherwise error code:
3207  * -EADDRINUSE - if address is mapped already by kfd_ioctl_alloc_memory_of_gpu
3208  * -ERESTARTSYS - A wait for the buffer to become unreserved was interrupted by
3209  * a signal. Release all buffer reservations and return to user-space.
3210  */
3211 static int
svm_range_check_vm(struct kfd_process * p,uint64_t start,uint64_t last,uint64_t * bo_s,uint64_t * bo_l)3212 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last,
3213 		   uint64_t *bo_s, uint64_t *bo_l)
3214 {
3215 	struct amdgpu_bo_va_mapping *mapping;
3216 	struct interval_tree_node *node;
3217 	uint32_t i;
3218 	int r;
3219 
3220 	for (i = 0; i < p->n_pdds; i++) {
3221 		struct amdgpu_vm *vm;
3222 
3223 		if (!p->pdds[i]->drm_priv)
3224 			continue;
3225 
3226 		vm = drm_priv_to_vm(p->pdds[i]->drm_priv);
3227 		r = amdgpu_bo_reserve(vm->root.bo, false);
3228 		if (r)
3229 			return r;
3230 
3231 		node = interval_tree_iter_first(&vm->va, start, last);
3232 		if (node) {
3233 			pr_debug("range [0x%llx 0x%llx] already TTM mapped\n",
3234 				 start, last);
3235 			mapping = container_of((struct rb_node *)node,
3236 					       struct amdgpu_bo_va_mapping, rb);
3237 			if (bo_s && bo_l) {
3238 				*bo_s = mapping->start;
3239 				*bo_l = mapping->last;
3240 			}
3241 			amdgpu_bo_unreserve(vm->root.bo);
3242 			return -EADDRINUSE;
3243 		}
3244 		amdgpu_bo_unreserve(vm->root.bo);
3245 	}
3246 
3247 	return 0;
3248 }
3249 
3250 /**
3251  * svm_range_is_valid - check if virtual address range is valid
3252  * @p: current kfd_process
3253  * @start: range start address, in pages
3254  * @size: range size, in pages
3255  *
3256  * Valid virtual address range means it belongs to one or more VMAs
3257  *
3258  * Context: Process context
3259  *
3260  * Return:
3261  *  0 - OK, otherwise error code
3262  */
3263 static int
svm_range_is_valid(struct kfd_process * p,uint64_t start,uint64_t size)3264 svm_range_is_valid(struct kfd_process *p, uint64_t start, uint64_t size)
3265 {
3266 	const unsigned long device_vma = VM_IO | VM_PFNMAP | VM_MIXEDMAP;
3267 	struct vm_area_struct *vma;
3268 	unsigned long end;
3269 	unsigned long start_unchg = start;
3270 
3271 	start <<= PAGE_SHIFT;
3272 	end = start + (size << PAGE_SHIFT);
3273 	do {
3274 		vma = vma_lookup(p->mm, start);
3275 		if (!vma || (vma->vm_flags & device_vma))
3276 			return -EFAULT;
3277 		start = min(end, vma->vm_end);
3278 	} while (start < end);
3279 
3280 	return svm_range_check_vm(p, start_unchg, (end - 1) >> PAGE_SHIFT, NULL,
3281 				  NULL);
3282 }
3283 
3284 /**
3285  * svm_range_best_prefetch_location - decide the best prefetch location
3286  * @prange: svm range structure
3287  *
3288  * For xnack off:
3289  * If range map to single GPU, the best prefetch location is prefetch_loc, which
3290  * can be CPU or GPU.
3291  *
3292  * If range is ACCESS or ACCESS_IN_PLACE by mGPUs, only if mGPU connection on
3293  * XGMI same hive, the best prefetch location is prefetch_loc GPU, othervise
3294  * the best prefetch location is always CPU, because GPU can not have coherent
3295  * mapping VRAM of other GPUs even with large-BAR PCIe connection.
3296  *
3297  * For xnack on:
3298  * If range is not ACCESS_IN_PLACE by mGPUs, the best prefetch location is
3299  * prefetch_loc, other GPU access will generate vm fault and trigger migration.
3300  *
3301  * If range is ACCESS_IN_PLACE by mGPUs, only if mGPU connection on XGMI same
3302  * hive, the best prefetch location is prefetch_loc GPU, otherwise the best
3303  * prefetch location is always CPU.
3304  *
3305  * Context: Process context
3306  *
3307  * Return:
3308  * 0 for CPU or GPU id
3309  */
3310 static uint32_t
svm_range_best_prefetch_location(struct svm_range * prange)3311 svm_range_best_prefetch_location(struct svm_range *prange)
3312 {
3313 	DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE);
3314 	uint32_t best_loc = prange->prefetch_loc;
3315 	struct kfd_process_device *pdd;
3316 	struct kfd_node *bo_node;
3317 	struct kfd_process *p;
3318 	uint32_t gpuidx;
3319 
3320 	p = container_of(prange->svms, struct kfd_process, svms);
3321 
3322 	if (!best_loc || best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED)
3323 		goto out;
3324 
3325 	bo_node = svm_range_get_node_by_id(prange, best_loc);
3326 	if (!bo_node) {
3327 		WARN_ONCE(1, "failed to get valid kfd node at id%x\n", best_loc);
3328 		best_loc = 0;
3329 		goto out;
3330 	}
3331 
3332 	if (bo_node->adev->gmc.is_app_apu) {
3333 		best_loc = 0;
3334 		goto out;
3335 	}
3336 
3337 	if (p->xnack_enabled)
3338 		bitmap_copy(bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE);
3339 	else
3340 		bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip,
3341 			  MAX_GPU_INSTANCE);
3342 
3343 	for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) {
3344 		pdd = kfd_process_device_from_gpuidx(p, gpuidx);
3345 		if (!pdd) {
3346 			pr_debug("failed to get device by idx 0x%x\n", gpuidx);
3347 			continue;
3348 		}
3349 
3350 		if (pdd->dev->adev == bo_node->adev)
3351 			continue;
3352 
3353 		if (!svm_nodes_in_same_hive(pdd->dev, bo_node)) {
3354 			best_loc = 0;
3355 			break;
3356 		}
3357 	}
3358 
3359 out:
3360 	pr_debug("xnack %d svms 0x%p [0x%lx 0x%lx] best loc 0x%x\n",
3361 		 p->xnack_enabled, &p->svms, prange->start, prange->last,
3362 		 best_loc);
3363 
3364 	return best_loc;
3365 }
3366 
3367 /* svm_range_trigger_migration - start page migration if prefetch loc changed
3368  * @mm: current process mm_struct
3369  * @prange: svm range structure
3370  * @migrated: output, true if migration is triggered
3371  *
3372  * If range perfetch_loc is GPU, actual loc is cpu 0, then migrate the range
3373  * from ram to vram.
3374  * If range prefetch_loc is cpu 0, actual loc is GPU, then migrate the range
3375  * from vram to ram.
3376  *
3377  * If GPU vm fault retry is not enabled, migration interact with MMU notifier
3378  * and restore work:
3379  * 1. migrate_vma_setup invalidate pages, MMU notifier callback svm_range_evict
3380  *    stops all queues, schedule restore work
3381  * 2. svm_range_restore_work wait for migration is done by
3382  *    a. svm_range_validate_vram takes prange->migrate_mutex
3383  *    b. svm_range_validate_ram HMM get pages wait for CPU fault handle returns
3384  * 3. restore work update mappings of GPU, resume all queues.
3385  *
3386  * Context: Process context
3387  *
3388  * Return:
3389  * 0 - OK, otherwise - error code of migration
3390  */
3391 static int
svm_range_trigger_migration(struct mm_struct * mm,struct svm_range * prange,bool * migrated)3392 svm_range_trigger_migration(struct mm_struct *mm, struct svm_range *prange,
3393 			    bool *migrated)
3394 {
3395 	uint32_t best_loc;
3396 	int r = 0;
3397 
3398 	*migrated = false;
3399 	best_loc = svm_range_best_prefetch_location(prange);
3400 
3401 	if (best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED ||
3402 	    best_loc == prange->actual_loc)
3403 		return 0;
3404 
3405 	if (!best_loc) {
3406 		r = svm_migrate_vram_to_ram(prange, mm,
3407 					KFD_MIGRATE_TRIGGER_PREFETCH, NULL);
3408 		*migrated = !r;
3409 		return r;
3410 	}
3411 
3412 	r = svm_migrate_to_vram(prange, best_loc, mm, KFD_MIGRATE_TRIGGER_PREFETCH);
3413 	*migrated = !r;
3414 
3415 	return r;
3416 }
3417 
svm_range_schedule_evict_svm_bo(struct amdgpu_amdkfd_fence * fence)3418 int svm_range_schedule_evict_svm_bo(struct amdgpu_amdkfd_fence *fence)
3419 {
3420 	if (!fence)
3421 		return -EINVAL;
3422 
3423 	if (dma_fence_is_signaled(&fence->base))
3424 		return 0;
3425 
3426 	if (fence->svm_bo) {
3427 		WRITE_ONCE(fence->svm_bo->evicting, 1);
3428 		schedule_work(&fence->svm_bo->eviction_work);
3429 	}
3430 
3431 	return 0;
3432 }
3433 
svm_range_evict_svm_bo_worker(struct work_struct * work)3434 static void svm_range_evict_svm_bo_worker(struct work_struct *work)
3435 {
3436 	struct svm_range_bo *svm_bo;
3437 	struct mm_struct *mm;
3438 	int r = 0;
3439 
3440 	svm_bo = container_of(work, struct svm_range_bo, eviction_work);
3441 	if (!svm_bo_ref_unless_zero(svm_bo))
3442 		return; /* svm_bo was freed while eviction was pending */
3443 
3444 	if (mmget_not_zero(svm_bo->eviction_fence->mm)) {
3445 		mm = svm_bo->eviction_fence->mm;
3446 	} else {
3447 		svm_range_bo_unref(svm_bo);
3448 		return;
3449 	}
3450 
3451 	mmap_read_lock(mm);
3452 	spin_lock(&svm_bo->list_lock);
3453 	while (!list_empty(&svm_bo->range_list) && !r) {
3454 		struct svm_range *prange =
3455 				list_first_entry(&svm_bo->range_list,
3456 						struct svm_range, svm_bo_list);
3457 		int retries = 3;
3458 
3459 		list_del_init(&prange->svm_bo_list);
3460 		spin_unlock(&svm_bo->list_lock);
3461 
3462 		pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms,
3463 			 prange->start, prange->last);
3464 
3465 		mutex_lock(&prange->migrate_mutex);
3466 		do {
3467 			r = svm_migrate_vram_to_ram(prange, mm,
3468 					KFD_MIGRATE_TRIGGER_TTM_EVICTION, NULL);
3469 		} while (!r && prange->actual_loc && --retries);
3470 
3471 		if (!r && prange->actual_loc)
3472 			pr_info_once("Migration failed during eviction");
3473 
3474 		if (!prange->actual_loc) {
3475 			mutex_lock(&prange->lock);
3476 			prange->svm_bo = NULL;
3477 			mutex_unlock(&prange->lock);
3478 		}
3479 		mutex_unlock(&prange->migrate_mutex);
3480 
3481 		spin_lock(&svm_bo->list_lock);
3482 	}
3483 	spin_unlock(&svm_bo->list_lock);
3484 	mmap_read_unlock(mm);
3485 	mmput(mm);
3486 
3487 	dma_fence_signal(&svm_bo->eviction_fence->base);
3488 
3489 	/* This is the last reference to svm_bo, after svm_range_vram_node_free
3490 	 * has been called in svm_migrate_vram_to_ram
3491 	 */
3492 	WARN_ONCE(!r && kref_read(&svm_bo->kref) != 1, "This was not the last reference\n");
3493 	svm_range_bo_unref(svm_bo);
3494 }
3495 
3496 static int
svm_range_set_attr(struct kfd_process * p,struct mm_struct * mm,uint64_t start,uint64_t size,uint32_t nattr,struct kfd_ioctl_svm_attribute * attrs)3497 svm_range_set_attr(struct kfd_process *p, struct mm_struct *mm,
3498 		   uint64_t start, uint64_t size, uint32_t nattr,
3499 		   struct kfd_ioctl_svm_attribute *attrs)
3500 {
3501 	struct amdkfd_process_info *process_info = p->kgd_process_info;
3502 	struct list_head update_list;
3503 	struct list_head insert_list;
3504 	struct list_head remove_list;
3505 	struct svm_range_list *svms;
3506 	struct svm_range *prange;
3507 	struct svm_range *next;
3508 	bool update_mapping = false;
3509 	bool flush_tlb;
3510 	int r = 0;
3511 
3512 	pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] pages 0x%llx\n",
3513 		 p->pasid, &p->svms, start, start + size - 1, size);
3514 
3515 	r = svm_range_check_attr(p, nattr, attrs);
3516 	if (r)
3517 		return r;
3518 
3519 	svms = &p->svms;
3520 
3521 	mutex_lock(&process_info->lock);
3522 
3523 	svm_range_list_lock_and_flush_work(svms, mm);
3524 
3525 	r = svm_range_is_valid(p, start, size);
3526 	if (r) {
3527 		pr_debug("invalid range r=%d\n", r);
3528 		mmap_write_unlock(mm);
3529 		goto out;
3530 	}
3531 
3532 	mutex_lock(&svms->lock);
3533 
3534 	/* Add new range and split existing ranges as needed */
3535 	r = svm_range_add(p, start, size, nattr, attrs, &update_list,
3536 			  &insert_list, &remove_list);
3537 	if (r) {
3538 		mutex_unlock(&svms->lock);
3539 		mmap_write_unlock(mm);
3540 		goto out;
3541 	}
3542 	/* Apply changes as a transaction */
3543 	list_for_each_entry_safe(prange, next, &insert_list, list) {
3544 		svm_range_add_to_svms(prange);
3545 		svm_range_add_notifier_locked(mm, prange);
3546 	}
3547 	list_for_each_entry(prange, &update_list, update_list) {
3548 		svm_range_apply_attrs(p, prange, nattr, attrs, &update_mapping);
3549 		/* TODO: unmap ranges from GPU that lost access */
3550 	}
3551 	list_for_each_entry_safe(prange, next, &remove_list, update_list) {
3552 		pr_debug("unlink old 0x%p prange 0x%p [0x%lx 0x%lx]\n",
3553 			 prange->svms, prange, prange->start,
3554 			 prange->last);
3555 		svm_range_unlink(prange);
3556 		svm_range_remove_notifier(prange);
3557 		svm_range_free(prange, false);
3558 	}
3559 
3560 	mmap_write_downgrade(mm);
3561 	/* Trigger migrations and revalidate and map to GPUs as needed. If
3562 	 * this fails we may be left with partially completed actions. There
3563 	 * is no clean way of rolling back to the previous state in such a
3564 	 * case because the rollback wouldn't be guaranteed to work either.
3565 	 */
3566 	list_for_each_entry(prange, &update_list, update_list) {
3567 		bool migrated;
3568 
3569 		mutex_lock(&prange->migrate_mutex);
3570 
3571 		r = svm_range_trigger_migration(mm, prange, &migrated);
3572 		if (r)
3573 			goto out_unlock_range;
3574 
3575 		if (migrated && (!p->xnack_enabled ||
3576 		    (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) &&
3577 		    prange->mapped_to_gpu) {
3578 			pr_debug("restore_work will update mappings of GPUs\n");
3579 			mutex_unlock(&prange->migrate_mutex);
3580 			continue;
3581 		}
3582 
3583 		if (!migrated && !update_mapping) {
3584 			mutex_unlock(&prange->migrate_mutex);
3585 			continue;
3586 		}
3587 
3588 		flush_tlb = !migrated && update_mapping && prange->mapped_to_gpu;
3589 
3590 		r = svm_range_validate_and_map(mm, prange, MAX_GPU_INSTANCE,
3591 					       true, true, flush_tlb);
3592 		if (r)
3593 			pr_debug("failed %d to map svm range\n", r);
3594 
3595 out_unlock_range:
3596 		mutex_unlock(&prange->migrate_mutex);
3597 		if (r)
3598 			break;
3599 	}
3600 
3601 	dynamic_svm_range_dump(svms);
3602 
3603 	mutex_unlock(&svms->lock);
3604 	mmap_read_unlock(mm);
3605 out:
3606 	mutex_unlock(&process_info->lock);
3607 
3608 	pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] done, r=%d\n", p->pasid,
3609 		 &p->svms, start, start + size - 1, r);
3610 
3611 	return r;
3612 }
3613 
3614 static int
svm_range_get_attr(struct kfd_process * p,struct mm_struct * mm,uint64_t start,uint64_t size,uint32_t nattr,struct kfd_ioctl_svm_attribute * attrs)3615 svm_range_get_attr(struct kfd_process *p, struct mm_struct *mm,
3616 		   uint64_t start, uint64_t size, uint32_t nattr,
3617 		   struct kfd_ioctl_svm_attribute *attrs)
3618 {
3619 	DECLARE_BITMAP(bitmap_access, MAX_GPU_INSTANCE);
3620 	DECLARE_BITMAP(bitmap_aip, MAX_GPU_INSTANCE);
3621 	bool get_preferred_loc = false;
3622 	bool get_prefetch_loc = false;
3623 	bool get_granularity = false;
3624 	bool get_accessible = false;
3625 	bool get_flags = false;
3626 	uint64_t last = start + size - 1UL;
3627 	uint8_t granularity = 0xff;
3628 	struct interval_tree_node *node;
3629 	struct svm_range_list *svms;
3630 	struct svm_range *prange;
3631 	uint32_t prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
3632 	uint32_t location = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
3633 	uint32_t flags_and = 0xffffffff;
3634 	uint32_t flags_or = 0;
3635 	int gpuidx;
3636 	uint32_t i;
3637 	int r = 0;
3638 
3639 	pr_debug("svms 0x%p [0x%llx 0x%llx] nattr 0x%x\n", &p->svms, start,
3640 		 start + size - 1, nattr);
3641 
3642 	/* Flush pending deferred work to avoid racing with deferred actions from
3643 	 * previous memory map changes (e.g. munmap). Concurrent memory map changes
3644 	 * can still race with get_attr because we don't hold the mmap lock. But that
3645 	 * would be a race condition in the application anyway, and undefined
3646 	 * behaviour is acceptable in that case.
3647 	 */
3648 	flush_work(&p->svms.deferred_list_work);
3649 
3650 	mmap_read_lock(mm);
3651 	r = svm_range_is_valid(p, start, size);
3652 	mmap_read_unlock(mm);
3653 	if (r) {
3654 		pr_debug("invalid range r=%d\n", r);
3655 		return r;
3656 	}
3657 
3658 	for (i = 0; i < nattr; i++) {
3659 		switch (attrs[i].type) {
3660 		case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC:
3661 			get_preferred_loc = true;
3662 			break;
3663 		case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
3664 			get_prefetch_loc = true;
3665 			break;
3666 		case KFD_IOCTL_SVM_ATTR_ACCESS:
3667 			get_accessible = true;
3668 			break;
3669 		case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
3670 		case KFD_IOCTL_SVM_ATTR_CLR_FLAGS:
3671 			get_flags = true;
3672 			break;
3673 		case KFD_IOCTL_SVM_ATTR_GRANULARITY:
3674 			get_granularity = true;
3675 			break;
3676 		case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE:
3677 		case KFD_IOCTL_SVM_ATTR_NO_ACCESS:
3678 			fallthrough;
3679 		default:
3680 			pr_debug("get invalid attr type 0x%x\n", attrs[i].type);
3681 			return -EINVAL;
3682 		}
3683 	}
3684 
3685 	svms = &p->svms;
3686 
3687 	mutex_lock(&svms->lock);
3688 
3689 	node = interval_tree_iter_first(&svms->objects, start, last);
3690 	if (!node) {
3691 		pr_debug("range attrs not found return default values\n");
3692 		svm_range_set_default_attributes(&location, &prefetch_loc,
3693 						 &granularity, &flags_and);
3694 		flags_or = flags_and;
3695 		if (p->xnack_enabled)
3696 			bitmap_copy(bitmap_access, svms->bitmap_supported,
3697 				    MAX_GPU_INSTANCE);
3698 		else
3699 			bitmap_zero(bitmap_access, MAX_GPU_INSTANCE);
3700 		bitmap_zero(bitmap_aip, MAX_GPU_INSTANCE);
3701 		goto fill_values;
3702 	}
3703 	bitmap_copy(bitmap_access, svms->bitmap_supported, MAX_GPU_INSTANCE);
3704 	bitmap_copy(bitmap_aip, svms->bitmap_supported, MAX_GPU_INSTANCE);
3705 
3706 	while (node) {
3707 		struct interval_tree_node *next;
3708 
3709 		prange = container_of(node, struct svm_range, it_node);
3710 		next = interval_tree_iter_next(node, start, last);
3711 
3712 		if (get_preferred_loc) {
3713 			if (prange->preferred_loc ==
3714 					KFD_IOCTL_SVM_LOCATION_UNDEFINED ||
3715 			    (location != KFD_IOCTL_SVM_LOCATION_UNDEFINED &&
3716 			     location != prange->preferred_loc)) {
3717 				location = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
3718 				get_preferred_loc = false;
3719 			} else {
3720 				location = prange->preferred_loc;
3721 			}
3722 		}
3723 		if (get_prefetch_loc) {
3724 			if (prange->prefetch_loc ==
3725 					KFD_IOCTL_SVM_LOCATION_UNDEFINED ||
3726 			    (prefetch_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED &&
3727 			     prefetch_loc != prange->prefetch_loc)) {
3728 				prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
3729 				get_prefetch_loc = false;
3730 			} else {
3731 				prefetch_loc = prange->prefetch_loc;
3732 			}
3733 		}
3734 		if (get_accessible) {
3735 			bitmap_and(bitmap_access, bitmap_access,
3736 				   prange->bitmap_access, MAX_GPU_INSTANCE);
3737 			bitmap_and(bitmap_aip, bitmap_aip,
3738 				   prange->bitmap_aip, MAX_GPU_INSTANCE);
3739 		}
3740 		if (get_flags) {
3741 			flags_and &= prange->flags;
3742 			flags_or |= prange->flags;
3743 		}
3744 
3745 		if (get_granularity && prange->granularity < granularity)
3746 			granularity = prange->granularity;
3747 
3748 		node = next;
3749 	}
3750 fill_values:
3751 	mutex_unlock(&svms->lock);
3752 
3753 	for (i = 0; i < nattr; i++) {
3754 		switch (attrs[i].type) {
3755 		case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC:
3756 			attrs[i].value = location;
3757 			break;
3758 		case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
3759 			attrs[i].value = prefetch_loc;
3760 			break;
3761 		case KFD_IOCTL_SVM_ATTR_ACCESS:
3762 			gpuidx = kfd_process_gpuidx_from_gpuid(p,
3763 							       attrs[i].value);
3764 			if (gpuidx < 0) {
3765 				pr_debug("invalid gpuid %x\n", attrs[i].value);
3766 				return -EINVAL;
3767 			}
3768 			if (test_bit(gpuidx, bitmap_access))
3769 				attrs[i].type = KFD_IOCTL_SVM_ATTR_ACCESS;
3770 			else if (test_bit(gpuidx, bitmap_aip))
3771 				attrs[i].type =
3772 					KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE;
3773 			else
3774 				attrs[i].type = KFD_IOCTL_SVM_ATTR_NO_ACCESS;
3775 			break;
3776 		case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
3777 			attrs[i].value = flags_and;
3778 			break;
3779 		case KFD_IOCTL_SVM_ATTR_CLR_FLAGS:
3780 			attrs[i].value = ~flags_or;
3781 			break;
3782 		case KFD_IOCTL_SVM_ATTR_GRANULARITY:
3783 			attrs[i].value = (uint32_t)granularity;
3784 			break;
3785 		}
3786 	}
3787 
3788 	return 0;
3789 }
3790 
kfd_criu_resume_svm(struct kfd_process * p)3791 int kfd_criu_resume_svm(struct kfd_process *p)
3792 {
3793 	struct kfd_ioctl_svm_attribute *set_attr_new, *set_attr = NULL;
3794 	int nattr_common = 4, nattr_accessibility = 1;
3795 	struct criu_svm_metadata *criu_svm_md = NULL;
3796 	struct svm_range_list *svms = &p->svms;
3797 	struct criu_svm_metadata *next = NULL;
3798 	uint32_t set_flags = 0xffffffff;
3799 	int i, j, num_attrs, ret = 0;
3800 	uint64_t set_attr_size;
3801 	struct mm_struct *mm;
3802 
3803 	if (list_empty(&svms->criu_svm_metadata_list)) {
3804 		pr_debug("No SVM data from CRIU restore stage 2\n");
3805 		return ret;
3806 	}
3807 
3808 	mm = get_task_mm(p->lead_thread);
3809 	if (!mm) {
3810 		pr_err("failed to get mm for the target process\n");
3811 		return -ESRCH;
3812 	}
3813 
3814 	num_attrs = nattr_common + (nattr_accessibility * p->n_pdds);
3815 
3816 	i = j = 0;
3817 	list_for_each_entry(criu_svm_md, &svms->criu_svm_metadata_list, list) {
3818 		pr_debug("criu_svm_md[%d]\n\tstart: 0x%llx size: 0x%llx (npages)\n",
3819 			 i, criu_svm_md->data.start_addr, criu_svm_md->data.size);
3820 
3821 		for (j = 0; j < num_attrs; j++) {
3822 			pr_debug("\ncriu_svm_md[%d]->attrs[%d].type : 0x%x\ncriu_svm_md[%d]->attrs[%d].value : 0x%x\n",
3823 				 i, j, criu_svm_md->data.attrs[j].type,
3824 				 i, j, criu_svm_md->data.attrs[j].value);
3825 			switch (criu_svm_md->data.attrs[j].type) {
3826 			/* During Checkpoint operation, the query for
3827 			 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC attribute might
3828 			 * return KFD_IOCTL_SVM_LOCATION_UNDEFINED if they were
3829 			 * not used by the range which was checkpointed. Care
3830 			 * must be taken to not restore with an invalid value
3831 			 * otherwise the gpuidx value will be invalid and
3832 			 * set_attr would eventually fail so just replace those
3833 			 * with another dummy attribute such as
3834 			 * KFD_IOCTL_SVM_ATTR_SET_FLAGS.
3835 			 */
3836 			case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
3837 				if (criu_svm_md->data.attrs[j].value ==
3838 				    KFD_IOCTL_SVM_LOCATION_UNDEFINED) {
3839 					criu_svm_md->data.attrs[j].type =
3840 						KFD_IOCTL_SVM_ATTR_SET_FLAGS;
3841 					criu_svm_md->data.attrs[j].value = 0;
3842 				}
3843 				break;
3844 			case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
3845 				set_flags = criu_svm_md->data.attrs[j].value;
3846 				break;
3847 			default:
3848 				break;
3849 			}
3850 		}
3851 
3852 		/* CLR_FLAGS is not available via get_attr during checkpoint but
3853 		 * it needs to be inserted before restoring the ranges so
3854 		 * allocate extra space for it before calling set_attr
3855 		 */
3856 		set_attr_size = sizeof(struct kfd_ioctl_svm_attribute) *
3857 						(num_attrs + 1);
3858 		set_attr_new = krealloc(set_attr, set_attr_size,
3859 					    GFP_KERNEL);
3860 		if (!set_attr_new) {
3861 			ret = -ENOMEM;
3862 			goto exit;
3863 		}
3864 		set_attr = set_attr_new;
3865 
3866 		memcpy(set_attr, criu_svm_md->data.attrs, num_attrs *
3867 					sizeof(struct kfd_ioctl_svm_attribute));
3868 		set_attr[num_attrs].type = KFD_IOCTL_SVM_ATTR_CLR_FLAGS;
3869 		set_attr[num_attrs].value = ~set_flags;
3870 
3871 		ret = svm_range_set_attr(p, mm, criu_svm_md->data.start_addr,
3872 					 criu_svm_md->data.size, num_attrs + 1,
3873 					 set_attr);
3874 		if (ret) {
3875 			pr_err("CRIU: failed to set range attributes\n");
3876 			goto exit;
3877 		}
3878 
3879 		i++;
3880 	}
3881 exit:
3882 	kfree(set_attr);
3883 	list_for_each_entry_safe(criu_svm_md, next, &svms->criu_svm_metadata_list, list) {
3884 		pr_debug("freeing criu_svm_md[]\n\tstart: 0x%llx\n",
3885 						criu_svm_md->data.start_addr);
3886 		kfree(criu_svm_md);
3887 	}
3888 
3889 	mmput(mm);
3890 	return ret;
3891 
3892 }
3893 
kfd_criu_restore_svm(struct kfd_process * p,uint8_t __user * user_priv_ptr,uint64_t * priv_data_offset,uint64_t max_priv_data_size)3894 int kfd_criu_restore_svm(struct kfd_process *p,
3895 			 uint8_t __user *user_priv_ptr,
3896 			 uint64_t *priv_data_offset,
3897 			 uint64_t max_priv_data_size)
3898 {
3899 	uint64_t svm_priv_data_size, svm_object_md_size, svm_attrs_size;
3900 	int nattr_common = 4, nattr_accessibility = 1;
3901 	struct criu_svm_metadata *criu_svm_md = NULL;
3902 	struct svm_range_list *svms = &p->svms;
3903 	uint32_t num_devices;
3904 	int ret = 0;
3905 
3906 	num_devices = p->n_pdds;
3907 	/* Handle one SVM range object at a time, also the number of gpus are
3908 	 * assumed to be same on the restore node, checking must be done while
3909 	 * evaluating the topology earlier
3910 	 */
3911 
3912 	svm_attrs_size = sizeof(struct kfd_ioctl_svm_attribute) *
3913 		(nattr_common + nattr_accessibility * num_devices);
3914 	svm_object_md_size = sizeof(struct criu_svm_metadata) + svm_attrs_size;
3915 
3916 	svm_priv_data_size = sizeof(struct kfd_criu_svm_range_priv_data) +
3917 								svm_attrs_size;
3918 
3919 	criu_svm_md = kzalloc(svm_object_md_size, GFP_KERNEL);
3920 	if (!criu_svm_md) {
3921 		pr_err("failed to allocate memory to store svm metadata\n");
3922 		return -ENOMEM;
3923 	}
3924 	if (*priv_data_offset + svm_priv_data_size > max_priv_data_size) {
3925 		ret = -EINVAL;
3926 		goto exit;
3927 	}
3928 
3929 	ret = copy_from_user(&criu_svm_md->data, user_priv_ptr + *priv_data_offset,
3930 			     svm_priv_data_size);
3931 	if (ret) {
3932 		ret = -EFAULT;
3933 		goto exit;
3934 	}
3935 	*priv_data_offset += svm_priv_data_size;
3936 
3937 	list_add_tail(&criu_svm_md->list, &svms->criu_svm_metadata_list);
3938 
3939 	return 0;
3940 
3941 
3942 exit:
3943 	kfree(criu_svm_md);
3944 	return ret;
3945 }
3946 
svm_range_get_info(struct kfd_process * p,uint32_t * num_svm_ranges,uint64_t * svm_priv_data_size)3947 int svm_range_get_info(struct kfd_process *p, uint32_t *num_svm_ranges,
3948 		       uint64_t *svm_priv_data_size)
3949 {
3950 	uint64_t total_size, accessibility_size, common_attr_size;
3951 	int nattr_common = 4, nattr_accessibility = 1;
3952 	int num_devices = p->n_pdds;
3953 	struct svm_range_list *svms;
3954 	struct svm_range *prange;
3955 	uint32_t count = 0;
3956 
3957 	*svm_priv_data_size = 0;
3958 
3959 	svms = &p->svms;
3960 	if (!svms)
3961 		return -EINVAL;
3962 
3963 	mutex_lock(&svms->lock);
3964 	list_for_each_entry(prange, &svms->list, list) {
3965 		pr_debug("prange: 0x%p start: 0x%lx\t npages: 0x%llx\t end: 0x%llx\n",
3966 			 prange, prange->start, prange->npages,
3967 			 prange->start + prange->npages - 1);
3968 		count++;
3969 	}
3970 	mutex_unlock(&svms->lock);
3971 
3972 	*num_svm_ranges = count;
3973 	/* Only the accessbility attributes need to be queried for all the gpus
3974 	 * individually, remaining ones are spanned across the entire process
3975 	 * regardless of the various gpu nodes. Of the remaining attributes,
3976 	 * KFD_IOCTL_SVM_ATTR_CLR_FLAGS need not be saved.
3977 	 *
3978 	 * KFD_IOCTL_SVM_ATTR_PREFERRED_LOC
3979 	 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC
3980 	 * KFD_IOCTL_SVM_ATTR_SET_FLAGS
3981 	 * KFD_IOCTL_SVM_ATTR_GRANULARITY
3982 	 *
3983 	 * ** ACCESSBILITY ATTRIBUTES **
3984 	 * (Considered as one, type is altered during query, value is gpuid)
3985 	 * KFD_IOCTL_SVM_ATTR_ACCESS
3986 	 * KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE
3987 	 * KFD_IOCTL_SVM_ATTR_NO_ACCESS
3988 	 */
3989 	if (*num_svm_ranges > 0) {
3990 		common_attr_size = sizeof(struct kfd_ioctl_svm_attribute) *
3991 			nattr_common;
3992 		accessibility_size = sizeof(struct kfd_ioctl_svm_attribute) *
3993 			nattr_accessibility * num_devices;
3994 
3995 		total_size = sizeof(struct kfd_criu_svm_range_priv_data) +
3996 			common_attr_size + accessibility_size;
3997 
3998 		*svm_priv_data_size = *num_svm_ranges * total_size;
3999 	}
4000 
4001 	pr_debug("num_svm_ranges %u total_priv_size %llu\n", *num_svm_ranges,
4002 		 *svm_priv_data_size);
4003 	return 0;
4004 }
4005 
kfd_criu_checkpoint_svm(struct kfd_process * p,uint8_t __user * user_priv_data,uint64_t * priv_data_offset)4006 int kfd_criu_checkpoint_svm(struct kfd_process *p,
4007 			    uint8_t __user *user_priv_data,
4008 			    uint64_t *priv_data_offset)
4009 {
4010 	struct kfd_criu_svm_range_priv_data *svm_priv = NULL;
4011 	struct kfd_ioctl_svm_attribute *query_attr = NULL;
4012 	uint64_t svm_priv_data_size, query_attr_size = 0;
4013 	int index, nattr_common = 4, ret = 0;
4014 	struct svm_range_list *svms;
4015 	int num_devices = p->n_pdds;
4016 	struct svm_range *prange;
4017 	struct mm_struct *mm;
4018 
4019 	svms = &p->svms;
4020 	if (!svms)
4021 		return -EINVAL;
4022 
4023 	mm = get_task_mm(p->lead_thread);
4024 	if (!mm) {
4025 		pr_err("failed to get mm for the target process\n");
4026 		return -ESRCH;
4027 	}
4028 
4029 	query_attr_size = sizeof(struct kfd_ioctl_svm_attribute) *
4030 				(nattr_common + num_devices);
4031 
4032 	query_attr = kzalloc(query_attr_size, GFP_KERNEL);
4033 	if (!query_attr) {
4034 		ret = -ENOMEM;
4035 		goto exit;
4036 	}
4037 
4038 	query_attr[0].type = KFD_IOCTL_SVM_ATTR_PREFERRED_LOC;
4039 	query_attr[1].type = KFD_IOCTL_SVM_ATTR_PREFETCH_LOC;
4040 	query_attr[2].type = KFD_IOCTL_SVM_ATTR_SET_FLAGS;
4041 	query_attr[3].type = KFD_IOCTL_SVM_ATTR_GRANULARITY;
4042 
4043 	for (index = 0; index < num_devices; index++) {
4044 		struct kfd_process_device *pdd = p->pdds[index];
4045 
4046 		query_attr[index + nattr_common].type =
4047 			KFD_IOCTL_SVM_ATTR_ACCESS;
4048 		query_attr[index + nattr_common].value = pdd->user_gpu_id;
4049 	}
4050 
4051 	svm_priv_data_size = sizeof(*svm_priv) + query_attr_size;
4052 
4053 	svm_priv = kzalloc(svm_priv_data_size, GFP_KERNEL);
4054 	if (!svm_priv) {
4055 		ret = -ENOMEM;
4056 		goto exit_query;
4057 	}
4058 
4059 	index = 0;
4060 	list_for_each_entry(prange, &svms->list, list) {
4061 
4062 		svm_priv->object_type = KFD_CRIU_OBJECT_TYPE_SVM_RANGE;
4063 		svm_priv->start_addr = prange->start;
4064 		svm_priv->size = prange->npages;
4065 		memcpy(&svm_priv->attrs, query_attr, query_attr_size);
4066 		pr_debug("CRIU: prange: 0x%p start: 0x%lx\t npages: 0x%llx end: 0x%llx\t size: 0x%llx\n",
4067 			 prange, prange->start, prange->npages,
4068 			 prange->start + prange->npages - 1,
4069 			 prange->npages * PAGE_SIZE);
4070 
4071 		ret = svm_range_get_attr(p, mm, svm_priv->start_addr,
4072 					 svm_priv->size,
4073 					 (nattr_common + num_devices),
4074 					 svm_priv->attrs);
4075 		if (ret) {
4076 			pr_err("CRIU: failed to obtain range attributes\n");
4077 			goto exit_priv;
4078 		}
4079 
4080 		if (copy_to_user(user_priv_data + *priv_data_offset, svm_priv,
4081 				 svm_priv_data_size)) {
4082 			pr_err("Failed to copy svm priv to user\n");
4083 			ret = -EFAULT;
4084 			goto exit_priv;
4085 		}
4086 
4087 		*priv_data_offset += svm_priv_data_size;
4088 
4089 	}
4090 
4091 
4092 exit_priv:
4093 	kfree(svm_priv);
4094 exit_query:
4095 	kfree(query_attr);
4096 exit:
4097 	mmput(mm);
4098 	return ret;
4099 }
4100 
4101 int
svm_ioctl(struct kfd_process * p,enum kfd_ioctl_svm_op op,uint64_t start,uint64_t size,uint32_t nattrs,struct kfd_ioctl_svm_attribute * attrs)4102 svm_ioctl(struct kfd_process *p, enum kfd_ioctl_svm_op op, uint64_t start,
4103 	  uint64_t size, uint32_t nattrs, struct kfd_ioctl_svm_attribute *attrs)
4104 {
4105 	struct mm_struct *mm = current->mm;
4106 	int r;
4107 
4108 	start >>= PAGE_SHIFT;
4109 	size >>= PAGE_SHIFT;
4110 
4111 	switch (op) {
4112 	case KFD_IOCTL_SVM_OP_SET_ATTR:
4113 		r = svm_range_set_attr(p, mm, start, size, nattrs, attrs);
4114 		break;
4115 	case KFD_IOCTL_SVM_OP_GET_ATTR:
4116 		r = svm_range_get_attr(p, mm, start, size, nattrs, attrs);
4117 		break;
4118 	default:
4119 		r = EINVAL;
4120 		break;
4121 	}
4122 
4123 	return r;
4124 }
4125