1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2010-2014, The Linux Foundation. All rights reserved. 4 */ 5 6 #ifndef _CORE_H_ 7 #define _CORE_H_ 8 9 #include "dma.h" 10 11 /** 12 * struct qce_device - crypto engine device structure 13 * @queue: crypto request queue 14 * @lock: the lock protects queue and req 15 * @done_tasklet: done tasklet object 16 * @req: current active request 17 * @result: result of current transform 18 * @base: virtual IO base 19 * @dev: pointer to device structure 20 * @core: core device clock 21 * @iface: interface clock 22 * @bus: bus clock 23 * @dma: pointer to dma data 24 * @burst_size: the crypto burst size 25 * @pipe_pair_id: which pipe pair id the device using 26 * @async_req_enqueue: invoked by every algorithm to enqueue a request 27 * @async_req_done: invoked by every algorithm to finish its request 28 */ 29 struct qce_device { 30 struct crypto_queue queue; 31 spinlock_t lock; 32 struct tasklet_struct done_tasklet; 33 struct crypto_async_request *req; 34 int result; 35 void __iomem *base; 36 struct device *dev; 37 struct clk *core, *iface, *bus; 38 struct icc_path *mem_path; 39 struct qce_dma_data dma; 40 int burst_size; 41 unsigned int pipe_pair_id; 42 int (*async_req_enqueue)(struct qce_device *qce, 43 struct crypto_async_request *req); 44 void (*async_req_done)(struct qce_device *qce, int ret); 45 }; 46 47 /** 48 * struct qce_algo_ops - algorithm operations per crypto type 49 * @type: should be CRYPTO_ALG_TYPE_XXX 50 * @register_algs: invoked by core to register the algorithms 51 * @unregister_algs: invoked by core to unregister the algorithms 52 * @async_req_handle: invoked by core to handle enqueued request 53 */ 54 struct qce_algo_ops { 55 u32 type; 56 int (*register_algs)(struct qce_device *qce); 57 void (*unregister_algs)(struct qce_device *qce); 58 int (*async_req_handle)(struct crypto_async_request *async_req); 59 }; 60 61 #endif /* _CORE_H_ */ 62
