1 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only) */ 2 /* Copyright(c) 2014 - 2020 Intel Corporation */ 3 #ifndef ADF_C3XXX_HW_DATA_H_ 4 #define ADF_C3XXX_HW_DATA_H_ 5 6 #include <linux/units.h> 7 8 /* PCIe configuration space */ 9 #define ADF_C3XXX_PMISC_BAR 0 10 #define ADF_C3XXX_ETR_BAR 1 11 #define ADF_C3XXX_SRAM_BAR 0 12 #define ADF_C3XXX_MAX_ACCELERATORS 3 13 #define ADF_C3XXX_MAX_ACCELENGINES 6 14 #define ADF_C3XXX_ACCELERATORS_REG_OFFSET 16 15 #define ADF_C3XXX_ACCELERATORS_MASK 0x7 16 #define ADF_C3XXX_ACCELENGINES_MASK 0x3F 17 #define ADF_C3XXX_ETR_MAX_BANKS 16 18 #define ADF_C3XXX_SOFTSTRAP_CSR_OFFSET 0x2EC 19 20 /* AE to function mapping */ 21 #define ADF_C3XXX_AE2FUNC_MAP_GRP_A_NUM_REGS 48 22 #define ADF_C3XXX_AE2FUNC_MAP_GRP_B_NUM_REGS 6 23 24 /* Clocks frequency */ 25 #define ADF_C3XXX_AE_FREQ (685 * HZ_PER_MHZ) 26 #define ADF_C3XXX_MIN_AE_FREQ (533 * HZ_PER_MHZ) 27 #define ADF_C3XXX_MAX_AE_FREQ (685 * HZ_PER_MHZ) 28 29 /* Firmware Binary */ 30 #define ADF_C3XXX_FW "qat_c3xxx.bin" 31 #define ADF_C3XXX_MMP "qat_c3xxx_mmp.bin" 32 33 void adf_init_hw_data_c3xxx(struct adf_hw_device_data *hw_data); 34 void adf_clean_hw_data_c3xxx(struct adf_hw_device_data *hw_data); 35 #endif 36
