1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2021 TOSHIBA CORPORATION 4 * Copyright (c) 2021 Toshiba Electronic Devices & Storage Corporation 5 * 6 * Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> 7 */ 8 9 #ifndef _VISCONTI_PLL_H_ 10 #define _VISCONTI_PLL_H_ 11 12 #include <linux/clk-provider.h> 13 #include <linux/regmap.h> 14 #include <linux/spinlock.h> 15 16 struct visconti_pll_provider { 17 void __iomem *reg_base; 18 struct clk_hw_onecell_data clk_data; 19 struct device_node *node; 20 }; 21 22 #define VISCONTI_PLL_RATE(_rate, _dacen, _dsmen, \ 23 _refdiv, _intin, _fracin, _postdiv1, _postdiv2) \ 24 { \ 25 .rate = _rate, \ 26 .dacen = _dacen, \ 27 .dsmen = _dsmen, \ 28 .refdiv = _refdiv, \ 29 .intin = _intin, \ 30 .fracin = _fracin, \ 31 .postdiv1 = _postdiv1, \ 32 .postdiv2 = _postdiv2 \ 33 } 34 35 struct visconti_pll_rate_table { 36 unsigned long rate; 37 unsigned int dacen; 38 unsigned int dsmen; 39 unsigned int refdiv; 40 unsigned long intin; 41 unsigned long fracin; 42 unsigned int postdiv1; 43 unsigned int postdiv2; 44 }; 45 46 struct visconti_pll_info { 47 unsigned int id; 48 const char *name; 49 const char *parent; 50 unsigned long base_reg; 51 const struct visconti_pll_rate_table *rate_table; 52 }; 53 54 struct visconti_pll_provider * __init visconti_init_pll(struct device_node *np, 55 void __iomem *base, 56 unsigned long nr_plls); 57 void visconti_register_plls(struct visconti_pll_provider *ctx, 58 const struct visconti_pll_info *list, 59 unsigned int nr_plls, spinlock_t *lock); 60 61 #endif /* _VISCONTI_PLL_H_ */ 62
