1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * AMD Memory Encryption Support
4 *
5 * Copyright (C) 2016 Advanced Micro Devices, Inc.
6 *
7 * Author: Tom Lendacky <thomas.lendacky@amd.com>
8 */
9
10 #define DISABLE_BRANCH_PROFILING
11
12 #include <linux/linkage.h>
13 #include <linux/init.h>
14 #include <linux/mm.h>
15 #include <linux/dma-direct.h>
16 #include <linux/swiotlb.h>
17 #include <linux/mem_encrypt.h>
18 #include <linux/device.h>
19 #include <linux/kernel.h>
20 #include <linux/bitops.h>
21 #include <linux/dma-mapping.h>
22 #include <linux/virtio_config.h>
23 #include <linux/virtio_anchor.h>
24 #include <linux/cc_platform.h>
25
26 #include <asm/tlbflush.h>
27 #include <asm/fixmap.h>
28 #include <asm/setup.h>
29 #include <asm/mem_encrypt.h>
30 #include <asm/bootparam.h>
31 #include <asm/set_memory.h>
32 #include <asm/cacheflush.h>
33 #include <asm/processor-flags.h>
34 #include <asm/msr.h>
35 #include <asm/cmdline.h>
36 #include <asm/sev.h>
37
38 #include "mm_internal.h"
39
40 /*
41 * Since SME related variables are set early in the boot process they must
42 * reside in the .data section so as not to be zeroed out when the .bss
43 * section is later cleared.
44 */
45 u64 sme_me_mask __section(".data") = 0;
46 u64 sev_status __section(".data") = 0;
47 u64 sev_check_data __section(".data") = 0;
48 EXPORT_SYMBOL(sme_me_mask);
49
50 /* Buffer used for early in-place encryption by BSP, no locking needed */
51 static char sme_early_buffer[PAGE_SIZE] __initdata __aligned(PAGE_SIZE);
52
53 /*
54 * SNP-specific routine which needs to additionally change the page state from
55 * private to shared before copying the data from the source to destination and
56 * restore after the copy.
57 */
snp_memcpy(void * dst,void * src,size_t sz,unsigned long paddr,bool decrypt)58 static inline void __init snp_memcpy(void *dst, void *src, size_t sz,
59 unsigned long paddr, bool decrypt)
60 {
61 unsigned long npages = PAGE_ALIGN(sz) >> PAGE_SHIFT;
62
63 if (decrypt) {
64 /*
65 * @paddr needs to be accessed decrypted, mark the page shared in
66 * the RMP table before copying it.
67 */
68 early_snp_set_memory_shared((unsigned long)__va(paddr), paddr, npages);
69
70 memcpy(dst, src, sz);
71
72 /* Restore the page state after the memcpy. */
73 early_snp_set_memory_private((unsigned long)__va(paddr), paddr, npages);
74 } else {
75 /*
76 * @paddr need to be accessed encrypted, no need for the page state
77 * change.
78 */
79 memcpy(dst, src, sz);
80 }
81 }
82
83 /*
84 * This routine does not change the underlying encryption setting of the
85 * page(s) that map this memory. It assumes that eventually the memory is
86 * meant to be accessed as either encrypted or decrypted but the contents
87 * are currently not in the desired state.
88 *
89 * This routine follows the steps outlined in the AMD64 Architecture
90 * Programmer's Manual Volume 2, Section 7.10.8 Encrypt-in-Place.
91 */
__sme_early_enc_dec(resource_size_t paddr,unsigned long size,bool enc)92 static void __init __sme_early_enc_dec(resource_size_t paddr,
93 unsigned long size, bool enc)
94 {
95 void *src, *dst;
96 size_t len;
97
98 if (!sme_me_mask)
99 return;
100
101 wbinvd();
102
103 /*
104 * There are limited number of early mapping slots, so map (at most)
105 * one page at time.
106 */
107 while (size) {
108 len = min_t(size_t, sizeof(sme_early_buffer), size);
109
110 /*
111 * Create mappings for the current and desired format of
112 * the memory. Use a write-protected mapping for the source.
113 */
114 src = enc ? early_memremap_decrypted_wp(paddr, len) :
115 early_memremap_encrypted_wp(paddr, len);
116
117 dst = enc ? early_memremap_encrypted(paddr, len) :
118 early_memremap_decrypted(paddr, len);
119
120 /*
121 * If a mapping can't be obtained to perform the operation,
122 * then eventual access of that area in the desired mode
123 * will cause a crash.
124 */
125 BUG_ON(!src || !dst);
126
127 /*
128 * Use a temporary buffer, of cache-line multiple size, to
129 * avoid data corruption as documented in the APM.
130 */
131 if (cc_platform_has(CC_ATTR_GUEST_SEV_SNP)) {
132 snp_memcpy(sme_early_buffer, src, len, paddr, enc);
133 snp_memcpy(dst, sme_early_buffer, len, paddr, !enc);
134 } else {
135 memcpy(sme_early_buffer, src, len);
136 memcpy(dst, sme_early_buffer, len);
137 }
138
139 early_memunmap(dst, len);
140 early_memunmap(src, len);
141
142 paddr += len;
143 size -= len;
144 }
145 }
146
sme_early_encrypt(resource_size_t paddr,unsigned long size)147 void __init sme_early_encrypt(resource_size_t paddr, unsigned long size)
148 {
149 __sme_early_enc_dec(paddr, size, true);
150 }
151
sme_early_decrypt(resource_size_t paddr,unsigned long size)152 void __init sme_early_decrypt(resource_size_t paddr, unsigned long size)
153 {
154 __sme_early_enc_dec(paddr, size, false);
155 }
156
__sme_early_map_unmap_mem(void * vaddr,unsigned long size,bool map)157 static void __init __sme_early_map_unmap_mem(void *vaddr, unsigned long size,
158 bool map)
159 {
160 unsigned long paddr = (unsigned long)vaddr - __PAGE_OFFSET;
161 pmdval_t pmd_flags, pmd;
162
163 /* Use early_pmd_flags but remove the encryption mask */
164 pmd_flags = __sme_clr(early_pmd_flags);
165
166 do {
167 pmd = map ? (paddr & PMD_MASK) + pmd_flags : 0;
168 __early_make_pgtable((unsigned long)vaddr, pmd);
169
170 vaddr += PMD_SIZE;
171 paddr += PMD_SIZE;
172 size = (size <= PMD_SIZE) ? 0 : size - PMD_SIZE;
173 } while (size);
174
175 flush_tlb_local();
176 }
177
sme_unmap_bootdata(char * real_mode_data)178 void __init sme_unmap_bootdata(char *real_mode_data)
179 {
180 struct boot_params *boot_data;
181 unsigned long cmdline_paddr;
182
183 if (!cc_platform_has(CC_ATTR_HOST_MEM_ENCRYPT))
184 return;
185
186 /* Get the command line address before unmapping the real_mode_data */
187 boot_data = (struct boot_params *)real_mode_data;
188 cmdline_paddr = boot_data->hdr.cmd_line_ptr | ((u64)boot_data->ext_cmd_line_ptr << 32);
189
190 __sme_early_map_unmap_mem(real_mode_data, sizeof(boot_params), false);
191
192 if (!cmdline_paddr)
193 return;
194
195 __sme_early_map_unmap_mem(__va(cmdline_paddr), COMMAND_LINE_SIZE, false);
196 }
197
sme_map_bootdata(char * real_mode_data)198 void __init sme_map_bootdata(char *real_mode_data)
199 {
200 struct boot_params *boot_data;
201 unsigned long cmdline_paddr;
202
203 if (!cc_platform_has(CC_ATTR_HOST_MEM_ENCRYPT))
204 return;
205
206 __sme_early_map_unmap_mem(real_mode_data, sizeof(boot_params), true);
207
208 /* Get the command line address after mapping the real_mode_data */
209 boot_data = (struct boot_params *)real_mode_data;
210 cmdline_paddr = boot_data->hdr.cmd_line_ptr | ((u64)boot_data->ext_cmd_line_ptr << 32);
211
212 if (!cmdline_paddr)
213 return;
214
215 __sme_early_map_unmap_mem(__va(cmdline_paddr), COMMAND_LINE_SIZE, true);
216 }
217
sev_setup_arch(void)218 void __init sev_setup_arch(void)
219 {
220 phys_addr_t total_mem = memblock_phys_mem_size();
221 unsigned long size;
222
223 if (!cc_platform_has(CC_ATTR_GUEST_MEM_ENCRYPT))
224 return;
225
226 /*
227 * For SEV, all DMA has to occur via shared/unencrypted pages.
228 * SEV uses SWIOTLB to make this happen without changing device
229 * drivers. However, depending on the workload being run, the
230 * default 64MB of SWIOTLB may not be enough and SWIOTLB may
231 * run out of buffers for DMA, resulting in I/O errors and/or
232 * performance degradation especially with high I/O workloads.
233 *
234 * Adjust the default size of SWIOTLB for SEV guests using
235 * a percentage of guest memory for SWIOTLB buffers.
236 * Also, as the SWIOTLB bounce buffer memory is allocated
237 * from low memory, ensure that the adjusted size is within
238 * the limits of low available memory.
239 *
240 * The percentage of guest memory used here for SWIOTLB buffers
241 * is more of an approximation of the static adjustment which
242 * 64MB for <1G, and ~128M to 256M for 1G-to-4G, i.e., the 6%
243 */
244 size = total_mem * 6 / 100;
245 size = clamp_val(size, IO_TLB_DEFAULT_SIZE, SZ_1G);
246 swiotlb_adjust_size(size);
247
248 /* Set restricted memory access for virtio. */
249 virtio_set_mem_acc_cb(virtio_require_restricted_mem_acc);
250 }
251
pg_level_to_pfn(int level,pte_t * kpte,pgprot_t * ret_prot)252 static unsigned long pg_level_to_pfn(int level, pte_t *kpte, pgprot_t *ret_prot)
253 {
254 unsigned long pfn = 0;
255 pgprot_t prot;
256
257 switch (level) {
258 case PG_LEVEL_4K:
259 pfn = pte_pfn(*kpte);
260 prot = pte_pgprot(*kpte);
261 break;
262 case PG_LEVEL_2M:
263 pfn = pmd_pfn(*(pmd_t *)kpte);
264 prot = pmd_pgprot(*(pmd_t *)kpte);
265 break;
266 case PG_LEVEL_1G:
267 pfn = pud_pfn(*(pud_t *)kpte);
268 prot = pud_pgprot(*(pud_t *)kpte);
269 break;
270 default:
271 WARN_ONCE(1, "Invalid level for kpte\n");
272 return 0;
273 }
274
275 if (ret_prot)
276 *ret_prot = prot;
277
278 return pfn;
279 }
280
amd_enc_tlb_flush_required(bool enc)281 static bool amd_enc_tlb_flush_required(bool enc)
282 {
283 return true;
284 }
285
amd_enc_cache_flush_required(void)286 static bool amd_enc_cache_flush_required(void)
287 {
288 return !cpu_feature_enabled(X86_FEATURE_SME_COHERENT);
289 }
290
enc_dec_hypercall(unsigned long vaddr,unsigned long size,bool enc)291 static void enc_dec_hypercall(unsigned long vaddr, unsigned long size, bool enc)
292 {
293 #ifdef CONFIG_PARAVIRT
294 unsigned long vaddr_end = vaddr + size;
295
296 while (vaddr < vaddr_end) {
297 int psize, pmask, level;
298 unsigned long pfn;
299 pte_t *kpte;
300
301 kpte = lookup_address(vaddr, &level);
302 if (!kpte || pte_none(*kpte)) {
303 WARN_ONCE(1, "kpte lookup for vaddr\n");
304 return;
305 }
306
307 pfn = pg_level_to_pfn(level, kpte, NULL);
308 if (!pfn)
309 continue;
310
311 psize = page_level_size(level);
312 pmask = page_level_mask(level);
313
314 notify_page_enc_status_changed(pfn, psize >> PAGE_SHIFT, enc);
315
316 vaddr = (vaddr & pmask) + psize;
317 }
318 #endif
319 }
320
amd_enc_status_change_prepare(unsigned long vaddr,int npages,bool enc)321 static bool amd_enc_status_change_prepare(unsigned long vaddr, int npages, bool enc)
322 {
323 /*
324 * To maintain the security guarantees of SEV-SNP guests, make sure
325 * to invalidate the memory before encryption attribute is cleared.
326 */
327 if (cc_platform_has(CC_ATTR_GUEST_SEV_SNP) && !enc)
328 snp_set_memory_shared(vaddr, npages);
329
330 return true;
331 }
332
333 /* Return true unconditionally: return value doesn't matter for the SEV side */
amd_enc_status_change_finish(unsigned long vaddr,int npages,bool enc)334 static bool amd_enc_status_change_finish(unsigned long vaddr, int npages, bool enc)
335 {
336 /*
337 * After memory is mapped encrypted in the page table, validate it
338 * so that it is consistent with the page table updates.
339 */
340 if (cc_platform_has(CC_ATTR_GUEST_SEV_SNP) && enc)
341 snp_set_memory_private(vaddr, npages);
342
343 if (!cc_platform_has(CC_ATTR_HOST_MEM_ENCRYPT))
344 enc_dec_hypercall(vaddr, npages << PAGE_SHIFT, enc);
345
346 return true;
347 }
348
__set_clr_pte_enc(pte_t * kpte,int level,bool enc)349 static void __init __set_clr_pte_enc(pte_t *kpte, int level, bool enc)
350 {
351 pgprot_t old_prot, new_prot;
352 unsigned long pfn, pa, size;
353 pte_t new_pte;
354
355 pfn = pg_level_to_pfn(level, kpte, &old_prot);
356 if (!pfn)
357 return;
358
359 new_prot = old_prot;
360 if (enc)
361 pgprot_val(new_prot) |= _PAGE_ENC;
362 else
363 pgprot_val(new_prot) &= ~_PAGE_ENC;
364
365 /* If prot is same then do nothing. */
366 if (pgprot_val(old_prot) == pgprot_val(new_prot))
367 return;
368
369 pa = pfn << PAGE_SHIFT;
370 size = page_level_size(level);
371
372 /*
373 * We are going to perform in-place en-/decryption and change the
374 * physical page attribute from C=1 to C=0 or vice versa. Flush the
375 * caches to ensure that data gets accessed with the correct C-bit.
376 */
377 clflush_cache_range(__va(pa), size);
378
379 /* Encrypt/decrypt the contents in-place */
380 if (enc) {
381 sme_early_encrypt(pa, size);
382 } else {
383 sme_early_decrypt(pa, size);
384
385 /*
386 * ON SNP, the page state in the RMP table must happen
387 * before the page table updates.
388 */
389 early_snp_set_memory_shared((unsigned long)__va(pa), pa, 1);
390 }
391
392 /* Change the page encryption mask. */
393 new_pte = pfn_pte(pfn, new_prot);
394 set_pte_atomic(kpte, new_pte);
395
396 /*
397 * If page is set encrypted in the page table, then update the RMP table to
398 * add this page as private.
399 */
400 if (enc)
401 early_snp_set_memory_private((unsigned long)__va(pa), pa, 1);
402 }
403
early_set_memory_enc_dec(unsigned long vaddr,unsigned long size,bool enc)404 static int __init early_set_memory_enc_dec(unsigned long vaddr,
405 unsigned long size, bool enc)
406 {
407 unsigned long vaddr_end, vaddr_next, start;
408 unsigned long psize, pmask;
409 int split_page_size_mask;
410 int level, ret;
411 pte_t *kpte;
412
413 start = vaddr;
414 vaddr_next = vaddr;
415 vaddr_end = vaddr + size;
416
417 for (; vaddr < vaddr_end; vaddr = vaddr_next) {
418 kpte = lookup_address(vaddr, &level);
419 if (!kpte || pte_none(*kpte)) {
420 ret = 1;
421 goto out;
422 }
423
424 if (level == PG_LEVEL_4K) {
425 __set_clr_pte_enc(kpte, level, enc);
426 vaddr_next = (vaddr & PAGE_MASK) + PAGE_SIZE;
427 continue;
428 }
429
430 psize = page_level_size(level);
431 pmask = page_level_mask(level);
432
433 /*
434 * Check whether we can change the large page in one go.
435 * We request a split when the address is not aligned and
436 * the number of pages to set/clear encryption bit is smaller
437 * than the number of pages in the large page.
438 */
439 if (vaddr == (vaddr & pmask) &&
440 ((vaddr_end - vaddr) >= psize)) {
441 __set_clr_pte_enc(kpte, level, enc);
442 vaddr_next = (vaddr & pmask) + psize;
443 continue;
444 }
445
446 /*
447 * The virtual address is part of a larger page, create the next
448 * level page table mapping (4K or 2M). If it is part of a 2M
449 * page then we request a split of the large page into 4K
450 * chunks. A 1GB large page is split into 2M pages, resp.
451 */
452 if (level == PG_LEVEL_2M)
453 split_page_size_mask = 0;
454 else
455 split_page_size_mask = 1 << PG_LEVEL_2M;
456
457 /*
458 * kernel_physical_mapping_change() does not flush the TLBs, so
459 * a TLB flush is required after we exit from the for loop.
460 */
461 kernel_physical_mapping_change(__pa(vaddr & pmask),
462 __pa((vaddr_end & pmask) + psize),
463 split_page_size_mask);
464 }
465
466 ret = 0;
467
468 early_set_mem_enc_dec_hypercall(start, size, enc);
469 out:
470 __flush_tlb_all();
471 return ret;
472 }
473
early_set_memory_decrypted(unsigned long vaddr,unsigned long size)474 int __init early_set_memory_decrypted(unsigned long vaddr, unsigned long size)
475 {
476 return early_set_memory_enc_dec(vaddr, size, false);
477 }
478
early_set_memory_encrypted(unsigned long vaddr,unsigned long size)479 int __init early_set_memory_encrypted(unsigned long vaddr, unsigned long size)
480 {
481 return early_set_memory_enc_dec(vaddr, size, true);
482 }
483
early_set_mem_enc_dec_hypercall(unsigned long vaddr,unsigned long size,bool enc)484 void __init early_set_mem_enc_dec_hypercall(unsigned long vaddr, unsigned long size, bool enc)
485 {
486 enc_dec_hypercall(vaddr, size, enc);
487 }
488
sme_early_init(void)489 void __init sme_early_init(void)
490 {
491 if (!sme_me_mask)
492 return;
493
494 early_pmd_flags = __sme_set(early_pmd_flags);
495
496 __supported_pte_mask = __sme_set(__supported_pte_mask);
497
498 /* Update the protection map with memory encryption mask */
499 add_encrypt_protection_map();
500
501 x86_platform.guest.enc_status_change_prepare = amd_enc_status_change_prepare;
502 x86_platform.guest.enc_status_change_finish = amd_enc_status_change_finish;
503 x86_platform.guest.enc_tlb_flush_required = amd_enc_tlb_flush_required;
504 x86_platform.guest.enc_cache_flush_required = amd_enc_cache_flush_required;
505
506 /*
507 * AMD-SEV-ES intercepts the RDMSR to read the X2APIC ID in the
508 * parallel bringup low level code. That raises #VC which cannot be
509 * handled there.
510 * It does not provide a RDMSR GHCB protocol so the early startup
511 * code cannot directly communicate with the secure firmware. The
512 * alternative solution to retrieve the APIC ID via CPUID(0xb),
513 * which is covered by the GHCB protocol, is not viable either
514 * because there is no enforcement of the CPUID(0xb) provided
515 * "initial" APIC ID to be the same as the real APIC ID.
516 * Disable parallel bootup.
517 */
518 if (sev_status & MSR_AMD64_SEV_ES_ENABLED)
519 x86_cpuinit.parallel_bringup = false;
520 }
521
mem_encrypt_free_decrypted_mem(void)522 void __init mem_encrypt_free_decrypted_mem(void)
523 {
524 unsigned long vaddr, vaddr_end, npages;
525 int r;
526
527 vaddr = (unsigned long)__start_bss_decrypted_unused;
528 vaddr_end = (unsigned long)__end_bss_decrypted;
529 npages = (vaddr_end - vaddr) >> PAGE_SHIFT;
530
531 /*
532 * If the unused memory range was mapped decrypted, change the encryption
533 * attribute from decrypted to encrypted before freeing it. Base the
534 * re-encryption on the same condition used for the decryption in
535 * sme_postprocess_startup(). Higher level abstractions, such as
536 * CC_ATTR_MEM_ENCRYPT, aren't necessarily equivalent in a Hyper-V VM
537 * using vTOM, where sme_me_mask is always zero.
538 */
539 if (sme_me_mask) {
540 r = set_memory_encrypted(vaddr, npages);
541 if (r) {
542 pr_warn("failed to free unused decrypted pages\n");
543 return;
544 }
545 }
546
547 free_init_pages("unused decrypted", vaddr, vaddr_end);
548 }
549