1// SPDX-License-Identifier: GPL-2.0 2/* 3 * SDM845 LG G7 / V35 (judyln / judyp) common device tree 4 * 5 * Copyright (c) 2022, The Linux Foundation. All rights reserved. 6 */ 7 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 10#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 11 12#include "sdm845.dtsi" 13#include "pm8998.dtsi" 14#include "pmi8998.dtsi" 15 16/delete-node/ &adsp_mem; 17/delete-node/ &cdsp_mem; 18/delete-node/ &gpu_mem; 19/delete-node/ &ipa_fw_mem; 20/delete-node/ &mba_region; 21/delete-node/ &mpss_region; 22/delete-node/ &qseecom_mem; 23/delete-node/ &rmtfs_mem; 24/delete-node/ &slpi_mem; 25/delete-node/ &spss_mem; 26/delete-node/ &venus_mem; 27/delete-node/ &wlan_msa_mem; 28 29/ { 30 chosen { 31 #address-cells = <2>; 32 #size-cells = <2>; 33 ranges; 34 }; 35 36 reserved-memory { 37 #address-cells = <2>; 38 #size-cells = <2>; 39 ranges; 40 41 qseecom_mem: memory@b2000000 { 42 reg = <0 0xb2000000 0 0x1800000>; 43 no-map; 44 }; 45 46 gpu_mem: memory@8c415000 { 47 reg = <0 0x8c415000 0 0x2000>; 48 no-map; 49 }; 50 51 ipa_fw_mem: memory@8c400000 { 52 reg = <0 0x8c400000 0 0x10000>; 53 no-map; 54 }; 55 56 adsp_mem: memory@8c500000 { 57 reg = <0 0x8c500000 0 0x1e00000>; 58 no-map; 59 }; 60 61 wlan_msa_mem: memory@8e300000 { 62 reg = <0 0x8e300000 0 0x100000>; 63 no-map; 64 }; 65 66 mpss_region: memory@8e400000 { 67 reg = <0 0x8e400000 0 0x8900000>; 68 no-map; 69 }; 70 71 venus_mem: memory@96d00000 { 72 reg = <0 0x96d00000 0 0x500000>; 73 no-map; 74 }; 75 76 cdsp_mem: memory@97200000 { 77 reg = <0 0x97200000 0 0x800000>; 78 no-map; 79 }; 80 81 mba_region: memory@97a00000 { 82 reg = <0 0x97a00000 0 0x200000>; 83 no-map; 84 }; 85 86 slpi_mem: memory@97c00000 { 87 reg = <0 0x97c00000 0 0x1400000>; 88 no-map; 89 }; 90 91 spss_mem: memory@99000000 { 92 reg = <0 0x99000000 0 0x100000>; 93 no-map; 94 }; 95 96 /* Framebuffer region */ 97 memory@9d400000 { 98 reg = <0x0 0x9d400000 0x0 0x2400000>; 99 no-map; 100 }; 101 102 /* rmtfs lower guard */ 103 memory@f0800000 { 104 reg = <0 0xf0800000 0 0x1000>; 105 no-map; 106 }; 107 108 rmtfs_mem: memory@f0801000 { 109 compatible = "qcom,rmtfs-mem"; 110 reg = <0 0xf0801000 0 0x200000>; 111 no-map; 112 113 qcom,client-id = <1>; 114 qcom,vmid = <15>; 115 }; 116 117 /* rmtfs upper guard */ 118 memory@f0a01000 { 119 reg = <0 0xf0a01000 0 0x1000>; 120 no-map; 121 }; 122 }; 123 124 gpio-keys { 125 compatible = "gpio-keys"; 126 127 pinctrl-names = "default"; 128 pinctrl-0 = <&vol_up_pin_a>; 129 130 label = "GPIO Buttons"; 131 132 key-vol-up { 133 label = "Volume up"; 134 linux,code = <KEY_VOLUMEUP>; 135 gpios = <&pm8998_gpios 6 GPIO_ACTIVE_LOW>; 136 }; 137 }; 138 139 vph_pwr: vph-pwr-regulator { 140 compatible = "regulator-fixed"; 141 regulator-name = "vph_pwr"; 142 regulator-min-microvolt = <3700000>; 143 regulator-max-microvolt = <3700000>; 144 }; 145 146 /* 147 * Apparently RPMh does not provide support for PM8998 S4 because it 148 * is always-on; model it as a fixed regulator. 149 */ 150 vreg_s4a_1p8: pm8998-smps4-regulator { 151 compatible = "regulator-fixed"; 152 regulator-name = "vreg_s4a_1p8"; 153 154 regulator-min-microvolt = <1800000>; 155 regulator-max-microvolt = <1800000>; 156 157 regulator-always-on; 158 regulator-boot-on; 159 160 vin-supply = <&vph_pwr>; 161 }; 162}; 163 164&adsp_pas { 165 status = "okay"; 166}; 167 168&apps_rsc { 169 regulators-0 { 170 compatible = "qcom,pm8998-rpmh-regulators"; 171 qcom,pmic-id = "a"; 172 173 vdd-s1-supply = <&vph_pwr>; 174 vdd-s2-supply = <&vph_pwr>; 175 vdd-s3-supply = <&vph_pwr>; 176 vdd-s4-supply = <&vph_pwr>; 177 vdd-s5-supply = <&vph_pwr>; 178 vdd-s6-supply = <&vph_pwr>; 179 vdd-s7-supply = <&vph_pwr>; 180 vdd-s8-supply = <&vph_pwr>; 181 vdd-s9-supply = <&vph_pwr>; 182 vdd-s10-supply = <&vph_pwr>; 183 vdd-s11-supply = <&vph_pwr>; 184 vdd-s12-supply = <&vph_pwr>; 185 vdd-s13-supply = <&vph_pwr>; 186 vdd-l1-l27-supply = <&vreg_s7a_1p025>; 187 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>; 188 vdd-l3-l11-supply = <&vreg_s7a_1p025>; 189 vdd-l4-l5-supply = <&vreg_s7a_1p025>; 190 vdd-l6-supply = <&vph_pwr>; 191 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>; 192 vdd-l9-supply = <&vreg_bob>; 193 vdd-l10-l23-l25-supply = <&vreg_bob>; 194 vdd-l13-l19-l21-supply = <&vreg_bob>; 195 vdd-l16-l28-supply = <&vreg_bob>; 196 vdd-l18-l22-supply = <&vreg_bob>; 197 vdd-l20-l24-supply = <&vreg_bob>; 198 vdd-l26-supply = <&vreg_s3a_1p35>; 199 vin-lvs-1-2-supply = <&vreg_s4a_1p8>; 200 201 vreg_s2a_1p125: smps2 { 202 regulator-min-microvolt = <1100000>; 203 regulator-max-microvolt = <1100000>; 204 }; 205 206 vreg_s3a_1p35: smps3 { 207 regulator-min-microvolt = <1352000>; 208 regulator-max-microvolt = <1352000>; 209 }; 210 211 vreg_s5a_2p04: smps5 { 212 regulator-min-microvolt = <1904000>; 213 regulator-max-microvolt = <2040000>; 214 }; 215 216 vreg_s7a_1p025: smps7 { 217 regulator-min-microvolt = <900000>; 218 regulator-max-microvolt = <1028000>; 219 }; 220 221 vdd_qusb_hs0: 222 vdda_hp_pcie_core: 223 vdda_mipi_csi0_0p9: 224 vdda_mipi_csi1_0p9: 225 vdda_mipi_csi2_0p9: 226 vdda_mipi_dsi0_pll: 227 vdda_mipi_dsi1_pll: 228 vdda_qlink_lv: 229 vdda_qlink_lv_ck: 230 vdda_qrefs_0p875: 231 vdda_pcie_core: 232 vdda_pll_cc_ebi01: 233 vdda_pll_cc_ebi23: 234 vdda_sp_sensor: 235 vdda_ufs1_core: 236 vdda_ufs2_core: 237 vdda_usb1_ss_core: 238 vdda_usb2_ss_core: 239 vreg_l1a_0p875: ldo1 { 240 regulator-min-microvolt = <880000>; 241 regulator-max-microvolt = <880000>; 242 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 243 }; 244 245 vddpx_10: 246 vreg_l2a_1p2: ldo2 { 247 regulator-min-microvolt = <1200000>; 248 regulator-max-microvolt = <1200000>; 249 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 250 regulator-always-on; 251 }; 252 253 vreg_l3a_1p0: ldo3 { 254 regulator-min-microvolt = <1000000>; 255 regulator-max-microvolt = <1000000>; 256 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 257 }; 258 259 vdd_wcss_cx: 260 vdd_wcss_mx: 261 vdda_wcss_pll: 262 vreg_l5a_0p8: ldo5 { 263 regulator-min-microvolt = <800000>; 264 regulator-max-microvolt = <800000>; 265 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 266 }; 267 268 vddpx_13: 269 vreg_l6a_1p8: ldo6 { 270 regulator-min-microvolt = <1856000>; 271 regulator-max-microvolt = <1856000>; 272 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 273 }; 274 275 vreg_l7a_1p8: ldo7 { 276 regulator-min-microvolt = <1800000>; 277 regulator-max-microvolt = <1800000>; 278 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 279 }; 280 281 vreg_l8a_1p2: ldo8 { 282 regulator-min-microvolt = <1200000>; 283 regulator-max-microvolt = <1248000>; 284 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 285 }; 286 287 vreg_l9a_1p8: ldo9 { 288 regulator-min-microvolt = <1704000>; 289 regulator-max-microvolt = <2928000>; 290 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 291 }; 292 293 vreg_l10a_1p8: ldo10 { 294 regulator-min-microvolt = <1704000>; 295 regulator-max-microvolt = <2928000>; 296 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 297 }; 298 299 vreg_l11a_1p0: ldo11 { 300 regulator-min-microvolt = <1000000>; 301 regulator-max-microvolt = <1048000>; 302 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 303 }; 304 305 vdd_qfprom: 306 vdd_qfprom_sp: 307 vdda_apc1_cs_1p8: 308 vdda_gfx_cs_1p8: 309 vdda_qrefs_1p8: 310 vdda_qusb_hs0_1p8: 311 vddpx_11: 312 vreg_l12a_1p8: ldo12 { 313 regulator-min-microvolt = <1800000>; 314 regulator-max-microvolt = <1800000>; 315 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 316 }; 317 318 vddpx_2: 319 vreg_l13a_2p95: ldo13 { 320 regulator-min-microvolt = <1800000>; 321 regulator-max-microvolt = <2960000>; 322 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 323 }; 324 325 vreg_l14a_1p88: ldo14 { 326 regulator-min-microvolt = <1800000>; 327 regulator-max-microvolt = <1880000>; 328 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 329 }; 330 331 vreg_l15a_1p8: ldo15 { 332 regulator-min-microvolt = <1800000>; 333 regulator-max-microvolt = <1800000>; 334 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 335 }; 336 337 vreg_l17a_1p3: ldo17 { 338 regulator-min-microvolt = <1304000>; 339 regulator-max-microvolt = <1304000>; 340 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 341 }; 342 343 vreg_l18a_2p7: ldo18 { 344 regulator-min-microvolt = <2704000>; 345 regulator-max-microvolt = <2960000>; 346 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 347 }; 348 349 vreg_l20a_2p95: ldo20 { 350 regulator-min-microvolt = <2704000>; 351 regulator-max-microvolt = <2960000>; 352 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 353 }; 354 355 vreg_l21a_2p95: ldo21 { 356 regulator-min-microvolt = <2704000>; 357 regulator-max-microvolt = <2960000>; 358 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 359 }; 360 361 vreg_l22a_2p85: ldo22 { 362 regulator-min-microvolt = <2800000>; 363 regulator-max-microvolt = <2800000>; 364 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 365 }; 366 367 vreg_l23a_3p3: ldo23 { 368 regulator-min-microvolt = <3000000>; 369 regulator-max-microvolt = <3312000>; 370 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 371 }; 372 373 vdda_qusb_hs0_3p1: 374 vreg_l24a_3p075: ldo24 { 375 regulator-min-microvolt = <3088000>; 376 regulator-max-microvolt = <3088000>; 377 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 378 }; 379 380 vreg_l25a_3p3: ldo25 { 381 regulator-min-microvolt = <3000000>; 382 regulator-max-microvolt = <3312000>; 383 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 384 }; 385 386 vdda_hp_pcie_1p2: 387 vdda_hv_ebi0: 388 vdda_hv_ebi1: 389 vdda_hv_ebi2: 390 vdda_hv_ebi3: 391 vdda_mipi_csi_1p25: 392 vdda_mipi_dsi0_1p2: 393 vdda_mipi_dsi1_1p2: 394 vdda_pcie_1p2: 395 vdda_ufs1_1p2: 396 vdda_ufs2_1p2: 397 vdda_usb1_ss_1p2: 398 vdda_usb2_ss_1p2: 399 vreg_l26a_1p2: ldo26 { 400 regulator-min-microvolt = <1200000>; 401 regulator-max-microvolt = <1200000>; 402 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 403 }; 404 405 vreg_l28a_3p0: ldo28 { 406 regulator-min-microvolt = <1800000>; 407 regulator-max-microvolt = <1800000>; 408 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 409 }; 410 411 vreg_lvs1a_1p8: lvs1 { 412 regulator-min-microvolt = <1800000>; 413 regulator-max-microvolt = <1800000>; 414 }; 415 416 vreg_lvs2a_1p8: lvs2 { 417 regulator-min-microvolt = <1800000>; 418 regulator-max-microvolt = <1800000>; 419 }; 420 }; 421 422 regulators-1 { 423 compatible = "qcom,pmi8998-rpmh-regulators"; 424 qcom,pmic-id = "b"; 425 426 vdd-bob-supply = <&vph_pwr>; 427 428 vreg_bob: bob { 429 regulator-min-microvolt = <3312000>; 430 regulator-max-microvolt = <3600000>; 431 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; 432 regulator-allow-bypass; 433 }; 434 }; 435 436 regulators-2 { 437 compatible = "qcom,pm8005-rpmh-regulators"; 438 qcom,pmic-id = "c"; 439 440 vdd-s1-supply = <&vph_pwr>; 441 vdd-s2-supply = <&vph_pwr>; 442 vdd-s3-supply = <&vph_pwr>; 443 vdd-s4-supply = <&vph_pwr>; 444 445 vreg_s3c_0p6: smps3 { 446 regulator-min-microvolt = <600000>; 447 regulator-max-microvolt = <600000>; 448 }; 449 }; 450}; 451 452&cdsp_pas { 453 status = "okay"; 454}; 455 456&dispcc { 457 status = "disabled"; 458}; 459 460&gcc { 461 protected-clocks = <GCC_QSPI_CORE_CLK>, 462 <GCC_QSPI_CORE_CLK_SRC>, 463 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, 464 <GCC_LPASS_Q6_AXI_CLK>, 465 <GCC_LPASS_SWAY_CLK>; 466}; 467 468&gpu { 469 status = "okay"; 470 471 zap-shader { 472 memory-region = <&gpu_mem>; 473 }; 474}; 475 476&ipa { 477 qcom,gsi-loader = "modem"; 478 status = "okay"; 479}; 480 481&mss_pil { 482 status = "okay"; 483}; 484 485&pm8998_resin { 486 linux,code = <KEY_VOLUMEDOWN>; 487 status = "okay"; 488}; 489 490&sdhc_2 { 491 status = "okay"; 492 493 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>; 494 495 pinctrl-names = "default"; 496 pinctrl-0 = <&sdc2_clk &sdc2_cmd &sdc2_data &sd_card_det_n>; 497 498 vmmc-supply = <&vreg_l21a_2p95>; 499 vqmmc-supply = <&vddpx_2>; 500}; 501 502/* 503 * UFS works partially and only with clk_ignore_unused. 504 * Sometimes it crashes with I/O errors. 505 */ 506&ufs_mem_hc { 507 status = "okay"; 508 509 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>; 510 511 vcc-supply = <&vreg_l20a_2p95>; 512 vcc-max-microamp = <600000>; 513}; 514 515&ufs_mem_phy { 516 status = "okay"; 517 518 vdda-phy-supply = <&vdda_ufs1_core>; 519 vdda-pll-supply = <&vdda_ufs1_1p2>; 520}; 521 522&usb_1 { 523 status = "okay"; 524}; 525 526&usb_1_dwc3 { 527 /* TODO: these devices have usb id pin */ 528 dr_mode = "peripheral"; 529}; 530 531&usb_1_hsphy { 532 status = "okay"; 533 534 vdd-supply = <&vdda_usb1_ss_core>; 535 vdda-pll-supply = <&vdda_qusb_hs0_1p8>; 536 vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>; 537 538 qcom,imp-res-offset-value = <8>; 539 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>; 540 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>; 541 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>; 542}; 543 544&usb_1_qmpphy { 545 status = "okay"; 546 547 vdda-phy-supply = <&vdda_usb1_ss_1p2>; 548 vdda-pll-supply = <&vdda_usb1_ss_core>; 549}; 550 551/* PINCTRL - additions to nodes defined in sdm845.dtsi */ 552 553&tlmm { 554 gpio-reserved-ranges = <28 4>, <81 4>; 555 556 sdc2_clk: sdc2-clk-state { 557 pins = "sdc2_clk"; 558 bias-disable; 559 560 /* 561 * It seems that mmc_test reports errors if drive 562 * strength is not 16 on clk, cmd, and data pins. 563 * 564 * TODO: copy-pasted from mtp, try other values 565 * on these devices. 566 */ 567 drive-strength = <16>; 568 }; 569 570 sdc2_cmd: sdc2-cmd-state { 571 pins = "sdc2_cmd"; 572 bias-pull-up; 573 drive-strength = <16>; 574 }; 575 576 sdc2_data: sdc2-data-state { 577 pins = "sdc2_data"; 578 bias-pull-up; 579 drive-strength = <16>; 580 }; 581 582 sd_card_det_n: sd-card-det-n-state { 583 pins = "gpio126"; 584 function = "gpio"; 585 bias-pull-up; 586 }; 587}; 588 589&pm8998_gpios { 590 vol_up_pin_a: vol-up-active-state { 591 pins = "gpio6"; 592 function = "normal"; 593 input-enable; 594 bias-pull-up; 595 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>; 596 }; 597}; 598
