1// SPDX-License-Identifier: ISC
2/*
3 * Device Tree file for the Linksys WRV54G router
4 * Also known as Gemtek GTWX5715
5 * Based on a board file by George T. Joseph and other patches.
6 * This machine is based on IXP425.
7 */
8
9/dts-v1/;
10
11#include "intel-ixp42x.dtsi"
12#include <dt-bindings/input/input.h>
13
14/ {
15	model = "Linksys WRV54G / Gemtek GTWX5715";
16	compatible = "linksys,wrv54g", "gemtek,gtwx5715", "intel,ixp42x";
17	#address-cells = <1>;
18	#size-cells = <1>;
19
20	memory@0 {
21		/* 32 MB memory */
22		device_type = "memory";
23		reg = <0x00000000 0x2000000>;
24	};
25
26	chosen {
27		bootargs = "console=ttyS0,115200n8";
28		stdout-path = "uart1:115200n8";
29	};
30
31	aliases {
32		/* UART2 is the primary console */
33		serial0 = &uart1;
34		serial1 = &uart0;
35	};
36
37	/* There is an unpopulated LED slot (3) connected to GPIO 8 */
38	leds {
39		compatible = "gpio-leds";
40		led-power {
41			label = "wrv54g:yellow:power";
42			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
43			default-state = "on";
44			linux,default-trigger = "heartbeat";
45		};
46		led-wireless {
47			label = "wrv54g:yellow:wireless";
48			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
49			default-state = "on";
50		};
51		led-internet {
52			label = "wrv54g:yellow:internet";
53			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
54			default-state = "on";
55		};
56		led-dmz {
57			label = "wrv54g:green:dmz";
58			gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
59			default-state = "on";
60		};
61	};
62
63	/* This set-up comes from an OpenWrt patch */
64	spi {
65		compatible = "spi-gpio";
66		#address-cells = <1>;
67		#size-cells = <0>;
68
69		sck-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
70		miso-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
71		mosi-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
72		cs-gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
73		num-chipselects = <1>;
74
75		switch@0 {
76			compatible = "micrel,ks8995";
77			reg = <0>;
78			spi-max-frequency = <50000000>;
79		};
80	};
81
82	soc {
83		bus@c4000000 {
84			flash@0,0 {
85				compatible = "intel,ixp4xx-flash", "cfi-flash";
86				bank-width = <2>;
87				/* Enable writes on the expansion bus */
88				intel,ixp4xx-eb-write-enable = <1>;
89				/* 8 MB of Flash mapped in at CS0 */
90				reg = <0 0x00000000 0x00800000>;
91
92				partitions {
93					compatible = "fixed-partitions";
94					/*
95					 * Partition info from a boot log
96					 * CHECKME: not using redboot? FIS index 0x3f @7e00000?
97					 */
98					#address-cells = <1>;
99					#size-cells = <1>;
100					partition@0 {
101						label = "boot";
102						reg = <0x0 0x140000>;
103						read-only;
104					};
105					partition@140000 {
106						label = "linux";
107						reg = <0x140000 0x100000>;
108						read-only;
109					};
110					partition@240000 {
111						label = "root";
112						reg = <0x240000 0x480000>;
113						read-write;
114					};
115				};
116			};
117		};
118
119		pci@c0000000 {
120			status = "okay";
121
122			/*
123			 * We have up to 2 slots (IDSEL) with 2 swizzled IRQs.
124			 * Derived from the GTWX5715 PCI boardfile.
125			 */
126			#interrupt-cells = <1>;
127			interrupt-map-mask = <0xf800 0 0 7>;
128			interrupt-map =
129			/* IDSEL 0 */
130			<0x0000 0 0 1 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 0 is irq 10 */
131			<0x0000 0 0 2 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 0 is irq 11 */
132			/* IDSEL 1 */
133			<0x0800 0 0 1 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 1 is irq 11 */
134			<0x0800 0 0 2 &gpio0 10 IRQ_TYPE_LEVEL_LOW>; /* INT B on slot 1 is irq 10 */
135		};
136
137		/*
138		 * EthB - connected to the KS8995 switch ports 1-4
139		 * FIXME: the boardfile defines .phy_mask = 0x1e for this port to enable output to
140		 * all four switch ports, also using an out of tree multiphy patch.
141		 * Do we need a new binding and property for this?
142		 */
143		ethernet@c8009000 {
144			status = "okay";
145			queue-rx = <&qmgr 3>;
146			queue-txready = <&qmgr 20>;
147			phy-mode = "rgmii";
148			phy-handle = <&phy4>;
149
150			mdio {
151				#address-cells = <1>;
152				#size-cells = <0>;
153
154				/* Should be ports 1-4 on the KS8995 switch */
155				phy4: ethernet-phy@4 {
156					reg = <4>;
157				};
158
159				/* Should be port 5 on the KS8995 switch */
160				phy5: ethernet-phy@5 {
161					reg = <5>;
162				};
163			};
164		};
165
166		/* EthC - connected to KS8995 switch port 5 */
167		ethernet@c800a000 {
168			status = "okay";
169			queue-rx = <&qmgr 4>;
170			queue-txready = <&qmgr 21>;
171			phy-mode = "rgmii";
172			phy-handle = <&phy5>;
173		};
174	};
175};
176