1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/usb/starfive,jh7110-usb.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: StarFive JH7110 wrapper module for the Cadence USBSS-DRD controller 8 9maintainers: 10 - Minda Chen <minda.chen@starfivetech.com> 11 12properties: 13 compatible: 14 const: starfive,jh7110-usb 15 16 ranges: true 17 18 starfive,stg-syscon: 19 $ref: /schemas/types.yaml#/definitions/phandle-array 20 items: 21 - items: 22 - description: phandle to System Register Controller stg_syscon node. 23 - description: dr mode register offset of STG_SYSCONSAIF__SYSCFG register for USB. 24 description: 25 The phandle to System Register Controller syscon node and the offset 26 of STG_SYSCONSAIF__SYSCFG register for USB. 27 28 dr_mode: 29 enum: [host, otg, peripheral] 30 31 "#address-cells": 32 enum: [1, 2] 33 34 "#size-cells": 35 enum: [1, 2] 36 37 clocks: 38 items: 39 - description: link power management clock 40 - description: standby clock 41 - description: APB clock 42 - description: AXI clock 43 - description: UTMI APB clock 44 45 clock-names: 46 items: 47 - const: lpm 48 - const: stb 49 - const: apb 50 - const: axi 51 - const: utmi_apb 52 53 resets: 54 items: 55 - description: Power up reset 56 - description: APB clock reset 57 - description: AXI clock reset 58 - description: UTMI APB clock reset 59 60 reset-names: 61 items: 62 - const: pwrup 63 - const: apb 64 - const: axi 65 - const: utmi_apb 66 67patternProperties: 68 "^usb@[0-9a-f]+$": 69 $ref: cdns,usb3.yaml# 70 description: Required child node 71 72required: 73 - compatible 74 - ranges 75 - starfive,stg-syscon 76 - '#address-cells' 77 - '#size-cells' 78 - dr_mode 79 - clocks 80 - resets 81 82additionalProperties: false 83 84examples: 85 - | 86 usb@10100000 { 87 compatible = "starfive,jh7110-usb"; 88 ranges = <0x0 0x10100000 0x100000>; 89 #address-cells = <1>; 90 #size-cells = <1>; 91 starfive,stg-syscon = <&stg_syscon 0x4>; 92 clocks = <&syscrg 4>, 93 <&stgcrg 5>, 94 <&stgcrg 1>, 95 <&stgcrg 3>, 96 <&stgcrg 2>; 97 clock-names = "lpm", "stb", "apb", "axi", "utmi_apb"; 98 resets = <&stgcrg 10>, 99 <&stgcrg 8>, 100 <&stgcrg 7>, 101 <&stgcrg 9>; 102 reset-names = "pwrup", "apb", "axi", "utmi_apb"; 103 dr_mode = "host"; 104 105 usb@0 { 106 compatible = "cdns,usb3"; 107 reg = <0x0 0x10000>, 108 <0x10000 0x10000>, 109 <0x20000 0x10000>; 110 reg-names = "otg", "xhci", "dev"; 111 interrupts = <100>, <108>, <110>; 112 interrupt-names = "host", "peripheral", "otg"; 113 maximum-speed = "super-speed"; 114 }; 115 }; 116