1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/remoteproc/qcom,msm8996-mss-pil.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm MSM8996 MSS Peripheral Image Loader (and similar)
8
9maintainers:
10  - Bjorn Andersson <andersson@kernel.org>
11  - Sibi Sankar <quic_sibis@quicinc.com>
12
13description:
14  MSS Peripheral Image Loader loads and boots firmware on the
15  Qualcomm Technology Inc. MSM8996 Modem Hexagon Core (and similar).
16
17properties:
18  compatible:
19    enum:
20      - qcom,msm8996-mss-pil
21      - qcom,msm8998-mss-pil
22      - qcom,sdm660-mss-pil
23      - qcom,sdm845-mss-pil
24
25  reg:
26    items:
27      - description: MSS QDSP6 registers
28      - description: RMB registers
29
30  reg-names:
31    items:
32      - const: qdsp6
33      - const: rmb
34
35  iommus:
36    items:
37      - description: MSA Stream 1
38      - description: MSA Stream 2
39
40  interrupts:
41    items:
42      - description: Watchdog interrupt
43      - description: Fatal interrupt
44      - description: Ready interrupt
45      - description: Handover interrupt
46      - description: Stop acknowledge interrupt
47      - description: Shutdown acknowledge interrupt
48
49  interrupt-names:
50    items:
51      - const: wdog
52      - const: fatal
53      - const: ready
54      - const: handover
55      - const: stop-ack
56      - const: shutdown-ack
57
58  clocks:
59    minItems: 8
60    maxItems: 9
61
62  clock-names:
63    minItems: 8
64    maxItems: 9
65
66  power-domains:
67    items:
68      - description: CX power domain
69      - description: MX power domain
70      - description: MSS power domain (only valid for qcom,sdm845-mss-pil)
71    minItems: 2
72
73  power-domain-names:
74    items:
75      - const: cx
76      - const: mx
77      - const: mss # only valid for qcom,sdm845-mss-pil
78    minItems: 2
79
80  pll-supply:
81    description: PLL supply
82
83  resets:
84    items:
85      - description: AOSS restart
86      - description: PDC reset (only valid for qcom,sdm845-mss-pil)
87    minItems: 1
88
89  reset-names:
90    items:
91      - const: mss_restart
92      - const: pdc_reset # only valid for qcom,sdm845-mss-pil
93    minItems: 1
94
95  qcom,qmp:
96    $ref: /schemas/types.yaml#/definitions/phandle
97    description: Reference to the AOSS side-channel message RAM.
98
99  qcom,smem-states:
100    $ref: /schemas/types.yaml#/definitions/phandle-array
101    description: States used by the AP to signal the Hexagon core
102    items:
103      - description: Stop modem
104
105  qcom,smem-state-names:
106    description: Names of the states used by the AP to signal the Hexagon core
107    items:
108      - const: stop
109
110  qcom,halt-regs:
111    $ref: /schemas/types.yaml#/definitions/phandle-array
112    description:
113      Halt registers are used to halt transactions of various sub-components
114      within MSS.
115    items:
116      - items:
117          - description: phandle to TCSR syscon region
118          - description: offset to the Q6 halt register
119          - description: offset to the modem halt register
120          - description: offset to the nc halt register
121
122  memory-region:
123    items:
124      - description: MBA reserved region
125      - description: Modem reserved region
126      - description: Metadata reserved region
127
128  firmware-name:
129    $ref: /schemas/types.yaml#/definitions/string-array
130    items:
131      - description: Name of MBA firmware
132      - description: Name of modem firmware
133
134  smd-edge:
135    $ref: /schemas/remoteproc/qcom,smd-edge.yaml#
136    description:
137      Qualcomm Shared Memory subnode which represents communication edge,
138      channels and devices related to the Modem.
139    unevaluatedProperties: false
140
141  glink-edge:
142    $ref: /schemas/remoteproc/qcom,glink-edge.yaml#
143    description:
144      Qualcomm G-Link subnode which represents communication edge, channels
145      and devices related to the Modem.
146    unevaluatedProperties: false
147
148  # Deprecated properties
149  mba:
150    type: object
151    description:
152      MBA reserved region
153
154    properties:
155      memory-region: true
156
157    required:
158      - memory-region
159
160    additionalProperties: false
161    deprecated: true
162
163  mpss:
164    type: object
165    description:
166      MPSS reserved region
167
168    properties:
169      memory-region: true
170
171    required:
172      - memory-region
173
174    additionalProperties: false
175    deprecated: true
176
177  metadata:
178    type: object
179    description:
180      Metadata reserved region
181
182    properties:
183      memory-region: true
184
185    required:
186      - memory-region
187
188    additionalProperties: false
189    deprecated: true
190
191required:
192  - compatible
193  - reg
194  - reg-names
195  - interrupts
196  - interrupt-names
197  - clocks
198  - clock-names
199  - power-domains
200  - power-domain-names
201  - resets
202  - reset-names
203  - qcom,halt-regs
204  - qcom,smem-states
205  - qcom,smem-state-names
206
207allOf:
208  - if:
209      properties:
210        compatible:
211          const: qcom,msm8996-mss-pil
212    then:
213      properties:
214        clocks:
215          items:
216            - description: GCC MSS IFACE clock
217            - description: GCC MSS BUS clock
218            - description: GCC MSS MEM clock
219            - description: RPM XO clock
220            - description: GCC MSS GPLL0 clock
221            - description: GCC MSS SNOC_AXI clock
222            - description: GCC MSS MNOC_AXI clock
223            - description: RPM PNOC clock
224            - description: RPM QDSS clock
225        clock-names:
226          items:
227            - const: iface
228            - const: bus
229            - const: mem
230            - const: xo
231            - const: gpll0_mss
232            - const: snoc_axi
233            - const: mnoc_axi
234            - const: pnoc
235            - const: qdss
236        glink-edge: false
237      required:
238        - pll-supply
239        - smd-edge
240    else:
241      properties:
242        pll-supply: false
243        smd-edge: false
244
245  - if:
246      properties:
247        compatible:
248          enum:
249            - qcom,msm8998-mss-pil
250            - qcom,sdm660-mss-pil
251    then:
252      properties:
253        clocks:
254          items:
255            - description: GCC MSS IFACE clock
256            - description: GCC MSS BUS clock
257            - description: GCC MSS MEM clock
258            - description: GCC MSS GPLL0 clock
259            - description: GCC MSS SNOC_AXI clock
260            - description: GCC MSS MNOC_AXI clock
261            - description: RPMH QDSS clock
262            - description: RPMH XO clock
263        clock-names:
264          items:
265            - const: iface
266            - const: bus
267            - const: mem
268            - const: gpll0_mss
269            - const: snoc_axi
270            - const: mnoc_axi
271            - const: qdss
272            - const: xo
273      required:
274        - glink-edge
275
276  - if:
277      properties:
278        compatible:
279          const: qcom,sdm845-mss-pil
280    then:
281      properties:
282        power-domains:
283          minItems: 3
284        power-domain-names:
285          minItems: 3
286        resets:
287          minItems: 2
288        reset-names:
289          minItems: 2
290        clocks:
291          items:
292            - description: GCC MSS IFACE clock
293            - description: GCC MSS BUS clock
294            - description: GCC MSS MEM clock
295            - description: GCC MSS GPLL0 clock
296            - description: GCC MSS SNOC_AXI clock
297            - description: GCC MSS MNOC_AXI clock
298            - description: GCC MSS PRNG clock
299            - description: RPMH XO clock
300        clock-names:
301          items:
302            - const: iface
303            - const: bus
304            - const: mem
305            - const: gpll0_mss
306            - const: snoc_axi
307            - const: mnoc_axi
308            - const: prng
309            - const: xo
310      required:
311        - qcom,qmp
312        - glink-edge
313    else:
314      properties:
315        iommus: false
316        power-domains:
317          maxItems: 2
318        power-domain-names:
319          maxItems: 2
320        resets:
321          maxItems: 1
322        reset-names:
323          maxItems: 1
324        qcom,qmp: false
325
326  # Fallbacks for deprecated properties
327  - oneOf:
328      - required:
329          - memory-region
330      - required:
331          - mba
332          - mpss
333          - metadata
334
335additionalProperties: false
336
337examples:
338  - |
339    #include <dt-bindings/clock/qcom,gcc-sdm845.h>
340    #include <dt-bindings/clock/qcom,rpmh.h>
341    #include <dt-bindings/interrupt-controller/arm-gic.h>
342    #include <dt-bindings/power/qcom-rpmpd.h>
343    #include <dt-bindings/reset/qcom,sdm845-aoss.h>
344    #include <dt-bindings/reset/qcom,sdm845-pdc.h>
345
346    remoteproc@4080000 {
347        compatible = "qcom,sdm845-mss-pil";
348        reg = <0x04080000 0x408>, <0x04180000 0x48>;
349        reg-names = "qdsp6", "rmb";
350
351        interrupts-extended = <&intc GIC_SPI 266 IRQ_TYPE_EDGE_RISING>,
352                              <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
353                              <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
354                              <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
355                              <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
356                              <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
357        interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack",
358                          "shutdown-ack";
359
360        clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
361                 <&gcc GCC_MSS_Q6_MEMNOC_AXI_CLK>,
362                 <&gcc GCC_BOOT_ROM_AHB_CLK>,
363                 <&gcc GCC_MSS_GPLL0_DIV_CLK_SRC>,
364                 <&gcc GCC_MSS_SNOC_AXI_CLK>,
365                 <&gcc GCC_MSS_MFAB_AXIS_CLK>,
366                 <&gcc GCC_PRNG_AHB_CLK>,
367                 <&rpmhcc RPMH_CXO_CLK>;
368        clock-names = "iface", "bus", "mem", "gpll0_mss",
369                      "snoc_axi", "mnoc_axi", "prng", "xo";
370
371        power-domains = <&rpmhpd SDM845_CX>,
372                        <&rpmhpd SDM845_MX>,
373                        <&rpmhpd SDM845_MSS>;
374        power-domain-names = "cx", "mx", "mss";
375
376        memory-region = <&mba_mem>, <&mpss_mem>, <&mdata_mem>;
377
378        resets = <&aoss_reset AOSS_CC_MSS_RESTART>,
379                 <&pdc_reset PDC_MODEM_SYNC_RESET>;
380        reset-names = "mss_restart", "pdc_reset";
381
382        qcom,halt-regs = <&tcsr_regs_1 0x3000 0x5000 0x4000>;
383
384        qcom,qmp = <&aoss_qmp>;
385
386        qcom,smem-states = <&modem_smp2p_out 0>;
387        qcom,smem-state-names = "stop";
388
389        glink-edge {
390            interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>;
391            label = "modem";
392            qcom,remote-pid = <1>;
393            mboxes = <&apss_shared 12>;
394        };
395    };
396