1[
2    {
3        "BriefDescription": "Clockticks of the power control unit (PCU)",
4        "Counter": "0,1,2,3",
5        "CounterType": "PGMABLE",
6        "EventName": "UNC_P_CLOCKTICKS",
7        "PerPkg": "1",
8        "Unit": "PCU"
9    },
10    {
11        "BriefDescription": "UNC_P_CORE_TRANSITION_CYCLES",
12        "Counter": "0,1,2,3",
13        "CounterType": "PGMABLE",
14        "EventCode": "0x60",
15        "EventName": "UNC_P_CORE_TRANSITION_CYCLES",
16        "PerPkg": "1",
17        "Unit": "PCU"
18    },
19    {
20        "BriefDescription": "UNC_P_DEMOTIONS",
21        "Counter": "0,1,2,3",
22        "CounterType": "PGMABLE",
23        "EventCode": "0x30",
24        "EventName": "UNC_P_DEMOTIONS",
25        "PerPkg": "1",
26        "Unit": "PCU"
27    },
28    {
29        "BriefDescription": "Phase Shed 0 Cycles",
30        "Counter": "0,1,2,3",
31        "CounterType": "PGMABLE",
32        "EventCode": "0x75",
33        "EventName": "UNC_P_FIVR_PS_PS0_CYCLES",
34        "PerPkg": "1",
35        "Unit": "PCU"
36    },
37    {
38        "BriefDescription": "Phase Shed 1 Cycles",
39        "Counter": "0,1,2,3",
40        "CounterType": "PGMABLE",
41        "EventCode": "0x76",
42        "EventName": "UNC_P_FIVR_PS_PS1_CYCLES",
43        "PerPkg": "1",
44        "Unit": "PCU"
45    },
46    {
47        "BriefDescription": "Phase Shed 2 Cycles",
48        "Counter": "0,1,2,3",
49        "CounterType": "PGMABLE",
50        "EventCode": "0x77",
51        "EventName": "UNC_P_FIVR_PS_PS2_CYCLES",
52        "PerPkg": "1",
53        "Unit": "PCU"
54    },
55    {
56        "BriefDescription": "Phase Shed 3 Cycles",
57        "Counter": "0,1,2,3",
58        "CounterType": "PGMABLE",
59        "EventCode": "0x78",
60        "EventName": "UNC_P_FIVR_PS_PS3_CYCLES",
61        "PerPkg": "1",
62        "Unit": "PCU"
63    },
64    {
65        "BriefDescription": "AVX256 Frequency Clipping",
66        "Counter": "0,1,2,3",
67        "CounterType": "PGMABLE",
68        "EventCode": "0x49",
69        "EventName": "UNC_P_FREQ_CLIP_AVX256",
70        "PerPkg": "1",
71        "Unit": "PCU"
72    },
73    {
74        "BriefDescription": "AVX512 Frequency Clipping",
75        "Counter": "0,1,2,3",
76        "CounterType": "PGMABLE",
77        "EventCode": "0x4a",
78        "EventName": "UNC_P_FREQ_CLIP_AVX512",
79        "PerPkg": "1",
80        "Unit": "PCU"
81    },
82    {
83        "BriefDescription": "Thermal Strongest Upper Limit Cycles",
84        "Counter": "0,1,2,3",
85        "CounterType": "PGMABLE",
86        "EventCode": "0x04",
87        "EventName": "UNC_P_FREQ_MAX_LIMIT_THERMAL_CYCLES",
88        "PerPkg": "1",
89        "Unit": "PCU"
90    },
91    {
92        "BriefDescription": "Power Strongest Upper Limit Cycles",
93        "Counter": "0,1,2,3",
94        "CounterType": "PGMABLE",
95        "EventCode": "0x05",
96        "EventName": "UNC_P_FREQ_MAX_POWER_CYCLES",
97        "PerPkg": "1",
98        "Unit": "PCU"
99    },
100    {
101        "BriefDescription": "IO P Limit Strongest Lower Limit Cycles",
102        "Counter": "0,1,2,3",
103        "CounterType": "PGMABLE",
104        "EventCode": "0x73",
105        "EventName": "UNC_P_FREQ_MIN_IO_P_CYCLES",
106        "PerPkg": "1",
107        "Unit": "PCU"
108    },
109    {
110        "BriefDescription": "Cycles spent changing Frequency",
111        "Counter": "0,1,2,3",
112        "CounterType": "PGMABLE",
113        "EventCode": "0x74",
114        "EventName": "UNC_P_FREQ_TRANS_CYCLES",
115        "PerPkg": "1",
116        "Unit": "PCU"
117    },
118    {
119        "BriefDescription": "Memory Phase Shedding Cycles",
120        "Counter": "0,1,2,3",
121        "CounterType": "PGMABLE",
122        "EventCode": "0x2F",
123        "EventName": "UNC_P_MEMORY_PHASE_SHEDDING_CYCLES",
124        "PerPkg": "1",
125        "Unit": "PCU"
126    },
127    {
128        "BriefDescription": "Package C State Residency - C0",
129        "Counter": "0,1,2,3",
130        "CounterType": "PGMABLE",
131        "EventCode": "0x2A",
132        "EventName": "UNC_P_PKG_RESIDENCY_C0_CYCLES",
133        "PerPkg": "1",
134        "Unit": "PCU"
135    },
136    {
137        "BriefDescription": "Package C State Residency - C2E",
138        "Counter": "0,1,2,3",
139        "CounterType": "PGMABLE",
140        "EventCode": "0x2B",
141        "EventName": "UNC_P_PKG_RESIDENCY_C2E_CYCLES",
142        "PerPkg": "1",
143        "Unit": "PCU"
144    },
145    {
146        "BriefDescription": "Package C State Residency - C3",
147        "Counter": "0,1,2,3",
148        "CounterType": "PGMABLE",
149        "EventCode": "0x2C",
150        "EventName": "UNC_P_PKG_RESIDENCY_C3_CYCLES",
151        "PerPkg": "1",
152        "Unit": "PCU"
153    },
154    {
155        "BriefDescription": "Package C State Residency - C6",
156        "Counter": "0,1,2,3",
157        "CounterType": "PGMABLE",
158        "EventCode": "0x2D",
159        "EventName": "UNC_P_PKG_RESIDENCY_C6_CYCLES",
160        "PerPkg": "1",
161        "Unit": "PCU"
162    },
163    {
164        "BriefDescription": "UNC_P_PMAX_THROTTLED_CYCLES",
165        "Counter": "0,1,2,3",
166        "CounterType": "PGMABLE",
167        "EventCode": "0x06",
168        "EventName": "UNC_P_PMAX_THROTTLED_CYCLES",
169        "PerPkg": "1",
170        "Unit": "PCU"
171    },
172    {
173        "BriefDescription": "External Prochot",
174        "Counter": "0,1,2,3",
175        "CounterType": "PGMABLE",
176        "EventCode": "0x0A",
177        "EventName": "UNC_P_PROCHOT_EXTERNAL_CYCLES",
178        "PerPkg": "1",
179        "Unit": "PCU"
180    },
181    {
182        "BriefDescription": "Internal Prochot",
183        "Counter": "0,1,2,3",
184        "CounterType": "PGMABLE",
185        "EventCode": "0x09",
186        "EventName": "UNC_P_PROCHOT_INTERNAL_CYCLES",
187        "PerPkg": "1",
188        "Unit": "PCU"
189    },
190    {
191        "BriefDescription": "Total Core C State Transition Cycles",
192        "Counter": "0,1,2,3",
193        "CounterType": "PGMABLE",
194        "EventCode": "0x72",
195        "EventName": "UNC_P_TOTAL_TRANSITION_CYCLES",
196        "PerPkg": "1",
197        "Unit": "PCU"
198    },
199    {
200        "BriefDescription": "VR Hot",
201        "Counter": "0,1,2,3",
202        "CounterType": "PGMABLE",
203        "EventCode": "0x42",
204        "EventName": "UNC_P_VR_HOT_CYCLES",
205        "PerPkg": "1",
206        "Unit": "PCU"
207    },
208    {
209        "BriefDescription": "Number of cores in C-State : C0 and C1",
210        "Counter": "0,1,2,3",
211        "CounterType": "PGMABLE",
212        "EventCode": "0x80",
213        "EventName": "UNC_P_POWER_STATE_OCCUPANCY.CORES_C0",
214        "PerPkg": "1",
215        "Unit": "PCU"
216    },
217    {
218        "BriefDescription": "Number of cores in C-State : C3",
219        "Counter": "0,1,2,3",
220        "CounterType": "PGMABLE",
221        "EventCode": "0x80",
222        "EventName": "UNC_P_POWER_STATE_OCCUPANCY.CORES_C3",
223        "PerPkg": "1",
224        "Unit": "PCU"
225    },
226    {
227        "BriefDescription": "Number of cores in C-State : C6 and C7",
228        "Counter": "0,1,2,3",
229        "CounterType": "PGMABLE",
230        "EventCode": "0x80",
231        "EventName": "UNC_P_POWER_STATE_OCCUPANCY.CORES_C6",
232        "PerPkg": "1",
233        "Unit": "PCU"
234    }
235]
236