1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Rockchip PDM ALSA SoC Digital Audio Interface(DAI) driver
4 *
5 * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd
6 */
7
8 #include <linux/module.h>
9 #include <linux/clk.h>
10 #include <linux/of.h>
11 #include <linux/of_device.h>
12 #include <linux/pm_runtime.h>
13 #include <linux/rational.h>
14 #include <linux/regmap.h>
15 #include <linux/reset.h>
16 #include <sound/dmaengine_pcm.h>
17 #include <sound/pcm_params.h>
18
19 #include "rockchip_pdm.h"
20
21 #define PDM_DMA_BURST_SIZE (8) /* size * width: 8*4 = 32 bytes */
22 #define PDM_SIGNOFF_CLK_RATE (100000000)
23 #define PDM_PATH_MAX (4)
24
25 enum rk_pdm_version {
26 RK_PDM_RK3229,
27 RK_PDM_RK3308,
28 RK_PDM_RV1126,
29 };
30
31 struct rk_pdm_dev {
32 struct device *dev;
33 struct clk *clk;
34 struct clk *hclk;
35 struct regmap *regmap;
36 struct snd_dmaengine_dai_dma_data capture_dma_data;
37 struct reset_control *reset;
38 enum rk_pdm_version version;
39 };
40
41 struct rk_pdm_clkref {
42 unsigned int sr;
43 unsigned int clk;
44 unsigned int clk_out;
45 };
46
47 struct rk_pdm_ds_ratio {
48 unsigned int ratio;
49 unsigned int sr;
50 };
51
52 static struct rk_pdm_clkref clkref[] = {
53 { 8000, 40960000, 2048000 },
54 { 11025, 56448000, 2822400 },
55 { 12000, 61440000, 3072000 },
56 { 8000, 98304000, 2048000 },
57 { 12000, 98304000, 3072000 },
58 };
59
60 static struct rk_pdm_ds_ratio ds_ratio[] = {
61 { 0, 192000 },
62 { 0, 176400 },
63 { 0, 128000 },
64 { 1, 96000 },
65 { 1, 88200 },
66 { 1, 64000 },
67 { 2, 48000 },
68 { 2, 44100 },
69 { 2, 32000 },
70 { 3, 24000 },
71 { 3, 22050 },
72 { 3, 16000 },
73 { 4, 12000 },
74 { 4, 11025 },
75 { 4, 8000 },
76 };
77
get_pdm_clk(struct rk_pdm_dev * pdm,unsigned int sr,unsigned int * clk_src,unsigned int * clk_out)78 static unsigned int get_pdm_clk(struct rk_pdm_dev *pdm, unsigned int sr,
79 unsigned int *clk_src, unsigned int *clk_out)
80 {
81 unsigned int i, count, clk, div, rate;
82
83 clk = 0;
84 if (!sr)
85 return clk;
86
87 count = ARRAY_SIZE(clkref);
88 for (i = 0; i < count; i++) {
89 if (sr % clkref[i].sr)
90 continue;
91 div = sr / clkref[i].sr;
92 if ((div & (div - 1)) == 0) {
93 *clk_out = clkref[i].clk_out;
94 rate = clk_round_rate(pdm->clk, clkref[i].clk);
95 if (rate != clkref[i].clk)
96 continue;
97 clk = clkref[i].clk;
98 *clk_src = clkref[i].clk;
99 break;
100 }
101 }
102
103 if (!clk) {
104 clk = clk_round_rate(pdm->clk, PDM_SIGNOFF_CLK_RATE);
105 *clk_src = clk;
106 }
107 return clk;
108 }
109
get_pdm_ds_ratio(unsigned int sr)110 static unsigned int get_pdm_ds_ratio(unsigned int sr)
111 {
112 unsigned int i, count, ratio;
113
114 ratio = 0;
115 if (!sr)
116 return ratio;
117
118 count = ARRAY_SIZE(ds_ratio);
119 for (i = 0; i < count; i++) {
120 if (sr == ds_ratio[i].sr)
121 ratio = ds_ratio[i].ratio;
122 }
123 return ratio;
124 }
125
get_pdm_cic_ratio(unsigned int clk)126 static unsigned int get_pdm_cic_ratio(unsigned int clk)
127 {
128 switch (clk) {
129 case 4096000:
130 case 5644800:
131 case 6144000:
132 return 0;
133 case 2048000:
134 case 2822400:
135 case 3072000:
136 return 1;
137 case 1024000:
138 case 1411200:
139 case 1536000:
140 return 2;
141 default:
142 return 1;
143 }
144 }
145
samplerate_to_bit(unsigned int samplerate)146 static unsigned int samplerate_to_bit(unsigned int samplerate)
147 {
148 switch (samplerate) {
149 case 8000:
150 case 11025:
151 case 12000:
152 return 0;
153 case 16000:
154 case 22050:
155 case 24000:
156 return 1;
157 case 32000:
158 return 2;
159 case 44100:
160 case 48000:
161 return 3;
162 case 64000:
163 case 88200:
164 case 96000:
165 return 4;
166 case 128000:
167 case 176400:
168 case 192000:
169 return 5;
170 default:
171 return 1;
172 }
173 }
174
to_info(struct snd_soc_dai * dai)175 static inline struct rk_pdm_dev *to_info(struct snd_soc_dai *dai)
176 {
177 return snd_soc_dai_get_drvdata(dai);
178 }
179
rockchip_pdm_rxctrl(struct rk_pdm_dev * pdm,int on)180 static void rockchip_pdm_rxctrl(struct rk_pdm_dev *pdm, int on)
181 {
182 if (on) {
183 regmap_update_bits(pdm->regmap, PDM_DMA_CTRL,
184 PDM_DMA_RD_MSK, PDM_DMA_RD_EN);
185 regmap_update_bits(pdm->regmap, PDM_SYSCONFIG,
186 PDM_RX_MASK, PDM_RX_START);
187 } else {
188 regmap_update_bits(pdm->regmap, PDM_DMA_CTRL,
189 PDM_DMA_RD_MSK, PDM_DMA_RD_DIS);
190 regmap_update_bits(pdm->regmap, PDM_SYSCONFIG,
191 PDM_RX_MASK | PDM_RX_CLR_MASK,
192 PDM_RX_STOP | PDM_RX_CLR_WR);
193 }
194 }
195
rockchip_pdm_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)196 static int rockchip_pdm_hw_params(struct snd_pcm_substream *substream,
197 struct snd_pcm_hw_params *params,
198 struct snd_soc_dai *dai)
199 {
200 struct rk_pdm_dev *pdm = to_info(dai);
201 unsigned int val = 0;
202 unsigned int clk_rate, clk_div, samplerate;
203 unsigned int clk_src, clk_out = 0;
204 unsigned long m, n;
205 bool change;
206 int ret;
207
208 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
209 return 0;
210
211 samplerate = params_rate(params);
212 clk_rate = get_pdm_clk(pdm, samplerate, &clk_src, &clk_out);
213 if (!clk_rate)
214 return -EINVAL;
215
216 ret = clk_set_rate(pdm->clk, clk_src);
217 if (ret)
218 return -EINVAL;
219
220 if (pdm->version == RK_PDM_RK3308 ||
221 pdm->version == RK_PDM_RV1126) {
222 rational_best_approximation(clk_out, clk_src,
223 GENMASK(16 - 1, 0),
224 GENMASK(16 - 1, 0),
225 &m, &n);
226
227 val = (m << PDM_FD_NUMERATOR_SFT) |
228 (n << PDM_FD_DENOMINATOR_SFT);
229 regmap_update_bits_check(pdm->regmap, PDM_CTRL1,
230 PDM_FD_NUMERATOR_MSK |
231 PDM_FD_DENOMINATOR_MSK,
232 val, &change);
233 if (change) {
234 reset_control_assert(pdm->reset);
235 reset_control_deassert(pdm->reset);
236 rockchip_pdm_rxctrl(pdm, 0);
237 }
238 clk_div = n / m;
239 if (clk_div >= 40)
240 val = PDM_CLK_FD_RATIO_40;
241 else if (clk_div <= 35)
242 val = PDM_CLK_FD_RATIO_35;
243 else
244 return -EINVAL;
245 regmap_update_bits(pdm->regmap, PDM_CLK_CTRL,
246 PDM_CLK_FD_RATIO_MSK,
247 val);
248 }
249
250 if (pdm->version == RK_PDM_RV1126) {
251 val = get_pdm_cic_ratio(clk_out);
252 regmap_update_bits(pdm->regmap, PDM_CLK_CTRL, PDM_CIC_RATIO_MSK, val);
253 val = samplerate_to_bit(samplerate);
254 regmap_update_bits(pdm->regmap, PDM_CTRL0,
255 PDM_SAMPLERATE_MSK, PDM_SAMPLERATE(val));
256 } else {
257 val = get_pdm_ds_ratio(samplerate);
258 regmap_update_bits(pdm->regmap, PDM_CLK_CTRL, PDM_DS_RATIO_MSK, val);
259 }
260
261 regmap_update_bits(pdm->regmap, PDM_HPF_CTRL,
262 PDM_HPF_CF_MSK, PDM_HPF_60HZ);
263 regmap_update_bits(pdm->regmap, PDM_HPF_CTRL,
264 PDM_HPF_LE | PDM_HPF_RE, PDM_HPF_LE | PDM_HPF_RE);
265 regmap_update_bits(pdm->regmap, PDM_CLK_CTRL, PDM_CLK_EN, PDM_CLK_EN);
266 if (pdm->version != RK_PDM_RK3229)
267 regmap_update_bits(pdm->regmap, PDM_CTRL0,
268 PDM_MODE_MSK, PDM_MODE_LJ);
269
270 val = 0;
271 switch (params_format(params)) {
272 case SNDRV_PCM_FORMAT_S8:
273 val |= PDM_VDW(8);
274 break;
275 case SNDRV_PCM_FORMAT_S16_LE:
276 val |= PDM_VDW(16);
277 break;
278 case SNDRV_PCM_FORMAT_S20_3LE:
279 val |= PDM_VDW(20);
280 break;
281 case SNDRV_PCM_FORMAT_S24_LE:
282 val |= PDM_VDW(24);
283 break;
284 case SNDRV_PCM_FORMAT_S32_LE:
285 val |= PDM_VDW(32);
286 break;
287 default:
288 return -EINVAL;
289 }
290
291 switch (params_channels(params)) {
292 case 8:
293 val |= PDM_PATH3_EN;
294 fallthrough;
295 case 6:
296 val |= PDM_PATH2_EN;
297 fallthrough;
298 case 4:
299 val |= PDM_PATH1_EN;
300 fallthrough;
301 case 2:
302 val |= PDM_PATH0_EN;
303 break;
304 default:
305 dev_err(pdm->dev, "invalid channel: %d\n",
306 params_channels(params));
307 return -EINVAL;
308 }
309
310 regmap_update_bits(pdm->regmap, PDM_CTRL0,
311 PDM_PATH_MSK | PDM_VDW_MSK,
312 val);
313 /* all channels share the single FIFO */
314 regmap_update_bits(pdm->regmap, PDM_DMA_CTRL, PDM_DMA_RDL_MSK,
315 PDM_DMA_RDL(8 * params_channels(params)));
316
317 return 0;
318 }
319
rockchip_pdm_set_fmt(struct snd_soc_dai * cpu_dai,unsigned int fmt)320 static int rockchip_pdm_set_fmt(struct snd_soc_dai *cpu_dai,
321 unsigned int fmt)
322 {
323 struct rk_pdm_dev *pdm = to_info(cpu_dai);
324 unsigned int mask = 0, val = 0;
325
326 mask = PDM_CKP_MSK;
327 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
328 case SND_SOC_DAIFMT_NB_NF:
329 val = PDM_CKP_NORMAL;
330 break;
331 case SND_SOC_DAIFMT_IB_NF:
332 val = PDM_CKP_INVERTED;
333 break;
334 default:
335 return -EINVAL;
336 }
337
338 pm_runtime_get_sync(cpu_dai->dev);
339 regmap_update_bits(pdm->regmap, PDM_CLK_CTRL, mask, val);
340 pm_runtime_put(cpu_dai->dev);
341
342 return 0;
343 }
344
rockchip_pdm_trigger(struct snd_pcm_substream * substream,int cmd,struct snd_soc_dai * dai)345 static int rockchip_pdm_trigger(struct snd_pcm_substream *substream, int cmd,
346 struct snd_soc_dai *dai)
347 {
348 struct rk_pdm_dev *pdm = to_info(dai);
349 int ret = 0;
350
351 switch (cmd) {
352 case SNDRV_PCM_TRIGGER_START:
353 case SNDRV_PCM_TRIGGER_RESUME:
354 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
355 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
356 rockchip_pdm_rxctrl(pdm, 1);
357 break;
358 case SNDRV_PCM_TRIGGER_SUSPEND:
359 case SNDRV_PCM_TRIGGER_STOP:
360 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
361 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
362 rockchip_pdm_rxctrl(pdm, 0);
363 break;
364 default:
365 ret = -EINVAL;
366 break;
367 }
368
369 return ret;
370 }
371
rockchip_pdm_dai_probe(struct snd_soc_dai * dai)372 static int rockchip_pdm_dai_probe(struct snd_soc_dai *dai)
373 {
374 struct rk_pdm_dev *pdm = to_info(dai);
375
376 dai->capture_dma_data = &pdm->capture_dma_data;
377
378 return 0;
379 }
380
381 static const struct snd_soc_dai_ops rockchip_pdm_dai_ops = {
382 .set_fmt = rockchip_pdm_set_fmt,
383 .trigger = rockchip_pdm_trigger,
384 .hw_params = rockchip_pdm_hw_params,
385 };
386
387 #define ROCKCHIP_PDM_RATES SNDRV_PCM_RATE_8000_192000
388 #define ROCKCHIP_PDM_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
389 SNDRV_PCM_FMTBIT_S20_3LE | \
390 SNDRV_PCM_FMTBIT_S24_LE | \
391 SNDRV_PCM_FMTBIT_S32_LE)
392
393 static struct snd_soc_dai_driver rockchip_pdm_dai = {
394 .probe = rockchip_pdm_dai_probe,
395 .capture = {
396 .stream_name = "Capture",
397 .channels_min = 2,
398 .channels_max = 8,
399 .rates = ROCKCHIP_PDM_RATES,
400 .formats = ROCKCHIP_PDM_FORMATS,
401 },
402 .ops = &rockchip_pdm_dai_ops,
403 .symmetric_rate = 1,
404 };
405
406 static const struct snd_soc_component_driver rockchip_pdm_component = {
407 .name = "rockchip-pdm",
408 .legacy_dai_naming = 1,
409 };
410
rockchip_pdm_runtime_suspend(struct device * dev)411 static int rockchip_pdm_runtime_suspend(struct device *dev)
412 {
413 struct rk_pdm_dev *pdm = dev_get_drvdata(dev);
414
415 clk_disable_unprepare(pdm->clk);
416 clk_disable_unprepare(pdm->hclk);
417
418 return 0;
419 }
420
rockchip_pdm_runtime_resume(struct device * dev)421 static int rockchip_pdm_runtime_resume(struct device *dev)
422 {
423 struct rk_pdm_dev *pdm = dev_get_drvdata(dev);
424 int ret;
425
426 ret = clk_prepare_enable(pdm->clk);
427 if (ret) {
428 dev_err(pdm->dev, "clock enable failed %d\n", ret);
429 return ret;
430 }
431
432 ret = clk_prepare_enable(pdm->hclk);
433 if (ret) {
434 dev_err(pdm->dev, "hclock enable failed %d\n", ret);
435 return ret;
436 }
437
438 return 0;
439 }
440
rockchip_pdm_wr_reg(struct device * dev,unsigned int reg)441 static bool rockchip_pdm_wr_reg(struct device *dev, unsigned int reg)
442 {
443 switch (reg) {
444 case PDM_SYSCONFIG:
445 case PDM_CTRL0:
446 case PDM_CTRL1:
447 case PDM_CLK_CTRL:
448 case PDM_HPF_CTRL:
449 case PDM_FIFO_CTRL:
450 case PDM_DMA_CTRL:
451 case PDM_INT_EN:
452 case PDM_INT_CLR:
453 case PDM_DATA_VALID:
454 return true;
455 default:
456 return false;
457 }
458 }
459
rockchip_pdm_rd_reg(struct device * dev,unsigned int reg)460 static bool rockchip_pdm_rd_reg(struct device *dev, unsigned int reg)
461 {
462 switch (reg) {
463 case PDM_SYSCONFIG:
464 case PDM_CTRL0:
465 case PDM_CTRL1:
466 case PDM_CLK_CTRL:
467 case PDM_HPF_CTRL:
468 case PDM_FIFO_CTRL:
469 case PDM_DMA_CTRL:
470 case PDM_INT_EN:
471 case PDM_INT_CLR:
472 case PDM_INT_ST:
473 case PDM_DATA_VALID:
474 case PDM_RXFIFO_DATA:
475 case PDM_VERSION:
476 return true;
477 default:
478 return false;
479 }
480 }
481
rockchip_pdm_volatile_reg(struct device * dev,unsigned int reg)482 static bool rockchip_pdm_volatile_reg(struct device *dev, unsigned int reg)
483 {
484 switch (reg) {
485 case PDM_SYSCONFIG:
486 case PDM_FIFO_CTRL:
487 case PDM_INT_CLR:
488 case PDM_INT_ST:
489 case PDM_RXFIFO_DATA:
490 return true;
491 default:
492 return false;
493 }
494 }
495
rockchip_pdm_precious_reg(struct device * dev,unsigned int reg)496 static bool rockchip_pdm_precious_reg(struct device *dev, unsigned int reg)
497 {
498 switch (reg) {
499 case PDM_RXFIFO_DATA:
500 return true;
501 default:
502 return false;
503 }
504 }
505
506 static const struct reg_default rockchip_pdm_reg_defaults[] = {
507 { PDM_CTRL0, 0x78000017 },
508 { PDM_CTRL1, 0x0bb8ea60 },
509 { PDM_CLK_CTRL, 0x0000e401 },
510 { PDM_DMA_CTRL, 0x0000001f },
511 };
512
513 static const struct regmap_config rockchip_pdm_regmap_config = {
514 .reg_bits = 32,
515 .reg_stride = 4,
516 .val_bits = 32,
517 .max_register = PDM_VERSION,
518 .reg_defaults = rockchip_pdm_reg_defaults,
519 .num_reg_defaults = ARRAY_SIZE(rockchip_pdm_reg_defaults),
520 .writeable_reg = rockchip_pdm_wr_reg,
521 .readable_reg = rockchip_pdm_rd_reg,
522 .volatile_reg = rockchip_pdm_volatile_reg,
523 .precious_reg = rockchip_pdm_precious_reg,
524 .cache_type = REGCACHE_FLAT,
525 };
526
527 static const struct of_device_id rockchip_pdm_match[] __maybe_unused = {
528 { .compatible = "rockchip,pdm",
529 .data = (void *)RK_PDM_RK3229 },
530 { .compatible = "rockchip,px30-pdm",
531 .data = (void *)RK_PDM_RK3308 },
532 { .compatible = "rockchip,rk1808-pdm",
533 .data = (void *)RK_PDM_RK3308 },
534 { .compatible = "rockchip,rk3308-pdm",
535 .data = (void *)RK_PDM_RK3308 },
536 { .compatible = "rockchip,rk3568-pdm",
537 .data = (void *)RK_PDM_RV1126 },
538 { .compatible = "rockchip,rv1126-pdm",
539 .data = (void *)RK_PDM_RV1126 },
540 {},
541 };
542 MODULE_DEVICE_TABLE(of, rockchip_pdm_match);
543
rockchip_pdm_path_parse(struct rk_pdm_dev * pdm,struct device_node * node)544 static int rockchip_pdm_path_parse(struct rk_pdm_dev *pdm, struct device_node *node)
545 {
546 unsigned int path[PDM_PATH_MAX];
547 int cnt = 0, ret = 0, i = 0, val = 0, msk = 0;
548
549 cnt = of_count_phandle_with_args(node, "rockchip,path-map",
550 NULL);
551 if (cnt != PDM_PATH_MAX)
552 return cnt;
553
554 ret = of_property_read_u32_array(node, "rockchip,path-map",
555 path, cnt);
556 if (ret)
557 return ret;
558
559 for (i = 0; i < cnt; i++) {
560 if (path[i] >= PDM_PATH_MAX)
561 return -EINVAL;
562 msk |= PDM_PATH_MASK(i);
563 val |= PDM_PATH(i, path[i]);
564 }
565
566 regmap_update_bits(pdm->regmap, PDM_CLK_CTRL, msk, val);
567
568 return 0;
569 }
570
rockchip_pdm_probe(struct platform_device * pdev)571 static int rockchip_pdm_probe(struct platform_device *pdev)
572 {
573 struct device_node *node = pdev->dev.of_node;
574 const struct of_device_id *match;
575 struct rk_pdm_dev *pdm;
576 struct resource *res;
577 void __iomem *regs;
578 int ret;
579
580 pdm = devm_kzalloc(&pdev->dev, sizeof(*pdm), GFP_KERNEL);
581 if (!pdm)
582 return -ENOMEM;
583
584 match = of_match_device(rockchip_pdm_match, &pdev->dev);
585 if (match)
586 pdm->version = (enum rk_pdm_version)match->data;
587
588 if (pdm->version == RK_PDM_RK3308) {
589 pdm->reset = devm_reset_control_get(&pdev->dev, "pdm-m");
590 if (IS_ERR(pdm->reset))
591 return PTR_ERR(pdm->reset);
592 }
593
594 regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
595 if (IS_ERR(regs))
596 return PTR_ERR(regs);
597
598 pdm->regmap = devm_regmap_init_mmio(&pdev->dev, regs,
599 &rockchip_pdm_regmap_config);
600 if (IS_ERR(pdm->regmap))
601 return PTR_ERR(pdm->regmap);
602
603 pdm->capture_dma_data.addr = res->start + PDM_RXFIFO_DATA;
604 pdm->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
605 pdm->capture_dma_data.maxburst = PDM_DMA_BURST_SIZE;
606
607 pdm->dev = &pdev->dev;
608 dev_set_drvdata(&pdev->dev, pdm);
609
610 pdm->clk = devm_clk_get(&pdev->dev, "pdm_clk");
611 if (IS_ERR(pdm->clk))
612 return PTR_ERR(pdm->clk);
613
614 pdm->hclk = devm_clk_get(&pdev->dev, "pdm_hclk");
615 if (IS_ERR(pdm->hclk))
616 return PTR_ERR(pdm->hclk);
617
618 ret = clk_prepare_enable(pdm->hclk);
619 if (ret)
620 return ret;
621
622 pm_runtime_enable(&pdev->dev);
623 if (!pm_runtime_enabled(&pdev->dev)) {
624 ret = rockchip_pdm_runtime_resume(&pdev->dev);
625 if (ret)
626 goto err_pm_disable;
627 }
628
629 ret = devm_snd_soc_register_component(&pdev->dev,
630 &rockchip_pdm_component,
631 &rockchip_pdm_dai, 1);
632
633 if (ret) {
634 dev_err(&pdev->dev, "could not register dai: %d\n", ret);
635 goto err_suspend;
636 }
637
638 rockchip_pdm_rxctrl(pdm, 0);
639
640 ret = rockchip_pdm_path_parse(pdm, node);
641 if (ret != 0 && ret != -ENOENT)
642 goto err_suspend;
643
644 ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
645 if (ret) {
646 dev_err(&pdev->dev, "could not register pcm: %d\n", ret);
647 goto err_suspend;
648 }
649
650 return 0;
651
652 err_suspend:
653 if (!pm_runtime_status_suspended(&pdev->dev))
654 rockchip_pdm_runtime_suspend(&pdev->dev);
655 err_pm_disable:
656 pm_runtime_disable(&pdev->dev);
657
658 clk_disable_unprepare(pdm->hclk);
659
660 return ret;
661 }
662
rockchip_pdm_remove(struct platform_device * pdev)663 static int rockchip_pdm_remove(struct platform_device *pdev)
664 {
665 struct rk_pdm_dev *pdm = dev_get_drvdata(&pdev->dev);
666
667 pm_runtime_disable(&pdev->dev);
668 if (!pm_runtime_status_suspended(&pdev->dev))
669 rockchip_pdm_runtime_suspend(&pdev->dev);
670
671 clk_disable_unprepare(pdm->clk);
672 clk_disable_unprepare(pdm->hclk);
673
674 return 0;
675 }
676
677 #ifdef CONFIG_PM_SLEEP
rockchip_pdm_suspend(struct device * dev)678 static int rockchip_pdm_suspend(struct device *dev)
679 {
680 struct rk_pdm_dev *pdm = dev_get_drvdata(dev);
681
682 regcache_mark_dirty(pdm->regmap);
683
684 return 0;
685 }
686
rockchip_pdm_resume(struct device * dev)687 static int rockchip_pdm_resume(struct device *dev)
688 {
689 struct rk_pdm_dev *pdm = dev_get_drvdata(dev);
690 int ret;
691
692 ret = pm_runtime_resume_and_get(dev);
693 if (ret < 0)
694 return ret;
695
696 ret = regcache_sync(pdm->regmap);
697
698 pm_runtime_put(dev);
699
700 return ret;
701 }
702 #endif
703
704 static const struct dev_pm_ops rockchip_pdm_pm_ops = {
705 SET_RUNTIME_PM_OPS(rockchip_pdm_runtime_suspend,
706 rockchip_pdm_runtime_resume, NULL)
707 SET_SYSTEM_SLEEP_PM_OPS(rockchip_pdm_suspend, rockchip_pdm_resume)
708 };
709
710 static struct platform_driver rockchip_pdm_driver = {
711 .probe = rockchip_pdm_probe,
712 .remove = rockchip_pdm_remove,
713 .driver = {
714 .name = "rockchip-pdm",
715 .of_match_table = of_match_ptr(rockchip_pdm_match),
716 .pm = &rockchip_pdm_pm_ops,
717 },
718 };
719
720 module_platform_driver(rockchip_pdm_driver);
721
722 MODULE_AUTHOR("Sugar <sugar.zhang@rock-chips.com>");
723 MODULE_DESCRIPTION("Rockchip PDM Controller Driver");
724 MODULE_LICENSE("GPL v2");
725
