1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Geode GX framebuffer driver.
4  *
5  *   Copyright (C) 2006 Arcom Control Systems Ltd.
6  *
7  * This driver assumes that the BIOS has created a virtual PCI device header
8  * for the video device. The PCI header is assumed to contain the following
9  * BARs:
10  *
11  *    BAR0 - framebuffer memory
12  *    BAR1 - graphics processor registers
13  *    BAR2 - display controller registers
14  *    BAR3 - video processor and flat panel control registers.
15  *
16  * 16 MiB of framebuffer memory is assumed to be available.
17  */
18 #include <linux/aperture.h>
19 #include <linux/module.h>
20 #include <linux/kernel.h>
21 #include <linux/errno.h>
22 #include <linux/string.h>
23 #include <linux/mm.h>
24 #include <linux/delay.h>
25 #include <linux/fb.h>
26 #include <linux/console.h>
27 #include <linux/suspend.h>
28 #include <linux/init.h>
29 #include <linux/pci.h>
30 #include <linux/cs5535.h>
31 
32 #include <asm/olpc.h>
33 
34 #include "gxfb.h"
35 
36 static char *mode_option;
37 static int vram;
38 static int vt_switch;
39 
40 /* Modes relevant to the GX (taken from modedb.c) */
41 static struct fb_videomode gx_modedb[] = {
42 	/* 640x480-60 VESA */
43 	{ NULL, 60, 640, 480, 39682,  48, 16, 33, 10, 96, 2,
44 	  0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
45 	/* 640x480-75 VESA */
46 	{ NULL, 75, 640, 480, 31746, 120, 16, 16, 01, 64, 3,
47 	  0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
48 	/* 640x480-85 VESA */
49 	{ NULL, 85, 640, 480, 27777, 80, 56, 25, 01, 56, 3,
50 	  0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
51 	/* 800x600-60 VESA */
52 	{ NULL, 60, 800, 600, 25000, 88, 40, 23, 01, 128, 4,
53 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
54 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
55 	/* 800x600-75 VESA */
56 	{ NULL, 75, 800, 600, 20202, 160, 16, 21, 01, 80, 3,
57 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
58 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
59 	/* 800x600-85 VESA */
60 	{ NULL, 85, 800, 600, 17761, 152, 32, 27, 01, 64, 3,
61 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
62 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
63 	/* 1024x768-60 VESA */
64 	{ NULL, 60, 1024, 768, 15384, 160, 24, 29, 3, 136, 6,
65 	  0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
66 	/* 1024x768-75 VESA */
67 	{ NULL, 75, 1024, 768, 12690, 176, 16, 28, 1, 96, 3,
68 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
69 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
70 	/* 1024x768-85 VESA */
71 	{ NULL, 85, 1024, 768, 10582, 208, 48, 36, 1, 96, 3,
72 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
73 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
74 	/* 1280x960-60 VESA */
75 	{ NULL, 60, 1280, 960, 9259, 312, 96, 36, 1, 112, 3,
76 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
77 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
78 	/* 1280x960-85 VESA */
79 	{ NULL, 85, 1280, 960, 6734, 224, 64, 47, 1, 160, 3,
80 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
81 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
82 	/* 1280x1024-60 VESA */
83 	{ NULL, 60, 1280, 1024, 9259, 248, 48, 38, 1, 112, 3,
84 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
85 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
86 	/* 1280x1024-75 VESA */
87 	{ NULL, 75, 1280, 1024, 7407, 248, 16, 38, 1, 144, 3,
88 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
89 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
90 	/* 1280x1024-85 VESA */
91 	{ NULL, 85, 1280, 1024, 6349, 224, 64, 44, 1, 160, 3,
92 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
93 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
94 	/* 1600x1200-60 VESA */
95 	{ NULL, 60, 1600, 1200, 6172, 304, 64, 46, 1, 192, 3,
96 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
97 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
98 	/* 1600x1200-75 VESA */
99 	{ NULL, 75, 1600, 1200, 4938, 304, 64, 46, 1, 192, 3,
100 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
101 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
102 	/* 1600x1200-85 VESA */
103 	{ NULL, 85, 1600, 1200, 4357, 304, 64, 46, 1, 192, 3,
104 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
105 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
106 };
107 
108 static struct fb_videomode gx_dcon_modedb[] = {
109 	/* The only mode the DCON has is 1200x900 */
110 	{ NULL, 50, 1200, 900, 17460, 24, 8, 4, 5, 8, 3,
111 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
112 	  FB_VMODE_NONINTERLACED, 0 }
113 };
114 
get_modedb(struct fb_videomode ** modedb,unsigned int * size)115 static void get_modedb(struct fb_videomode **modedb, unsigned int *size)
116 {
117 	if (olpc_has_dcon()) {
118 		*modedb = (struct fb_videomode *) gx_dcon_modedb;
119 		*size = ARRAY_SIZE(gx_dcon_modedb);
120 	} else {
121 		*modedb = (struct fb_videomode *) gx_modedb;
122 		*size = ARRAY_SIZE(gx_modedb);
123 	}
124 }
125 
gxfb_check_var(struct fb_var_screeninfo * var,struct fb_info * info)126 static int gxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
127 {
128 	if (var->xres > 1600 || var->yres > 1200)
129 		return -EINVAL;
130 	if ((var->xres > 1280 || var->yres > 1024) && var->bits_per_pixel > 16)
131 		return -EINVAL;
132 
133 	if (var->bits_per_pixel == 32) {
134 		var->red.offset   = 16; var->red.length   = 8;
135 		var->green.offset =  8; var->green.length = 8;
136 		var->blue.offset  =  0; var->blue.length  = 8;
137 	} else if (var->bits_per_pixel == 16) {
138 		var->red.offset   = 11; var->red.length   = 5;
139 		var->green.offset =  5; var->green.length = 6;
140 		var->blue.offset  =  0; var->blue.length  = 5;
141 	} else if (var->bits_per_pixel == 8) {
142 		var->red.offset   = 0; var->red.length   = 8;
143 		var->green.offset = 0; var->green.length = 8;
144 		var->blue.offset  = 0; var->blue.length  = 8;
145 	} else
146 		return -EINVAL;
147 	var->transp.offset = 0; var->transp.length = 0;
148 
149 	/* Enough video memory? */
150 	if (gx_line_delta(var->xres, var->bits_per_pixel) * var->yres > info->fix.smem_len)
151 		return -EINVAL;
152 
153 	/* FIXME: Check timing parameters here? */
154 
155 	return 0;
156 }
157 
gxfb_set_par(struct fb_info * info)158 static int gxfb_set_par(struct fb_info *info)
159 {
160 	if (info->var.bits_per_pixel > 8)
161 		info->fix.visual = FB_VISUAL_TRUECOLOR;
162 	else
163 		info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
164 
165 	info->fix.line_length = gx_line_delta(info->var.xres, info->var.bits_per_pixel);
166 
167 	gx_set_mode(info);
168 
169 	return 0;
170 }
171 
chan_to_field(u_int chan,struct fb_bitfield * bf)172 static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf)
173 {
174 	chan &= 0xffff;
175 	chan >>= 16 - bf->length;
176 	return chan << bf->offset;
177 }
178 
gxfb_setcolreg(unsigned regno,unsigned red,unsigned green,unsigned blue,unsigned transp,struct fb_info * info)179 static int gxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
180 			   unsigned blue, unsigned transp,
181 			   struct fb_info *info)
182 {
183 	if (info->var.grayscale) {
184 		/* grayscale = 0.30*R + 0.59*G + 0.11*B */
185 		red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
186 	}
187 
188 	/* Truecolor has hardware independent palette */
189 	if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
190 		u32 *pal = info->pseudo_palette;
191 		u32 v;
192 
193 		if (regno >= 16)
194 			return -EINVAL;
195 
196 		v  = chan_to_field(red, &info->var.red);
197 		v |= chan_to_field(green, &info->var.green);
198 		v |= chan_to_field(blue, &info->var.blue);
199 
200 		pal[regno] = v;
201 	} else {
202 		if (regno >= 256)
203 			return -EINVAL;
204 
205 		gx_set_hw_palette_reg(info, regno, red, green, blue);
206 	}
207 
208 	return 0;
209 }
210 
gxfb_blank(int blank_mode,struct fb_info * info)211 static int gxfb_blank(int blank_mode, struct fb_info *info)
212 {
213 	return gx_blank_display(info, blank_mode);
214 }
215 
gxfb_map_video_memory(struct fb_info * info,struct pci_dev * dev)216 static int gxfb_map_video_memory(struct fb_info *info, struct pci_dev *dev)
217 {
218 	struct gxfb_par *par = info->par;
219 	int ret;
220 
221 	ret = pci_enable_device(dev);
222 	if (ret < 0)
223 		return ret;
224 
225 	ret = pci_request_region(dev, 3, "gxfb (video processor)");
226 	if (ret < 0)
227 		return ret;
228 	par->vid_regs = pci_ioremap_bar(dev, 3);
229 	if (!par->vid_regs)
230 		return -ENOMEM;
231 
232 	ret = pci_request_region(dev, 2, "gxfb (display controller)");
233 	if (ret < 0)
234 		return ret;
235 	par->dc_regs = pci_ioremap_bar(dev, 2);
236 	if (!par->dc_regs)
237 		return -ENOMEM;
238 
239 	ret = pci_request_region(dev, 1, "gxfb (graphics processor)");
240 	if (ret < 0)
241 		return ret;
242 	par->gp_regs = pci_ioremap_bar(dev, 1);
243 
244 	if (!par->gp_regs)
245 		return -ENOMEM;
246 
247 	ret = pci_request_region(dev, 0, "gxfb (framebuffer)");
248 	if (ret < 0)
249 		return ret;
250 
251 	info->fix.smem_start = pci_resource_start(dev, 0);
252 	info->fix.smem_len = vram ? vram : gx_frame_buffer_size();
253 	info->screen_base = ioremap_wc(info->fix.smem_start,
254 				       info->fix.smem_len);
255 	if (!info->screen_base)
256 		return -ENOMEM;
257 
258 	/* Set the 16MiB aligned base address of the graphics memory region
259 	 * in the display controller */
260 
261 	write_dc(par, DC_GLIU0_MEM_OFFSET, info->fix.smem_start & 0xFF000000);
262 
263 	dev_info(&dev->dev, "%d KiB of video memory at 0x%lx\n",
264 		 info->fix.smem_len / 1024, info->fix.smem_start);
265 
266 	return 0;
267 }
268 
269 static const struct fb_ops gxfb_ops = {
270 	.owner		= THIS_MODULE,
271 	.fb_check_var	= gxfb_check_var,
272 	.fb_set_par	= gxfb_set_par,
273 	.fb_setcolreg	= gxfb_setcolreg,
274 	.fb_blank       = gxfb_blank,
275 	/* No HW acceleration for now. */
276 	.fb_fillrect	= cfb_fillrect,
277 	.fb_copyarea	= cfb_copyarea,
278 	.fb_imageblit	= cfb_imageblit,
279 };
280 
gxfb_init_fbinfo(struct device * dev)281 static struct fb_info *gxfb_init_fbinfo(struct device *dev)
282 {
283 	struct gxfb_par *par;
284 	struct fb_info *info;
285 
286 	/* Alloc enough space for the pseudo palette. */
287 	info = framebuffer_alloc(sizeof(struct gxfb_par) + sizeof(u32) * 16,
288 			dev);
289 	if (!info)
290 		return NULL;
291 
292 	par = info->par;
293 
294 	strcpy(info->fix.id, "Geode GX");
295 
296 	info->fix.type		= FB_TYPE_PACKED_PIXELS;
297 	info->fix.type_aux	= 0;
298 	info->fix.xpanstep	= 0;
299 	info->fix.ypanstep	= 0;
300 	info->fix.ywrapstep	= 0;
301 	info->fix.accel		= FB_ACCEL_NONE;
302 
303 	info->var.nonstd	= 0;
304 	info->var.activate	= FB_ACTIVATE_NOW;
305 	info->var.height	= -1;
306 	info->var.width	= -1;
307 	info->var.accel_flags = 0;
308 	info->var.vmode	= FB_VMODE_NONINTERLACED;
309 
310 	info->fbops		= &gxfb_ops;
311 	info->flags		= FBINFO_DEFAULT;
312 	info->node		= -1;
313 
314 	info->pseudo_palette	= (void *)par + sizeof(struct gxfb_par);
315 
316 	info->var.grayscale	= 0;
317 
318 	if (fb_alloc_cmap(&info->cmap, 256, 0) < 0) {
319 		framebuffer_release(info);
320 		return NULL;
321 	}
322 
323 	return info;
324 }
325 
gxfb_suspend(struct device * dev)326 static int __maybe_unused gxfb_suspend(struct device *dev)
327 {
328 	struct fb_info *info = dev_get_drvdata(dev);
329 
330 	console_lock();
331 	gx_powerdown(info);
332 	fb_set_suspend(info, 1);
333 	console_unlock();
334 
335 	/* there's no point in setting PCI states; we emulate PCI, so
336 	 * we don't end up getting power savings anyways */
337 
338 	return 0;
339 }
340 
gxfb_resume(struct device * dev)341 static int __maybe_unused gxfb_resume(struct device *dev)
342 {
343 	struct fb_info *info = dev_get_drvdata(dev);
344 	int ret;
345 
346 	console_lock();
347 	ret = gx_powerup(info);
348 	if (ret) {
349 		printk(KERN_ERR "gxfb:  power up failed!\n");
350 		return ret;
351 	}
352 
353 	fb_set_suspend(info, 0);
354 	console_unlock();
355 	return 0;
356 }
357 
gxfb_probe(struct pci_dev * pdev,const struct pci_device_id * id)358 static int gxfb_probe(struct pci_dev *pdev, const struct pci_device_id *id)
359 {
360 	struct gxfb_par *par;
361 	struct fb_info *info;
362 	int ret;
363 	unsigned long val;
364 
365 	struct fb_videomode *modedb_ptr;
366 	unsigned int modedb_size;
367 
368 	ret = aperture_remove_conflicting_pci_devices(pdev, "gxfb");
369 	if (ret)
370 		return ret;
371 
372 	info = gxfb_init_fbinfo(&pdev->dev);
373 	if (!info)
374 		return -ENOMEM;
375 	par = info->par;
376 
377 	if ((ret = gxfb_map_video_memory(info, pdev)) < 0) {
378 		dev_err(&pdev->dev, "failed to map frame buffer or controller registers\n");
379 		goto err;
380 	}
381 
382 	/* Figure out if this is a TFT or CRT part */
383 
384 	rdmsrl(MSR_GX_GLD_MSR_CONFIG, val);
385 
386 	if ((val & MSR_GX_GLD_MSR_CONFIG_FP) == MSR_GX_GLD_MSR_CONFIG_FP)
387 		par->enable_crt = 0;
388 	else
389 		par->enable_crt = 1;
390 
391 	get_modedb(&modedb_ptr, &modedb_size);
392 	ret = fb_find_mode(&info->var, info, mode_option,
393 			   modedb_ptr, modedb_size, NULL, 16);
394 	if (ret == 0 || ret == 4) {
395 		dev_err(&pdev->dev, "could not find valid video mode\n");
396 		ret = -EINVAL;
397 		goto err;
398 	}
399 
400 
401 	/* Clear the frame buffer of garbage. */
402         memset_io(info->screen_base, 0, info->fix.smem_len);
403 
404 	gxfb_check_var(&info->var, info);
405 	gxfb_set_par(info);
406 
407 	pm_set_vt_switch(vt_switch);
408 
409 	if (register_framebuffer(info) < 0) {
410 		ret = -EINVAL;
411 		goto err;
412 	}
413 	pci_set_drvdata(pdev, info);
414 	fb_info(info, "%s frame buffer device\n", info->fix.id);
415 	return 0;
416 
417   err:
418 	if (info->screen_base) {
419 		iounmap(info->screen_base);
420 		pci_release_region(pdev, 0);
421 	}
422 	if (par->vid_regs) {
423 		iounmap(par->vid_regs);
424 		pci_release_region(pdev, 3);
425 	}
426 	if (par->dc_regs) {
427 		iounmap(par->dc_regs);
428 		pci_release_region(pdev, 2);
429 	}
430 	if (par->gp_regs) {
431 		iounmap(par->gp_regs);
432 		pci_release_region(pdev, 1);
433 	}
434 
435 	fb_dealloc_cmap(&info->cmap);
436 	framebuffer_release(info);
437 	return ret;
438 }
439 
gxfb_remove(struct pci_dev * pdev)440 static void gxfb_remove(struct pci_dev *pdev)
441 {
442 	struct fb_info *info = pci_get_drvdata(pdev);
443 	struct gxfb_par *par = info->par;
444 
445 	unregister_framebuffer(info);
446 
447 	iounmap((void __iomem *)info->screen_base);
448 	pci_release_region(pdev, 0);
449 
450 	iounmap(par->vid_regs);
451 	pci_release_region(pdev, 3);
452 
453 	iounmap(par->dc_regs);
454 	pci_release_region(pdev, 2);
455 
456 	iounmap(par->gp_regs);
457 	pci_release_region(pdev, 1);
458 
459 	fb_dealloc_cmap(&info->cmap);
460 
461 	framebuffer_release(info);
462 }
463 
464 static const struct pci_device_id gxfb_id_table[] = {
465 	{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_GX_VIDEO) },
466 	{ 0, }
467 };
468 
469 MODULE_DEVICE_TABLE(pci, gxfb_id_table);
470 
471 static const struct dev_pm_ops gxfb_pm_ops = {
472 #ifdef CONFIG_PM_SLEEP
473 	.suspend	= gxfb_suspend,
474 	.resume		= gxfb_resume,
475 	.freeze		= NULL,
476 	.thaw		= gxfb_resume,
477 	.poweroff	= NULL,
478 	.restore	= gxfb_resume,
479 #endif
480 };
481 
482 static struct pci_driver gxfb_driver = {
483 	.name		= "gxfb",
484 	.id_table	= gxfb_id_table,
485 	.probe		= gxfb_probe,
486 	.remove		= gxfb_remove,
487 	.driver.pm	= &gxfb_pm_ops,
488 };
489 
490 #ifndef MODULE
gxfb_setup(char * options)491 static int __init gxfb_setup(char *options)
492 {
493 
494 	char *opt;
495 
496 	if (!options || !*options)
497 		return 0;
498 
499 	while ((opt = strsep(&options, ",")) != NULL) {
500 		if (!*opt)
501 			continue;
502 
503 		mode_option = opt;
504 	}
505 
506 	return 0;
507 }
508 #endif
509 
gxfb_init(void)510 static int __init gxfb_init(void)
511 {
512 #ifndef MODULE
513 	char *option = NULL;
514 
515 	if (fb_get_options("gxfb", &option))
516 		return -ENODEV;
517 
518 	gxfb_setup(option);
519 #endif
520 	return pci_register_driver(&gxfb_driver);
521 }
522 
gxfb_cleanup(void)523 static void __exit gxfb_cleanup(void)
524 {
525 	pci_unregister_driver(&gxfb_driver);
526 }
527 
528 module_init(gxfb_init);
529 module_exit(gxfb_cleanup);
530 
531 module_param(mode_option, charp, 0);
532 MODULE_PARM_DESC(mode_option, "video mode (<x>x<y>[-<bpp>][@<refr>])");
533 
534 module_param(vram, int, 0);
535 MODULE_PARM_DESC(vram, "video memory size");
536 
537 module_param(vt_switch, int, 0);
538 MODULE_PARM_DESC(vt_switch, "enable VT switch during suspend/resume");
539 
540 MODULE_DESCRIPTION("Framebuffer driver for the AMD Geode GX");
541 MODULE_LICENSE("GPL");
542