1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Serial Port driver for Open Firmware platform devices
4 *
5 * Copyright (C) 2006 Arnd Bergmann <arnd@arndb.de>, IBM Corp.
6 */
7 #include <linux/console.h>
8 #include <linux/module.h>
9 #include <linux/slab.h>
10 #include <linux/serial_core.h>
11 #include <linux/serial_reg.h>
12 #include <linux/of_address.h>
13 #include <linux/of_irq.h>
14 #include <linux/of_platform.h>
15 #include <linux/pm_runtime.h>
16 #include <linux/clk.h>
17 #include <linux/reset.h>
18
19 #include "8250.h"
20
21 struct of_serial_info {
22 struct clk *clk;
23 struct reset_control *rst;
24 int type;
25 int line;
26 };
27
28 /*
29 * Fill a struct uart_port for a given device node
30 */
of_platform_serial_setup(struct platform_device * ofdev,int type,struct uart_8250_port * up,struct of_serial_info * info)31 static int of_platform_serial_setup(struct platform_device *ofdev,
32 int type, struct uart_8250_port *up,
33 struct of_serial_info *info)
34 {
35 struct resource resource;
36 struct device_node *np = ofdev->dev.of_node;
37 struct uart_port *port = &up->port;
38 u32 clk, spd, prop;
39 int ret, irq;
40
41 memset(port, 0, sizeof *port);
42
43 pm_runtime_enable(&ofdev->dev);
44 pm_runtime_get_sync(&ofdev->dev);
45
46 if (of_property_read_u32(np, "clock-frequency", &clk)) {
47
48 /* Get clk rate through clk driver if present */
49 info->clk = devm_clk_get(&ofdev->dev, NULL);
50 if (IS_ERR(info->clk)) {
51 ret = PTR_ERR(info->clk);
52 if (ret != -EPROBE_DEFER)
53 dev_warn(&ofdev->dev,
54 "failed to get clock: %d\n", ret);
55 goto err_pmruntime;
56 }
57
58 ret = clk_prepare_enable(info->clk);
59 if (ret < 0)
60 goto err_pmruntime;
61
62 clk = clk_get_rate(info->clk);
63 }
64 /* If current-speed was set, then try not to change it. */
65 if (of_property_read_u32(np, "current-speed", &spd) == 0)
66 port->custom_divisor = clk / (16 * spd);
67
68 ret = of_address_to_resource(np, 0, &resource);
69 if (ret) {
70 dev_warn(&ofdev->dev, "invalid address\n");
71 goto err_unprepare;
72 }
73
74 port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT |
75 UPF_FIXED_TYPE;
76 spin_lock_init(&port->lock);
77
78 if (resource_type(&resource) == IORESOURCE_IO) {
79 port->iotype = UPIO_PORT;
80 port->iobase = resource.start;
81 } else {
82 port->mapbase = resource.start;
83 port->mapsize = resource_size(&resource);
84
85 /* Check for shifted address mapping */
86 if (of_property_read_u32(np, "reg-offset", &prop) == 0) {
87 if (prop >= port->mapsize) {
88 dev_warn(&ofdev->dev, "reg-offset %u exceeds region size %pa\n",
89 prop, &port->mapsize);
90 ret = -EINVAL;
91 goto err_unprepare;
92 }
93
94 port->mapbase += prop;
95 port->mapsize -= prop;
96 }
97
98 port->iotype = UPIO_MEM;
99 if (of_property_read_u32(np, "reg-io-width", &prop) == 0) {
100 switch (prop) {
101 case 1:
102 port->iotype = UPIO_MEM;
103 break;
104 case 2:
105 port->iotype = UPIO_MEM16;
106 break;
107 case 4:
108 port->iotype = of_device_is_big_endian(np) ?
109 UPIO_MEM32BE : UPIO_MEM32;
110 break;
111 default:
112 dev_warn(&ofdev->dev, "unsupported reg-io-width (%d)\n",
113 prop);
114 ret = -EINVAL;
115 goto err_unprepare;
116 }
117 }
118 port->flags |= UPF_IOREMAP;
119 }
120
121 /* Compatibility with the deprecated pxa driver and 8250_pxa drivers. */
122 if (of_device_is_compatible(np, "mrvl,mmp-uart"))
123 port->regshift = 2;
124
125 /* Check for registers offset within the devices address range */
126 if (of_property_read_u32(np, "reg-shift", &prop) == 0)
127 port->regshift = prop;
128
129 /* Check for fifo size */
130 if (of_property_read_u32(np, "fifo-size", &prop) == 0)
131 port->fifosize = prop;
132
133 /* Check for a fixed line number */
134 ret = of_alias_get_id(np, "serial");
135 if (ret >= 0)
136 port->line = ret;
137
138 irq = of_irq_get(np, 0);
139 if (irq < 0) {
140 if (irq == -EPROBE_DEFER) {
141 ret = -EPROBE_DEFER;
142 goto err_unprepare;
143 }
144 /* IRQ support not mandatory */
145 irq = 0;
146 }
147
148 port->irq = irq;
149
150 info->rst = devm_reset_control_get_optional_shared(&ofdev->dev, NULL);
151 if (IS_ERR(info->rst)) {
152 ret = PTR_ERR(info->rst);
153 goto err_unprepare;
154 }
155
156 ret = reset_control_deassert(info->rst);
157 if (ret)
158 goto err_unprepare;
159
160 port->type = type;
161 port->uartclk = clk;
162
163 if (of_property_read_bool(np, "no-loopback-test"))
164 port->flags |= UPF_SKIP_TEST;
165
166 port->dev = &ofdev->dev;
167 port->rs485_config = serial8250_em485_config;
168 port->rs485_supported = serial8250_em485_supported;
169 up->rs485_start_tx = serial8250_em485_start_tx;
170 up->rs485_stop_tx = serial8250_em485_stop_tx;
171
172 switch (type) {
173 case PORT_RT2880:
174 port->iotype = UPIO_AU;
175 break;
176 }
177
178 if (IS_ENABLED(CONFIG_SERIAL_8250_FSL) &&
179 (of_device_is_compatible(np, "fsl,ns16550") ||
180 of_device_is_compatible(np, "fsl,16550-FIFO64"))) {
181 port->handle_irq = fsl8250_handle_irq;
182 port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_8250_CONSOLE);
183 }
184
185 return 0;
186 err_unprepare:
187 clk_disable_unprepare(info->clk);
188 err_pmruntime:
189 pm_runtime_put_sync(&ofdev->dev);
190 pm_runtime_disable(&ofdev->dev);
191 return ret;
192 }
193
194 /*
195 * Try to register a serial port
196 */
of_platform_serial_probe(struct platform_device * ofdev)197 static int of_platform_serial_probe(struct platform_device *ofdev)
198 {
199 struct of_serial_info *info;
200 struct uart_8250_port port8250;
201 unsigned int port_type;
202 u32 tx_threshold;
203 int ret;
204
205 if (IS_ENABLED(CONFIG_SERIAL_8250_BCM7271) &&
206 of_device_is_compatible(ofdev->dev.of_node, "brcm,bcm7271-uart"))
207 return -ENODEV;
208
209 port_type = (unsigned long)of_device_get_match_data(&ofdev->dev);
210 if (port_type == PORT_UNKNOWN)
211 return -EINVAL;
212
213 if (of_property_read_bool(ofdev->dev.of_node, "used-by-rtas"))
214 return -EBUSY;
215
216 info = kzalloc(sizeof(*info), GFP_KERNEL);
217 if (info == NULL)
218 return -ENOMEM;
219
220 memset(&port8250, 0, sizeof(port8250));
221 ret = of_platform_serial_setup(ofdev, port_type, &port8250, info);
222 if (ret)
223 goto err_free;
224
225 if (port8250.port.fifosize)
226 port8250.capabilities = UART_CAP_FIFO;
227
228 /* Check for TX FIFO threshold & set tx_loadsz */
229 if ((of_property_read_u32(ofdev->dev.of_node, "tx-threshold",
230 &tx_threshold) == 0) &&
231 (tx_threshold < port8250.port.fifosize))
232 port8250.tx_loadsz = port8250.port.fifosize - tx_threshold;
233
234 if (of_property_read_bool(ofdev->dev.of_node, "auto-flow-control"))
235 port8250.capabilities |= UART_CAP_AFE;
236
237 if (of_property_read_u32(ofdev->dev.of_node,
238 "overrun-throttle-ms",
239 &port8250.overrun_backoff_time_ms) != 0)
240 port8250.overrun_backoff_time_ms = 0;
241
242 ret = serial8250_register_8250_port(&port8250);
243 if (ret < 0)
244 goto err_dispose;
245
246 info->type = port_type;
247 info->line = ret;
248 platform_set_drvdata(ofdev, info);
249 return 0;
250 err_dispose:
251 irq_dispose_mapping(port8250.port.irq);
252 pm_runtime_put_sync(&ofdev->dev);
253 pm_runtime_disable(&ofdev->dev);
254 clk_disable_unprepare(info->clk);
255 err_free:
256 kfree(info);
257 return ret;
258 }
259
260 /*
261 * Release a line
262 */
of_platform_serial_remove(struct platform_device * ofdev)263 static int of_platform_serial_remove(struct platform_device *ofdev)
264 {
265 struct of_serial_info *info = platform_get_drvdata(ofdev);
266
267 serial8250_unregister_port(info->line);
268
269 reset_control_assert(info->rst);
270 pm_runtime_put_sync(&ofdev->dev);
271 pm_runtime_disable(&ofdev->dev);
272 clk_disable_unprepare(info->clk);
273 kfree(info);
274 return 0;
275 }
276
277 #ifdef CONFIG_PM_SLEEP
of_serial_suspend(struct device * dev)278 static int of_serial_suspend(struct device *dev)
279 {
280 struct of_serial_info *info = dev_get_drvdata(dev);
281 struct uart_8250_port *port8250 = serial8250_get_port(info->line);
282 struct uart_port *port = &port8250->port;
283
284 serial8250_suspend_port(info->line);
285
286 if (!uart_console(port) || console_suspend_enabled) {
287 pm_runtime_put_sync(dev);
288 clk_disable_unprepare(info->clk);
289 }
290 return 0;
291 }
292
of_serial_resume(struct device * dev)293 static int of_serial_resume(struct device *dev)
294 {
295 struct of_serial_info *info = dev_get_drvdata(dev);
296 struct uart_8250_port *port8250 = serial8250_get_port(info->line);
297 struct uart_port *port = &port8250->port;
298
299 if (!uart_console(port) || console_suspend_enabled) {
300 pm_runtime_get_sync(dev);
301 clk_prepare_enable(info->clk);
302 }
303
304 serial8250_resume_port(info->line);
305
306 return 0;
307 }
308 #endif
309 static SIMPLE_DEV_PM_OPS(of_serial_pm_ops, of_serial_suspend, of_serial_resume);
310
311 /*
312 * A few common types, add more as needed.
313 */
314 static const struct of_device_id of_platform_serial_table[] = {
315 { .compatible = "ns8250", .data = (void *)PORT_8250, },
316 { .compatible = "ns16450", .data = (void *)PORT_16450, },
317 { .compatible = "ns16550a", .data = (void *)PORT_16550A, },
318 { .compatible = "ns16550", .data = (void *)PORT_16550, },
319 { .compatible = "ns16750", .data = (void *)PORT_16750, },
320 { .compatible = "ns16850", .data = (void *)PORT_16850, },
321 { .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, },
322 { .compatible = "ralink,rt2880-uart", .data = (void *)PORT_RT2880, },
323 { .compatible = "intel,xscale-uart", .data = (void *)PORT_XSCALE, },
324 { .compatible = "altr,16550-FIFO32",
325 .data = (void *)PORT_ALTR_16550_F32, },
326 { .compatible = "altr,16550-FIFO64",
327 .data = (void *)PORT_ALTR_16550_F64, },
328 { .compatible = "altr,16550-FIFO128",
329 .data = (void *)PORT_ALTR_16550_F128, },
330 { .compatible = "fsl,16550-FIFO64",
331 .data = (void *)PORT_16550A_FSL64, },
332 { .compatible = "mediatek,mtk-btif",
333 .data = (void *)PORT_MTK_BTIF, },
334 { .compatible = "mrvl,mmp-uart",
335 .data = (void *)PORT_XSCALE, },
336 { .compatible = "ti,da830-uart", .data = (void *)PORT_DA830, },
337 { .compatible = "nuvoton,wpcm450-uart", .data = (void *)PORT_NPCM, },
338 { .compatible = "nuvoton,npcm750-uart", .data = (void *)PORT_NPCM, },
339 { /* end of list */ },
340 };
341 MODULE_DEVICE_TABLE(of, of_platform_serial_table);
342
343 static struct platform_driver of_platform_serial_driver = {
344 .driver = {
345 .name = "of_serial",
346 .of_match_table = of_platform_serial_table,
347 .pm = &of_serial_pm_ops,
348 },
349 .probe = of_platform_serial_probe,
350 .remove = of_platform_serial_remove,
351 };
352
353 module_platform_driver(of_platform_serial_driver);
354
355 MODULE_AUTHOR("Arnd Bergmann <arnd@arndb.de>");
356 MODULE_LICENSE("GPL");
357 MODULE_DESCRIPTION("Serial Port driver for Open Firmware platform devices");
358
