1 // SPDX-License-Identifier: GPL-2.0-only
2 #include <linux/types.h>
3 #include <linux/init.h>
4 #include <linux/interrupt.h>
5 #include <linux/mm.h>
6 #include <linux/slab.h>
7 #include <linux/spinlock.h>
8 #include <linux/zorro.h>
9 #include <linux/module.h>
10
11 #include <asm/page.h>
12 #include <asm/amigaints.h>
13 #include <asm/amigahw.h>
14
15 #include <scsi/scsi.h>
16 #include <scsi/scsi_cmnd.h>
17 #include <scsi/scsi_device.h>
18 #include <scsi/scsi_eh.h>
19 #include <scsi/scsi_tcq.h>
20 #include "wd33c93.h"
21 #include "gvp11.h"
22
23
24 #define CHECK_WD33C93
25
26 struct gvp11_hostdata {
27 struct WD33C93_hostdata wh;
28 struct gvp11_scsiregs *regs;
29 struct device *dev;
30 };
31
32 #define DMA_DIR(d) ((d == DATA_OUT_DIR) ? DMA_TO_DEVICE : DMA_FROM_DEVICE)
33 #define TO_DMA_MASK(m) (~((unsigned long long)m & 0xffffffff))
34
gvp11_intr(int irq,void * data)35 static irqreturn_t gvp11_intr(int irq, void *data)
36 {
37 struct Scsi_Host *instance = data;
38 struct gvp11_hostdata *hdata = shost_priv(instance);
39 unsigned int status = hdata->regs->CNTR;
40 unsigned long flags;
41
42 if (!(status & GVP11_DMAC_INT_PENDING))
43 return IRQ_NONE;
44
45 spin_lock_irqsave(instance->host_lock, flags);
46 wd33c93_intr(instance);
47 spin_unlock_irqrestore(instance->host_lock, flags);
48 return IRQ_HANDLED;
49 }
50
51 static int gvp11_xfer_mask = 0;
52
gvp11_setup(char * str,int * ints)53 void gvp11_setup(char *str, int *ints)
54 {
55 gvp11_xfer_mask = ints[1];
56 }
57
dma_setup(struct scsi_cmnd * cmd,int dir_in)58 static int dma_setup(struct scsi_cmnd *cmd, int dir_in)
59 {
60 struct scsi_pointer *scsi_pointer = WD33C93_scsi_pointer(cmd);
61 unsigned long len = scsi_pointer->this_residual;
62 struct Scsi_Host *instance = cmd->device->host;
63 struct gvp11_hostdata *hdata = shost_priv(instance);
64 struct WD33C93_hostdata *wh = &hdata->wh;
65 struct gvp11_scsiregs *regs = hdata->regs;
66 unsigned short cntr = GVP11_DMAC_INT_ENABLE;
67 dma_addr_t addr;
68 int bank_mask;
69 static int scsi_alloc_out_of_range = 0;
70
71 addr = dma_map_single(hdata->dev, scsi_pointer->ptr,
72 len, DMA_DIR(dir_in));
73 if (dma_mapping_error(hdata->dev, addr)) {
74 dev_warn(hdata->dev, "cannot map SCSI data block %p\n",
75 scsi_pointer->ptr);
76 return 1;
77 }
78 scsi_pointer->dma_handle = addr;
79
80 /* use bounce buffer if the physical address is bad */
81 if (addr & wh->dma_xfer_mask) {
82 /* drop useless mapping */
83 dma_unmap_single(hdata->dev, scsi_pointer->dma_handle,
84 scsi_pointer->this_residual,
85 DMA_DIR(dir_in));
86 scsi_pointer->dma_handle = (dma_addr_t) NULL;
87
88 wh->dma_bounce_len = (scsi_pointer->this_residual + 511) & ~0x1ff;
89
90 if (!scsi_alloc_out_of_range) {
91 wh->dma_bounce_buffer =
92 kmalloc(wh->dma_bounce_len, GFP_KERNEL);
93 wh->dma_buffer_pool = BUF_SCSI_ALLOCED;
94 }
95
96 if (scsi_alloc_out_of_range ||
97 !wh->dma_bounce_buffer) {
98 wh->dma_bounce_buffer =
99 amiga_chip_alloc(wh->dma_bounce_len,
100 "GVP II SCSI Bounce Buffer");
101
102 if (!wh->dma_bounce_buffer) {
103 wh->dma_bounce_len = 0;
104 return 1;
105 }
106
107 wh->dma_buffer_pool = BUF_CHIP_ALLOCED;
108 }
109
110 if (!dir_in) {
111 /* copy to bounce buffer for a write */
112 memcpy(wh->dma_bounce_buffer, scsi_pointer->ptr,
113 scsi_pointer->this_residual);
114 }
115
116 if (wh->dma_buffer_pool == BUF_SCSI_ALLOCED) {
117 /* will flush/invalidate cache for us */
118 addr = dma_map_single(hdata->dev,
119 wh->dma_bounce_buffer,
120 wh->dma_bounce_len,
121 DMA_DIR(dir_in));
122 /* can't map buffer; use PIO */
123 if (dma_mapping_error(hdata->dev, addr)) {
124 dev_warn(hdata->dev,
125 "cannot map bounce buffer %p\n",
126 wh->dma_bounce_buffer);
127 return 1;
128 }
129 }
130
131 if (addr & wh->dma_xfer_mask) {
132 /* drop useless mapping */
133 dma_unmap_single(hdata->dev, scsi_pointer->dma_handle,
134 scsi_pointer->this_residual,
135 DMA_DIR(dir_in));
136 /* fall back to Chip RAM if address out of range */
137 if (wh->dma_buffer_pool == BUF_SCSI_ALLOCED) {
138 kfree(wh->dma_bounce_buffer);
139 scsi_alloc_out_of_range = 1;
140 } else {
141 amiga_chip_free(wh->dma_bounce_buffer);
142 }
143
144 wh->dma_bounce_buffer =
145 amiga_chip_alloc(wh->dma_bounce_len,
146 "GVP II SCSI Bounce Buffer");
147
148 if (!wh->dma_bounce_buffer) {
149 wh->dma_bounce_len = 0;
150 return 1;
151 }
152
153 if (!dir_in) {
154 /* copy to bounce buffer for a write */
155 memcpy(wh->dma_bounce_buffer, scsi_pointer->ptr,
156 scsi_pointer->this_residual);
157 }
158 /* chip RAM can be mapped to phys. address directly */
159 addr = virt_to_phys(wh->dma_bounce_buffer);
160 /* no need to flush/invalidate cache */
161 wh->dma_buffer_pool = BUF_CHIP_ALLOCED;
162 }
163 /* finally, have OK mapping (punted for PIO else) */
164 scsi_pointer->dma_handle = addr;
165
166 }
167
168 /* setup dma direction */
169 if (!dir_in)
170 cntr |= GVP11_DMAC_DIR_WRITE;
171
172 wh->dma_dir = dir_in;
173 regs->CNTR = cntr;
174
175 /* setup DMA *physical* address */
176 regs->ACR = addr;
177
178 /* no more cache flush here - dma_map_single() takes care */
179
180 bank_mask = (~wh->dma_xfer_mask >> 18) & 0x01c0;
181 if (bank_mask)
182 regs->BANK = bank_mask & (addr >> 18);
183
184 /* start DMA */
185 regs->ST_DMA = 1;
186
187 /* return success */
188 return 0;
189 }
190
dma_stop(struct Scsi_Host * instance,struct scsi_cmnd * SCpnt,int status)191 static void dma_stop(struct Scsi_Host *instance, struct scsi_cmnd *SCpnt,
192 int status)
193 {
194 struct scsi_pointer *scsi_pointer = WD33C93_scsi_pointer(SCpnt);
195 struct gvp11_hostdata *hdata = shost_priv(instance);
196 struct WD33C93_hostdata *wh = &hdata->wh;
197 struct gvp11_scsiregs *regs = hdata->regs;
198
199 /* stop DMA */
200 regs->SP_DMA = 1;
201 /* remove write bit from CONTROL bits */
202 regs->CNTR = GVP11_DMAC_INT_ENABLE;
203
204 if (wh->dma_buffer_pool == BUF_SCSI_ALLOCED)
205 dma_unmap_single(hdata->dev, scsi_pointer->dma_handle,
206 scsi_pointer->this_residual,
207 DMA_DIR(wh->dma_dir));
208
209 /* copy from a bounce buffer, if necessary */
210 if (status && wh->dma_bounce_buffer) {
211 if (wh->dma_dir && SCpnt)
212 memcpy(scsi_pointer->ptr, wh->dma_bounce_buffer,
213 scsi_pointer->this_residual);
214
215 if (wh->dma_buffer_pool == BUF_SCSI_ALLOCED)
216 kfree(wh->dma_bounce_buffer);
217 else
218 amiga_chip_free(wh->dma_bounce_buffer);
219
220 wh->dma_bounce_buffer = NULL;
221 wh->dma_bounce_len = 0;
222 }
223 }
224
225 static struct scsi_host_template gvp11_scsi_template = {
226 .module = THIS_MODULE,
227 .name = "GVP Series II SCSI",
228 .show_info = wd33c93_show_info,
229 .write_info = wd33c93_write_info,
230 .proc_name = "GVP11",
231 .queuecommand = wd33c93_queuecommand,
232 .eh_abort_handler = wd33c93_abort,
233 .eh_host_reset_handler = wd33c93_host_reset,
234 .can_queue = CAN_QUEUE,
235 .this_id = 7,
236 .sg_tablesize = SG_ALL,
237 .cmd_per_lun = CMD_PER_LUN,
238 .dma_boundary = PAGE_SIZE - 1,
239 .cmd_size = sizeof(struct scsi_pointer),
240 };
241
check_wd33c93(struct gvp11_scsiregs * regs)242 static int check_wd33c93(struct gvp11_scsiregs *regs)
243 {
244 #ifdef CHECK_WD33C93
245 volatile unsigned char *sasr_3393, *scmd_3393;
246 unsigned char save_sasr;
247 unsigned char q, qq;
248
249 /*
250 * These darn GVP boards are a problem - it can be tough to tell
251 * whether or not they include a SCSI controller. This is the
252 * ultimate Yet-Another-GVP-Detection-Hack in that it actually
253 * probes for a WD33c93 chip: If we find one, it's extremely
254 * likely that this card supports SCSI, regardless of Product_
255 * Code, Board_Size, etc.
256 */
257
258 /* Get pointers to the presumed register locations and save contents */
259
260 sasr_3393 = ®s->SASR;
261 scmd_3393 = ®s->SCMD;
262 save_sasr = *sasr_3393;
263
264 /* First test the AuxStatus Reg */
265
266 q = *sasr_3393; /* read it */
267 if (q & 0x08) /* bit 3 should always be clear */
268 return -ENODEV;
269 *sasr_3393 = WD_AUXILIARY_STATUS; /* setup indirect address */
270 if (*sasr_3393 == WD_AUXILIARY_STATUS) { /* shouldn't retain the write */
271 *sasr_3393 = save_sasr; /* Oops - restore this byte */
272 return -ENODEV;
273 }
274 if (*sasr_3393 != q) { /* should still read the same */
275 *sasr_3393 = save_sasr; /* Oops - restore this byte */
276 return -ENODEV;
277 }
278 if (*scmd_3393 != q) /* and so should the image at 0x1f */
279 return -ENODEV;
280
281 /*
282 * Ok, we probably have a wd33c93, but let's check a few other places
283 * for good measure. Make sure that this works for both 'A and 'B
284 * chip versions.
285 */
286
287 *sasr_3393 = WD_SCSI_STATUS;
288 q = *scmd_3393;
289 *sasr_3393 = WD_SCSI_STATUS;
290 *scmd_3393 = ~q;
291 *sasr_3393 = WD_SCSI_STATUS;
292 qq = *scmd_3393;
293 *sasr_3393 = WD_SCSI_STATUS;
294 *scmd_3393 = q;
295 if (qq != q) /* should be read only */
296 return -ENODEV;
297 *sasr_3393 = 0x1e; /* this register is unimplemented */
298 q = *scmd_3393;
299 *sasr_3393 = 0x1e;
300 *scmd_3393 = ~q;
301 *sasr_3393 = 0x1e;
302 qq = *scmd_3393;
303 *sasr_3393 = 0x1e;
304 *scmd_3393 = q;
305 if (qq != q || qq != 0xff) /* should be read only, all 1's */
306 return -ENODEV;
307 *sasr_3393 = WD_TIMEOUT_PERIOD;
308 q = *scmd_3393;
309 *sasr_3393 = WD_TIMEOUT_PERIOD;
310 *scmd_3393 = ~q;
311 *sasr_3393 = WD_TIMEOUT_PERIOD;
312 qq = *scmd_3393;
313 *sasr_3393 = WD_TIMEOUT_PERIOD;
314 *scmd_3393 = q;
315 if (qq != (~q & 0xff)) /* should be read/write */
316 return -ENODEV;
317 #endif /* CHECK_WD33C93 */
318
319 return 0;
320 }
321
gvp11_probe(struct zorro_dev * z,const struct zorro_device_id * ent)322 static int gvp11_probe(struct zorro_dev *z, const struct zorro_device_id *ent)
323 {
324 struct Scsi_Host *instance;
325 unsigned long address;
326 int error;
327 unsigned int epc;
328 unsigned int default_dma_xfer_mask;
329 struct gvp11_hostdata *hdata;
330 struct gvp11_scsiregs *regs;
331 wd33c93_regs wdregs;
332
333 default_dma_xfer_mask = ent->driver_data;
334
335 if (dma_set_mask_and_coherent(&z->dev,
336 TO_DMA_MASK(default_dma_xfer_mask))) {
337 dev_warn(&z->dev, "cannot use DMA mask %llx\n",
338 TO_DMA_MASK(default_dma_xfer_mask));
339 return -ENODEV;
340 }
341
342 /*
343 * Rumors state that some GVP ram boards use the same product
344 * code as the SCSI controllers. Therefore if the board-size
345 * is not 64KB we assume it is a ram board and bail out.
346 */
347 if (zorro_resource_len(z) != 0x10000)
348 return -ENODEV;
349
350 address = z->resource.start;
351 if (!request_mem_region(address, 256, "wd33c93"))
352 return -EBUSY;
353
354 regs = ZTWO_VADDR(address);
355
356 error = check_wd33c93(regs);
357 if (error)
358 goto fail_check_or_alloc;
359
360 instance = scsi_host_alloc(&gvp11_scsi_template,
361 sizeof(struct gvp11_hostdata));
362 if (!instance) {
363 error = -ENOMEM;
364 goto fail_check_or_alloc;
365 }
366
367 instance->irq = IRQ_AMIGA_PORTS;
368 instance->unique_id = z->slotaddr;
369
370 regs->secret2 = 1;
371 regs->secret1 = 0;
372 regs->secret3 = 15;
373 while (regs->CNTR & GVP11_DMAC_BUSY)
374 ;
375 regs->CNTR = 0;
376 regs->BANK = 0;
377
378 wdregs.SASR = ®s->SASR;
379 wdregs.SCMD = ®s->SCMD;
380
381 hdata = shost_priv(instance);
382 if (gvp11_xfer_mask) {
383 hdata->wh.dma_xfer_mask = gvp11_xfer_mask;
384 if (dma_set_mask_and_coherent(&z->dev,
385 TO_DMA_MASK(gvp11_xfer_mask))) {
386 dev_warn(&z->dev, "cannot use DMA mask %llx\n",
387 TO_DMA_MASK(gvp11_xfer_mask));
388 error = -ENODEV;
389 goto fail_check_or_alloc;
390 }
391 } else
392 hdata->wh.dma_xfer_mask = default_dma_xfer_mask;
393
394 hdata->wh.no_sync = 0xff;
395 hdata->wh.fast = 0;
396 hdata->wh.dma_mode = CTRL_DMA;
397 hdata->regs = regs;
398
399 /*
400 * Check for 14MHz SCSI clock
401 */
402 epc = *(unsigned short *)(ZTWO_VADDR(address) + 0x8000);
403 wd33c93_init(instance, wdregs, dma_setup, dma_stop,
404 (epc & GVP_SCSICLKMASK) ? WD33C93_FS_8_10
405 : WD33C93_FS_12_15);
406
407 error = request_irq(IRQ_AMIGA_PORTS, gvp11_intr, IRQF_SHARED,
408 "GVP11 SCSI", instance);
409 if (error)
410 goto fail_irq;
411
412 regs->CNTR = GVP11_DMAC_INT_ENABLE;
413
414 error = scsi_add_host(instance, NULL);
415 if (error)
416 goto fail_host;
417
418 zorro_set_drvdata(z, instance);
419 scsi_scan_host(instance);
420 return 0;
421
422 fail_host:
423 free_irq(IRQ_AMIGA_PORTS, instance);
424 fail_irq:
425 scsi_host_put(instance);
426 fail_check_or_alloc:
427 release_mem_region(address, 256);
428 return error;
429 }
430
gvp11_remove(struct zorro_dev * z)431 static void gvp11_remove(struct zorro_dev *z)
432 {
433 struct Scsi_Host *instance = zorro_get_drvdata(z);
434 struct gvp11_hostdata *hdata = shost_priv(instance);
435
436 hdata->regs->CNTR = 0;
437 scsi_remove_host(instance);
438 free_irq(IRQ_AMIGA_PORTS, instance);
439 scsi_host_put(instance);
440 release_mem_region(z->resource.start, 256);
441 }
442
443 /*
444 * This should (hopefully) be the correct way to identify
445 * all the different GVP SCSI controllers (except for the
446 * SERIES I though).
447 */
448
449 static struct zorro_device_id gvp11_zorro_tbl[] = {
450 { ZORRO_PROD_GVP_COMBO_030_R3_SCSI, ~0x00ffffff },
451 { ZORRO_PROD_GVP_SERIES_II, ~0x00ffffff },
452 { ZORRO_PROD_GVP_GFORCE_030_SCSI, ~0x01ffffff },
453 { ZORRO_PROD_GVP_A530_SCSI, ~0x01ffffff },
454 { ZORRO_PROD_GVP_COMBO_030_R4_SCSI, ~0x01ffffff },
455 { ZORRO_PROD_GVP_A1291, ~0x07ffffff },
456 { ZORRO_PROD_GVP_GFORCE_040_SCSI_1, ~0x07ffffff },
457 { 0 }
458 };
459 MODULE_DEVICE_TABLE(zorro, gvp11_zorro_tbl);
460
461 static struct zorro_driver gvp11_driver = {
462 .name = "gvp11",
463 .id_table = gvp11_zorro_tbl,
464 .probe = gvp11_probe,
465 .remove = gvp11_remove,
466 };
467
gvp11_init(void)468 static int __init gvp11_init(void)
469 {
470 return zorro_register_driver(&gvp11_driver);
471 }
472 module_init(gvp11_init);
473
gvp11_exit(void)474 static void __exit gvp11_exit(void)
475 {
476 zorro_unregister_driver(&gvp11_driver);
477 }
478 module_exit(gvp11_exit);
479
480 MODULE_DESCRIPTION("GVP Series II SCSI");
481 MODULE_LICENSE("GPL");
482
