1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
3
4 #define pr_fmt(fmt) "%s: " fmt, __func__
5
6 #include <linux/err.h>
7 #include <linux/kernel.h>
8 #include <linux/module.h>
9 #include <linux/of.h>
10 #include <linux/of_device.h>
11 #include <linux/platform_device.h>
12 #include <linux/slab.h>
13 #include <linux/string.h>
14 #include <linux/regulator/driver.h>
15 #include <linux/regulator/machine.h>
16 #include <linux/regulator/of_regulator.h>
17
18 #include <soc/qcom/cmd-db.h>
19 #include <soc/qcom/rpmh.h>
20
21 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
22
23 /**
24 * enum rpmh_regulator_type - supported RPMh accelerator types
25 * @VRM: RPMh VRM accelerator which supports voting on enable, voltage,
26 * and mode of LDO, SMPS, and BOB type PMIC regulators.
27 * @XOB: RPMh XOB accelerator which supports voting on the enable state
28 * of PMIC regulators.
29 */
30 enum rpmh_regulator_type {
31 VRM,
32 XOB,
33 };
34
35 #define RPMH_REGULATOR_REG_VRM_VOLTAGE 0x0
36 #define RPMH_REGULATOR_REG_ENABLE 0x4
37 #define RPMH_REGULATOR_REG_VRM_MODE 0x8
38
39 #define PMIC4_LDO_MODE_RETENTION 4
40 #define PMIC4_LDO_MODE_LPM 5
41 #define PMIC4_LDO_MODE_HPM 7
42
43 #define PMIC4_SMPS_MODE_RETENTION 4
44 #define PMIC4_SMPS_MODE_PFM 5
45 #define PMIC4_SMPS_MODE_AUTO 6
46 #define PMIC4_SMPS_MODE_PWM 7
47
48 #define PMIC4_BOB_MODE_PASS 0
49 #define PMIC4_BOB_MODE_PFM 1
50 #define PMIC4_BOB_MODE_AUTO 2
51 #define PMIC4_BOB_MODE_PWM 3
52
53 #define PMIC5_LDO_MODE_RETENTION 3
54 #define PMIC5_LDO_MODE_LPM 4
55 #define PMIC5_LDO_MODE_HPM 7
56
57 #define PMIC5_SMPS_MODE_RETENTION 3
58 #define PMIC5_SMPS_MODE_PFM 4
59 #define PMIC5_SMPS_MODE_AUTO 6
60 #define PMIC5_SMPS_MODE_PWM 7
61
62 #define PMIC5_BOB_MODE_PASS 2
63 #define PMIC5_BOB_MODE_PFM 4
64 #define PMIC5_BOB_MODE_AUTO 6
65 #define PMIC5_BOB_MODE_PWM 7
66
67 /**
68 * struct rpmh_vreg_hw_data - RPMh regulator hardware configurations
69 * @regulator_type: RPMh accelerator type used to manage this
70 * regulator
71 * @ops: Pointer to regulator ops callback structure
72 * @voltage_range: The single range of voltages supported by this
73 * PMIC regulator type
74 * @n_voltages: The number of unique voltage set points defined
75 * by voltage_range
76 * @hpm_min_load_uA: Minimum load current in microamps that requires
77 * high power mode (HPM) operation. This is used
78 * for LDO hardware type regulators only.
79 * @pmic_mode_map: Array indexed by regulator framework mode
80 * containing PMIC hardware modes. Must be large
81 * enough to index all framework modes supported
82 * by this regulator hardware type.
83 * @of_map_mode: Maps an RPMH_REGULATOR_MODE_* mode value defined
84 * in device tree to a regulator framework mode
85 */
86 struct rpmh_vreg_hw_data {
87 enum rpmh_regulator_type regulator_type;
88 const struct regulator_ops *ops;
89 const struct linear_range voltage_range;
90 int n_voltages;
91 int hpm_min_load_uA;
92 const int *pmic_mode_map;
93 unsigned int (*of_map_mode)(unsigned int mode);
94 };
95
96 /**
97 * struct rpmh_vreg - individual RPMh regulator data structure encapsulating a
98 * single regulator device
99 * @dev: Device pointer for the top-level PMIC RPMh
100 * regulator parent device. This is used as a
101 * handle in RPMh write requests.
102 * @addr: Base address of the regulator resource within
103 * an RPMh accelerator
104 * @rdesc: Regulator descriptor
105 * @hw_data: PMIC regulator configuration data for this RPMh
106 * regulator
107 * @always_wait_for_ack: Boolean flag indicating if a request must always
108 * wait for an ACK from RPMh before continuing even
109 * if it corresponds to a strictly lower power
110 * state (e.g. enabled --> disabled).
111 * @enabled: Flag indicating if the regulator is enabled or
112 * not
113 * @bypassed: Boolean indicating if the regulator is in
114 * bypass (pass-through) mode or not. This is
115 * only used by BOB rpmh-regulator resources.
116 * @voltage_selector: Selector used for get_voltage_sel() and
117 * set_voltage_sel() callbacks
118 * @mode: RPMh VRM regulator current framework mode
119 */
120 struct rpmh_vreg {
121 struct device *dev;
122 u32 addr;
123 struct regulator_desc rdesc;
124 const struct rpmh_vreg_hw_data *hw_data;
125 bool always_wait_for_ack;
126
127 int enabled;
128 bool bypassed;
129 int voltage_selector;
130 unsigned int mode;
131 };
132
133 /**
134 * struct rpmh_vreg_init_data - initialization data for an RPMh regulator
135 * @name: Name for the regulator which also corresponds
136 * to the device tree subnode name of the regulator
137 * @resource_name: RPMh regulator resource name format string.
138 * This must include exactly one field: '%s' which
139 * is filled at run-time with the PMIC ID provided
140 * by device tree property qcom,pmic-id. Example:
141 * "ldo%s1" for RPMh resource "ldoa1".
142 * @supply_name: Parent supply regulator name
143 * @hw_data: Configuration data for this PMIC regulator type
144 */
145 struct rpmh_vreg_init_data {
146 const char *name;
147 const char *resource_name;
148 const char *supply_name;
149 const struct rpmh_vreg_hw_data *hw_data;
150 };
151
152 /**
153 * rpmh_regulator_send_request() - send the request to RPMh
154 * @vreg: Pointer to the RPMh regulator
155 * @cmd: Pointer to the RPMh command to send
156 * @wait_for_ack: Boolean indicating if execution must wait until the
157 * request has been acknowledged as complete
158 *
159 * Return: 0 on success, errno on failure
160 */
rpmh_regulator_send_request(struct rpmh_vreg * vreg,struct tcs_cmd * cmd,bool wait_for_ack)161 static int rpmh_regulator_send_request(struct rpmh_vreg *vreg,
162 struct tcs_cmd *cmd, bool wait_for_ack)
163 {
164 int ret;
165
166 if (wait_for_ack || vreg->always_wait_for_ack)
167 ret = rpmh_write(vreg->dev, RPMH_ACTIVE_ONLY_STATE, cmd, 1);
168 else
169 ret = rpmh_write_async(vreg->dev, RPMH_ACTIVE_ONLY_STATE, cmd,
170 1);
171
172 return ret;
173 }
174
_rpmh_regulator_vrm_set_voltage_sel(struct regulator_dev * rdev,unsigned int selector,bool wait_for_ack)175 static int _rpmh_regulator_vrm_set_voltage_sel(struct regulator_dev *rdev,
176 unsigned int selector, bool wait_for_ack)
177 {
178 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
179 struct tcs_cmd cmd = {
180 .addr = vreg->addr + RPMH_REGULATOR_REG_VRM_VOLTAGE,
181 };
182 int ret;
183
184 /* VRM voltage control register is set with voltage in millivolts. */
185 cmd.data = DIV_ROUND_UP(regulator_list_voltage_linear_range(rdev,
186 selector), 1000);
187
188 ret = rpmh_regulator_send_request(vreg, &cmd, wait_for_ack);
189 if (!ret)
190 vreg->voltage_selector = selector;
191
192 return ret;
193 }
194
rpmh_regulator_vrm_set_voltage_sel(struct regulator_dev * rdev,unsigned int selector)195 static int rpmh_regulator_vrm_set_voltage_sel(struct regulator_dev *rdev,
196 unsigned int selector)
197 {
198 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
199
200 if (vreg->enabled == -EINVAL) {
201 /*
202 * Cache the voltage and send it later when the regulator is
203 * enabled or disabled.
204 */
205 vreg->voltage_selector = selector;
206 return 0;
207 }
208
209 return _rpmh_regulator_vrm_set_voltage_sel(rdev, selector,
210 selector > vreg->voltage_selector);
211 }
212
rpmh_regulator_vrm_get_voltage_sel(struct regulator_dev * rdev)213 static int rpmh_regulator_vrm_get_voltage_sel(struct regulator_dev *rdev)
214 {
215 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
216
217 return vreg->voltage_selector;
218 }
219
rpmh_regulator_is_enabled(struct regulator_dev * rdev)220 static int rpmh_regulator_is_enabled(struct regulator_dev *rdev)
221 {
222 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
223
224 return vreg->enabled;
225 }
226
rpmh_regulator_set_enable_state(struct regulator_dev * rdev,bool enable)227 static int rpmh_regulator_set_enable_state(struct regulator_dev *rdev,
228 bool enable)
229 {
230 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
231 struct tcs_cmd cmd = {
232 .addr = vreg->addr + RPMH_REGULATOR_REG_ENABLE,
233 .data = enable,
234 };
235 int ret;
236
237 if (vreg->enabled == -EINVAL &&
238 vreg->voltage_selector != -ENOTRECOVERABLE) {
239 ret = _rpmh_regulator_vrm_set_voltage_sel(rdev,
240 vreg->voltage_selector, true);
241 if (ret < 0)
242 return ret;
243 }
244
245 ret = rpmh_regulator_send_request(vreg, &cmd, enable);
246 if (!ret)
247 vreg->enabled = enable;
248
249 return ret;
250 }
251
rpmh_regulator_enable(struct regulator_dev * rdev)252 static int rpmh_regulator_enable(struct regulator_dev *rdev)
253 {
254 return rpmh_regulator_set_enable_state(rdev, true);
255 }
256
rpmh_regulator_disable(struct regulator_dev * rdev)257 static int rpmh_regulator_disable(struct regulator_dev *rdev)
258 {
259 return rpmh_regulator_set_enable_state(rdev, false);
260 }
261
rpmh_regulator_vrm_set_mode_bypass(struct rpmh_vreg * vreg,unsigned int mode,bool bypassed)262 static int rpmh_regulator_vrm_set_mode_bypass(struct rpmh_vreg *vreg,
263 unsigned int mode, bool bypassed)
264 {
265 struct tcs_cmd cmd = {
266 .addr = vreg->addr + RPMH_REGULATOR_REG_VRM_MODE,
267 };
268 int pmic_mode;
269
270 if (mode > REGULATOR_MODE_STANDBY)
271 return -EINVAL;
272
273 pmic_mode = vreg->hw_data->pmic_mode_map[mode];
274 if (pmic_mode < 0)
275 return pmic_mode;
276
277 if (bypassed)
278 cmd.data = PMIC4_BOB_MODE_PASS;
279 else
280 cmd.data = pmic_mode;
281
282 return rpmh_regulator_send_request(vreg, &cmd, true);
283 }
284
rpmh_regulator_vrm_set_mode(struct regulator_dev * rdev,unsigned int mode)285 static int rpmh_regulator_vrm_set_mode(struct regulator_dev *rdev,
286 unsigned int mode)
287 {
288 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
289 int ret;
290
291 if (mode == vreg->mode)
292 return 0;
293
294 ret = rpmh_regulator_vrm_set_mode_bypass(vreg, mode, vreg->bypassed);
295 if (!ret)
296 vreg->mode = mode;
297
298 return ret;
299 }
300
rpmh_regulator_vrm_get_mode(struct regulator_dev * rdev)301 static unsigned int rpmh_regulator_vrm_get_mode(struct regulator_dev *rdev)
302 {
303 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
304
305 return vreg->mode;
306 }
307
308 /**
309 * rpmh_regulator_vrm_get_optimum_mode() - get the mode based on the load
310 * @rdev: Regulator device pointer for the rpmh-regulator
311 * @input_uV: Input voltage
312 * @output_uV: Output voltage
313 * @load_uA: Aggregated load current in microamps
314 *
315 * This function is used in the regulator_ops for VRM type RPMh regulator
316 * devices.
317 *
318 * Return: 0 on success, errno on failure
319 */
rpmh_regulator_vrm_get_optimum_mode(struct regulator_dev * rdev,int input_uV,int output_uV,int load_uA)320 static unsigned int rpmh_regulator_vrm_get_optimum_mode(
321 struct regulator_dev *rdev, int input_uV, int output_uV, int load_uA)
322 {
323 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
324
325 if (load_uA >= vreg->hw_data->hpm_min_load_uA)
326 return REGULATOR_MODE_NORMAL;
327 else
328 return REGULATOR_MODE_IDLE;
329 }
330
rpmh_regulator_vrm_set_bypass(struct regulator_dev * rdev,bool enable)331 static int rpmh_regulator_vrm_set_bypass(struct regulator_dev *rdev,
332 bool enable)
333 {
334 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
335 int ret;
336
337 if (vreg->bypassed == enable)
338 return 0;
339
340 ret = rpmh_regulator_vrm_set_mode_bypass(vreg, vreg->mode, enable);
341 if (!ret)
342 vreg->bypassed = enable;
343
344 return ret;
345 }
346
rpmh_regulator_vrm_get_bypass(struct regulator_dev * rdev,bool * enable)347 static int rpmh_regulator_vrm_get_bypass(struct regulator_dev *rdev,
348 bool *enable)
349 {
350 struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
351
352 *enable = vreg->bypassed;
353
354 return 0;
355 }
356
357 static const struct regulator_ops rpmh_regulator_vrm_ops = {
358 .enable = rpmh_regulator_enable,
359 .disable = rpmh_regulator_disable,
360 .is_enabled = rpmh_regulator_is_enabled,
361 .set_voltage_sel = rpmh_regulator_vrm_set_voltage_sel,
362 .get_voltage_sel = rpmh_regulator_vrm_get_voltage_sel,
363 .list_voltage = regulator_list_voltage_linear_range,
364 .set_mode = rpmh_regulator_vrm_set_mode,
365 .get_mode = rpmh_regulator_vrm_get_mode,
366 };
367
368 static const struct regulator_ops rpmh_regulator_vrm_drms_ops = {
369 .enable = rpmh_regulator_enable,
370 .disable = rpmh_regulator_disable,
371 .is_enabled = rpmh_regulator_is_enabled,
372 .set_voltage_sel = rpmh_regulator_vrm_set_voltage_sel,
373 .get_voltage_sel = rpmh_regulator_vrm_get_voltage_sel,
374 .list_voltage = regulator_list_voltage_linear_range,
375 .set_mode = rpmh_regulator_vrm_set_mode,
376 .get_mode = rpmh_regulator_vrm_get_mode,
377 .get_optimum_mode = rpmh_regulator_vrm_get_optimum_mode,
378 };
379
380 static const struct regulator_ops rpmh_regulator_vrm_bypass_ops = {
381 .enable = rpmh_regulator_enable,
382 .disable = rpmh_regulator_disable,
383 .is_enabled = rpmh_regulator_is_enabled,
384 .set_voltage_sel = rpmh_regulator_vrm_set_voltage_sel,
385 .get_voltage_sel = rpmh_regulator_vrm_get_voltage_sel,
386 .list_voltage = regulator_list_voltage_linear_range,
387 .set_mode = rpmh_regulator_vrm_set_mode,
388 .get_mode = rpmh_regulator_vrm_get_mode,
389 .set_bypass = rpmh_regulator_vrm_set_bypass,
390 .get_bypass = rpmh_regulator_vrm_get_bypass,
391 };
392
393 static const struct regulator_ops rpmh_regulator_xob_ops = {
394 .enable = rpmh_regulator_enable,
395 .disable = rpmh_regulator_disable,
396 .is_enabled = rpmh_regulator_is_enabled,
397 };
398
399 /**
400 * rpmh_regulator_init_vreg() - initialize all attributes of an rpmh-regulator
401 * @vreg: Pointer to the individual rpmh-regulator resource
402 * @dev: Pointer to the top level rpmh-regulator PMIC device
403 * @node: Pointer to the individual rpmh-regulator resource
404 * device node
405 * @pmic_id: String used to identify the top level rpmh-regulator
406 * PMIC device on the board
407 * @pmic_rpmh_data: Pointer to a null-terminated array of rpmh-regulator
408 * resources defined for the top level PMIC device
409 *
410 * Return: 0 on success, errno on failure
411 */
rpmh_regulator_init_vreg(struct rpmh_vreg * vreg,struct device * dev,struct device_node * node,const char * pmic_id,const struct rpmh_vreg_init_data * pmic_rpmh_data)412 static int rpmh_regulator_init_vreg(struct rpmh_vreg *vreg, struct device *dev,
413 struct device_node *node, const char *pmic_id,
414 const struct rpmh_vreg_init_data *pmic_rpmh_data)
415 {
416 struct regulator_config reg_config = {};
417 char rpmh_resource_name[20] = "";
418 const struct rpmh_vreg_init_data *rpmh_data;
419 struct regulator_init_data *init_data;
420 struct regulator_dev *rdev;
421 int ret;
422
423 vreg->dev = dev;
424
425 for (rpmh_data = pmic_rpmh_data; rpmh_data->name; rpmh_data++)
426 if (of_node_name_eq(node, rpmh_data->name))
427 break;
428
429 if (!rpmh_data->name) {
430 dev_err(dev, "Unknown regulator %pOFn\n", node);
431 return -EINVAL;
432 }
433
434 scnprintf(rpmh_resource_name, sizeof(rpmh_resource_name),
435 rpmh_data->resource_name, pmic_id);
436
437 vreg->addr = cmd_db_read_addr(rpmh_resource_name);
438 if (!vreg->addr) {
439 dev_err(dev, "%pOFn: could not find RPMh address for resource %s\n",
440 node, rpmh_resource_name);
441 return -ENODEV;
442 }
443
444 vreg->rdesc.name = rpmh_data->name;
445 vreg->rdesc.supply_name = rpmh_data->supply_name;
446 vreg->hw_data = rpmh_data->hw_data;
447
448 vreg->enabled = -EINVAL;
449 vreg->voltage_selector = -ENOTRECOVERABLE;
450 vreg->mode = REGULATOR_MODE_INVALID;
451
452 if (rpmh_data->hw_data->n_voltages) {
453 vreg->rdesc.linear_ranges = &rpmh_data->hw_data->voltage_range;
454 vreg->rdesc.n_linear_ranges = 1;
455 vreg->rdesc.n_voltages = rpmh_data->hw_data->n_voltages;
456 }
457
458 vreg->always_wait_for_ack = of_property_read_bool(node,
459 "qcom,always-wait-for-ack");
460
461 vreg->rdesc.owner = THIS_MODULE;
462 vreg->rdesc.type = REGULATOR_VOLTAGE;
463 vreg->rdesc.ops = vreg->hw_data->ops;
464 vreg->rdesc.of_map_mode = vreg->hw_data->of_map_mode;
465
466 init_data = of_get_regulator_init_data(dev, node, &vreg->rdesc);
467 if (!init_data)
468 return -ENOMEM;
469
470 if (rpmh_data->hw_data->regulator_type == XOB &&
471 init_data->constraints.min_uV &&
472 init_data->constraints.min_uV == init_data->constraints.max_uV) {
473 vreg->rdesc.fixed_uV = init_data->constraints.min_uV;
474 vreg->rdesc.n_voltages = 1;
475 }
476
477 reg_config.dev = dev;
478 reg_config.init_data = init_data;
479 reg_config.of_node = node;
480 reg_config.driver_data = vreg;
481
482 rdev = devm_regulator_register(dev, &vreg->rdesc, ®_config);
483 if (IS_ERR(rdev)) {
484 ret = PTR_ERR(rdev);
485 dev_err(dev, "%pOFn: devm_regulator_register() failed, ret=%d\n",
486 node, ret);
487 return ret;
488 }
489
490 dev_dbg(dev, "%pOFn regulator registered for RPMh resource %s @ 0x%05X\n",
491 node, rpmh_resource_name, vreg->addr);
492
493 return 0;
494 }
495
496 static const int pmic_mode_map_pmic4_ldo[REGULATOR_MODE_STANDBY + 1] = {
497 [REGULATOR_MODE_INVALID] = -EINVAL,
498 [REGULATOR_MODE_STANDBY] = PMIC4_LDO_MODE_RETENTION,
499 [REGULATOR_MODE_IDLE] = PMIC4_LDO_MODE_LPM,
500 [REGULATOR_MODE_NORMAL] = PMIC4_LDO_MODE_HPM,
501 [REGULATOR_MODE_FAST] = -EINVAL,
502 };
503
504 static const int pmic_mode_map_pmic5_ldo[REGULATOR_MODE_STANDBY + 1] = {
505 [REGULATOR_MODE_INVALID] = -EINVAL,
506 [REGULATOR_MODE_STANDBY] = PMIC5_LDO_MODE_RETENTION,
507 [REGULATOR_MODE_IDLE] = PMIC5_LDO_MODE_LPM,
508 [REGULATOR_MODE_NORMAL] = PMIC5_LDO_MODE_HPM,
509 [REGULATOR_MODE_FAST] = -EINVAL,
510 };
511
rpmh_regulator_pmic4_ldo_of_map_mode(unsigned int rpmh_mode)512 static unsigned int rpmh_regulator_pmic4_ldo_of_map_mode(unsigned int rpmh_mode)
513 {
514 unsigned int mode;
515
516 switch (rpmh_mode) {
517 case RPMH_REGULATOR_MODE_HPM:
518 mode = REGULATOR_MODE_NORMAL;
519 break;
520 case RPMH_REGULATOR_MODE_LPM:
521 mode = REGULATOR_MODE_IDLE;
522 break;
523 case RPMH_REGULATOR_MODE_RET:
524 mode = REGULATOR_MODE_STANDBY;
525 break;
526 default:
527 mode = REGULATOR_MODE_INVALID;
528 break;
529 }
530
531 return mode;
532 }
533
534 static const int pmic_mode_map_pmic4_smps[REGULATOR_MODE_STANDBY + 1] = {
535 [REGULATOR_MODE_INVALID] = -EINVAL,
536 [REGULATOR_MODE_STANDBY] = PMIC4_SMPS_MODE_RETENTION,
537 [REGULATOR_MODE_IDLE] = PMIC4_SMPS_MODE_PFM,
538 [REGULATOR_MODE_NORMAL] = PMIC4_SMPS_MODE_AUTO,
539 [REGULATOR_MODE_FAST] = PMIC4_SMPS_MODE_PWM,
540 };
541
542 static const int pmic_mode_map_pmic5_smps[REGULATOR_MODE_STANDBY + 1] = {
543 [REGULATOR_MODE_INVALID] = -EINVAL,
544 [REGULATOR_MODE_STANDBY] = PMIC5_SMPS_MODE_RETENTION,
545 [REGULATOR_MODE_IDLE] = PMIC5_SMPS_MODE_PFM,
546 [REGULATOR_MODE_NORMAL] = PMIC5_SMPS_MODE_AUTO,
547 [REGULATOR_MODE_FAST] = PMIC5_SMPS_MODE_PWM,
548 };
549
550 static unsigned int
rpmh_regulator_pmic4_smps_of_map_mode(unsigned int rpmh_mode)551 rpmh_regulator_pmic4_smps_of_map_mode(unsigned int rpmh_mode)
552 {
553 unsigned int mode;
554
555 switch (rpmh_mode) {
556 case RPMH_REGULATOR_MODE_HPM:
557 mode = REGULATOR_MODE_FAST;
558 break;
559 case RPMH_REGULATOR_MODE_AUTO:
560 mode = REGULATOR_MODE_NORMAL;
561 break;
562 case RPMH_REGULATOR_MODE_LPM:
563 mode = REGULATOR_MODE_IDLE;
564 break;
565 case RPMH_REGULATOR_MODE_RET:
566 mode = REGULATOR_MODE_STANDBY;
567 break;
568 default:
569 mode = REGULATOR_MODE_INVALID;
570 break;
571 }
572
573 return mode;
574 }
575
576 static const int pmic_mode_map_pmic4_bob[REGULATOR_MODE_STANDBY + 1] = {
577 [REGULATOR_MODE_INVALID] = -EINVAL,
578 [REGULATOR_MODE_STANDBY] = -EINVAL,
579 [REGULATOR_MODE_IDLE] = PMIC4_BOB_MODE_PFM,
580 [REGULATOR_MODE_NORMAL] = PMIC4_BOB_MODE_AUTO,
581 [REGULATOR_MODE_FAST] = PMIC4_BOB_MODE_PWM,
582 };
583
584 static const int pmic_mode_map_pmic5_bob[REGULATOR_MODE_STANDBY + 1] = {
585 [REGULATOR_MODE_INVALID] = -EINVAL,
586 [REGULATOR_MODE_STANDBY] = -EINVAL,
587 [REGULATOR_MODE_IDLE] = PMIC5_BOB_MODE_PFM,
588 [REGULATOR_MODE_NORMAL] = PMIC5_BOB_MODE_AUTO,
589 [REGULATOR_MODE_FAST] = PMIC5_BOB_MODE_PWM,
590 };
591
rpmh_regulator_pmic4_bob_of_map_mode(unsigned int rpmh_mode)592 static unsigned int rpmh_regulator_pmic4_bob_of_map_mode(unsigned int rpmh_mode)
593 {
594 unsigned int mode;
595
596 switch (rpmh_mode) {
597 case RPMH_REGULATOR_MODE_HPM:
598 mode = REGULATOR_MODE_FAST;
599 break;
600 case RPMH_REGULATOR_MODE_AUTO:
601 mode = REGULATOR_MODE_NORMAL;
602 break;
603 case RPMH_REGULATOR_MODE_LPM:
604 mode = REGULATOR_MODE_IDLE;
605 break;
606 default:
607 mode = REGULATOR_MODE_INVALID;
608 break;
609 }
610
611 return mode;
612 }
613
614 static const struct rpmh_vreg_hw_data pmic4_pldo = {
615 .regulator_type = VRM,
616 .ops = &rpmh_regulator_vrm_drms_ops,
617 .voltage_range = REGULATOR_LINEAR_RANGE(1664000, 0, 255, 8000),
618 .n_voltages = 256,
619 .hpm_min_load_uA = 10000,
620 .pmic_mode_map = pmic_mode_map_pmic4_ldo,
621 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
622 };
623
624 static const struct rpmh_vreg_hw_data pmic4_pldo_lv = {
625 .regulator_type = VRM,
626 .ops = &rpmh_regulator_vrm_drms_ops,
627 .voltage_range = REGULATOR_LINEAR_RANGE(1256000, 0, 127, 8000),
628 .n_voltages = 128,
629 .hpm_min_load_uA = 10000,
630 .pmic_mode_map = pmic_mode_map_pmic4_ldo,
631 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
632 };
633
634 static const struct rpmh_vreg_hw_data pmic4_nldo = {
635 .regulator_type = VRM,
636 .ops = &rpmh_regulator_vrm_drms_ops,
637 .voltage_range = REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
638 .n_voltages = 128,
639 .hpm_min_load_uA = 30000,
640 .pmic_mode_map = pmic_mode_map_pmic4_ldo,
641 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
642 };
643
644 static const struct rpmh_vreg_hw_data pmic4_hfsmps3 = {
645 .regulator_type = VRM,
646 .ops = &rpmh_regulator_vrm_ops,
647 .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
648 .n_voltages = 216,
649 .pmic_mode_map = pmic_mode_map_pmic4_smps,
650 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
651 };
652
653 static const struct rpmh_vreg_hw_data pmic4_ftsmps426 = {
654 .regulator_type = VRM,
655 .ops = &rpmh_regulator_vrm_ops,
656 .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 258, 4000),
657 .n_voltages = 259,
658 .pmic_mode_map = pmic_mode_map_pmic4_smps,
659 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
660 };
661
662 static const struct rpmh_vreg_hw_data pmic4_bob = {
663 .regulator_type = VRM,
664 .ops = &rpmh_regulator_vrm_bypass_ops,
665 .voltage_range = REGULATOR_LINEAR_RANGE(1824000, 0, 83, 32000),
666 .n_voltages = 84,
667 .pmic_mode_map = pmic_mode_map_pmic4_bob,
668 .of_map_mode = rpmh_regulator_pmic4_bob_of_map_mode,
669 };
670
671 static const struct rpmh_vreg_hw_data pmic4_lvs = {
672 .regulator_type = XOB,
673 .ops = &rpmh_regulator_xob_ops,
674 /* LVS hardware does not support voltage or mode configuration. */
675 };
676
677 static const struct rpmh_vreg_hw_data pmic5_pldo = {
678 .regulator_type = VRM,
679 .ops = &rpmh_regulator_vrm_drms_ops,
680 .voltage_range = REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000),
681 .n_voltages = 256,
682 .hpm_min_load_uA = 10000,
683 .pmic_mode_map = pmic_mode_map_pmic5_ldo,
684 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
685 };
686
687 static const struct rpmh_vreg_hw_data pmic5_pldo_lv = {
688 .regulator_type = VRM,
689 .ops = &rpmh_regulator_vrm_drms_ops,
690 .voltage_range = REGULATOR_LINEAR_RANGE(1504000, 0, 62, 8000),
691 .n_voltages = 63,
692 .hpm_min_load_uA = 10000,
693 .pmic_mode_map = pmic_mode_map_pmic5_ldo,
694 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
695 };
696
697 static const struct rpmh_vreg_hw_data pmic5_nldo = {
698 .regulator_type = VRM,
699 .ops = &rpmh_regulator_vrm_drms_ops,
700 .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 123, 8000),
701 .n_voltages = 124,
702 .hpm_min_load_uA = 30000,
703 .pmic_mode_map = pmic_mode_map_pmic5_ldo,
704 .of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
705 };
706
707 static const struct rpmh_vreg_hw_data pmic5_hfsmps510 = {
708 .regulator_type = VRM,
709 .ops = &rpmh_regulator_vrm_ops,
710 .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
711 .n_voltages = 216,
712 .pmic_mode_map = pmic_mode_map_pmic5_smps,
713 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
714 };
715
716 static const struct rpmh_vreg_hw_data pmic5_ftsmps510 = {
717 .regulator_type = VRM,
718 .ops = &rpmh_regulator_vrm_ops,
719 .voltage_range = REGULATOR_LINEAR_RANGE(300000, 0, 263, 4000),
720 .n_voltages = 264,
721 .pmic_mode_map = pmic_mode_map_pmic5_smps,
722 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
723 };
724
725 static const struct rpmh_vreg_hw_data pmic5_ftsmps520 = {
726 .regulator_type = VRM,
727 .ops = &rpmh_regulator_vrm_ops,
728 .voltage_range = REGULATOR_LINEAR_RANGE(300000, 0, 263, 4000),
729 .n_voltages = 264,
730 .pmic_mode_map = pmic_mode_map_pmic5_smps,
731 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
732 };
733
734 static const struct rpmh_vreg_hw_data pmic5_hfsmps515 = {
735 .regulator_type = VRM,
736 .ops = &rpmh_regulator_vrm_ops,
737 .voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 235, 16000),
738 .n_voltages = 236,
739 .pmic_mode_map = pmic_mode_map_pmic5_smps,
740 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
741 };
742
743 static const struct rpmh_vreg_hw_data pmic5_hfsmps515_1 = {
744 .regulator_type = VRM,
745 .ops = &rpmh_regulator_vrm_ops,
746 .voltage_range = REGULATOR_LINEAR_RANGE(900000, 0, 4, 16000),
747 .n_voltages = 5,
748 .pmic_mode_map = pmic_mode_map_pmic5_smps,
749 .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
750 };
751
752 static const struct rpmh_vreg_hw_data pmic5_bob = {
753 .regulator_type = VRM,
754 .ops = &rpmh_regulator_vrm_bypass_ops,
755 .voltage_range = REGULATOR_LINEAR_RANGE(3000000, 0, 31, 32000),
756 .n_voltages = 32,
757 .pmic_mode_map = pmic_mode_map_pmic5_bob,
758 .of_map_mode = rpmh_regulator_pmic4_bob_of_map_mode,
759 };
760
761 #define RPMH_VREG(_name, _resource_name, _hw_data, _supply_name) \
762 { \
763 .name = _name, \
764 .resource_name = _resource_name, \
765 .hw_data = _hw_data, \
766 .supply_name = _supply_name, \
767 }
768
769 static const struct rpmh_vreg_init_data pm8998_vreg_data[] = {
770 RPMH_VREG("smps1", "smp%s1", &pmic4_ftsmps426, "vdd-s1"),
771 RPMH_VREG("smps2", "smp%s2", &pmic4_ftsmps426, "vdd-s2"),
772 RPMH_VREG("smps3", "smp%s3", &pmic4_hfsmps3, "vdd-s3"),
773 RPMH_VREG("smps4", "smp%s4", &pmic4_hfsmps3, "vdd-s4"),
774 RPMH_VREG("smps5", "smp%s5", &pmic4_hfsmps3, "vdd-s5"),
775 RPMH_VREG("smps6", "smp%s6", &pmic4_ftsmps426, "vdd-s6"),
776 RPMH_VREG("smps7", "smp%s7", &pmic4_ftsmps426, "vdd-s7"),
777 RPMH_VREG("smps8", "smp%s8", &pmic4_ftsmps426, "vdd-s8"),
778 RPMH_VREG("smps9", "smp%s9", &pmic4_ftsmps426, "vdd-s9"),
779 RPMH_VREG("smps10", "smp%s10", &pmic4_ftsmps426, "vdd-s10"),
780 RPMH_VREG("smps11", "smp%s11", &pmic4_ftsmps426, "vdd-s11"),
781 RPMH_VREG("smps12", "smp%s12", &pmic4_ftsmps426, "vdd-s12"),
782 RPMH_VREG("smps13", "smp%s13", &pmic4_ftsmps426, "vdd-s13"),
783 RPMH_VREG("ldo1", "ldo%s1", &pmic4_nldo, "vdd-l1-l27"),
784 RPMH_VREG("ldo2", "ldo%s2", &pmic4_nldo, "vdd-l2-l8-l17"),
785 RPMH_VREG("ldo3", "ldo%s3", &pmic4_nldo, "vdd-l3-l11"),
786 RPMH_VREG("ldo4", "ldo%s4", &pmic4_nldo, "vdd-l4-l5"),
787 RPMH_VREG("ldo5", "ldo%s5", &pmic4_nldo, "vdd-l4-l5"),
788 RPMH_VREG("ldo6", "ldo%s6", &pmic4_pldo, "vdd-l6"),
789 RPMH_VREG("ldo7", "ldo%s7", &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"),
790 RPMH_VREG("ldo8", "ldo%s8", &pmic4_nldo, "vdd-l2-l8-l17"),
791 RPMH_VREG("ldo9", "ldo%s9", &pmic4_pldo, "vdd-l9"),
792 RPMH_VREG("ldo10", "ldo%s10", &pmic4_pldo, "vdd-l10-l23-l25"),
793 RPMH_VREG("ldo11", "ldo%s11", &pmic4_nldo, "vdd-l3-l11"),
794 RPMH_VREG("ldo12", "ldo%s12", &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"),
795 RPMH_VREG("ldo13", "ldo%s13", &pmic4_pldo, "vdd-l13-l19-l21"),
796 RPMH_VREG("ldo14", "ldo%s14", &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"),
797 RPMH_VREG("ldo15", "ldo%s15", &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"),
798 RPMH_VREG("ldo16", "ldo%s16", &pmic4_pldo, "vdd-l16-l28"),
799 RPMH_VREG("ldo17", "ldo%s17", &pmic4_nldo, "vdd-l2-l8-l17"),
800 RPMH_VREG("ldo18", "ldo%s18", &pmic4_pldo, "vdd-l18-l22"),
801 RPMH_VREG("ldo19", "ldo%s19", &pmic4_pldo, "vdd-l13-l19-l21"),
802 RPMH_VREG("ldo20", "ldo%s20", &pmic4_pldo, "vdd-l20-l24"),
803 RPMH_VREG("ldo21", "ldo%s21", &pmic4_pldo, "vdd-l13-l19-l21"),
804 RPMH_VREG("ldo22", "ldo%s22", &pmic4_pldo, "vdd-l18-l22"),
805 RPMH_VREG("ldo23", "ldo%s23", &pmic4_pldo, "vdd-l10-l23-l25"),
806 RPMH_VREG("ldo24", "ldo%s24", &pmic4_pldo, "vdd-l20-l24"),
807 RPMH_VREG("ldo25", "ldo%s25", &pmic4_pldo, "vdd-l10-l23-l25"),
808 RPMH_VREG("ldo26", "ldo%s26", &pmic4_nldo, "vdd-l26"),
809 RPMH_VREG("ldo27", "ldo%s27", &pmic4_nldo, "vdd-l1-l27"),
810 RPMH_VREG("ldo28", "ldo%s28", &pmic4_pldo, "vdd-l16-l28"),
811 RPMH_VREG("lvs1", "vs%s1", &pmic4_lvs, "vin-lvs-1-2"),
812 RPMH_VREG("lvs2", "vs%s2", &pmic4_lvs, "vin-lvs-1-2"),
813 {}
814 };
815
816 static const struct rpmh_vreg_init_data pmg1110_vreg_data[] = {
817 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
818 {}
819 };
820
821 static const struct rpmh_vreg_init_data pmi8998_vreg_data[] = {
822 RPMH_VREG("bob", "bob%s1", &pmic4_bob, "vdd-bob"),
823 {}
824 };
825
826 static const struct rpmh_vreg_init_data pm8005_vreg_data[] = {
827 RPMH_VREG("smps1", "smp%s1", &pmic4_ftsmps426, "vdd-s1"),
828 RPMH_VREG("smps2", "smp%s2", &pmic4_ftsmps426, "vdd-s2"),
829 RPMH_VREG("smps3", "smp%s3", &pmic4_ftsmps426, "vdd-s3"),
830 RPMH_VREG("smps4", "smp%s4", &pmic4_ftsmps426, "vdd-s4"),
831 {}
832 };
833
834 static const struct rpmh_vreg_init_data pm8150_vreg_data[] = {
835 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
836 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
837 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
838 RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"),
839 RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"),
840 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
841 RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
842 RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"),
843 RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"),
844 RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps510, "vdd-s10"),
845 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l8-l11"),
846 RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l10"),
847 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
848 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
849 RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
850 RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6-l9"),
851 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-l12-l14-l15"),
852 RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l1-l8-l11"),
853 RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9"),
854 RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l2-l10"),
855 RPMH_VREG("ldo11", "ldo%s11", &pmic5_nldo, "vdd-l1-l8-l11"),
856 RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
857 RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l13-l16-l17"),
858 RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
859 RPMH_VREG("ldo15", "ldo%s15", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
860 RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l13-l16-l17"),
861 RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l13-l16-l17"),
862 RPMH_VREG("ldo18", "ldo%s18", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
863 {}
864 };
865
866 static const struct rpmh_vreg_init_data pm8150l_vreg_data[] = {
867 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
868 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
869 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
870 RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps510, "vdd-s4"),
871 RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps510, "vdd-s5"),
872 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
873 RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
874 RPMH_VREG("smps8", "smp%s8", &pmic5_hfsmps510, "vdd-s8"),
875 RPMH_VREG("ldo1", "ldo%s1", &pmic5_pldo_lv, "vdd-l1-l8"),
876 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2-l3"),
877 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l2-l3"),
878 RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo, "vdd-l4-l5-l6"),
879 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l4-l5-l6"),
880 RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l4-l5-l6"),
881 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-l11"),
882 RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo_lv, "vdd-l1-l8"),
883 RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l9-l10"),
884 RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l9-l10"),
885 RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l7-l11"),
886 RPMH_VREG("bob", "bob%s1", &pmic5_bob, "vdd-bob"),
887 {}
888 };
889
890 static const struct rpmh_vreg_init_data pmm8155au_vreg_data[] = {
891 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
892 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
893 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
894 RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"),
895 RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"),
896 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
897 RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
898 RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"),
899 RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"),
900 RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps510, "vdd-s10"),
901 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l8-l11"),
902 RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l10"),
903 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
904 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
905 RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
906 RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6-l9"),
907 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
908 RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l1-l8-l11"),
909 RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9"),
910 RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l2-l10"),
911 RPMH_VREG("ldo11", "ldo%s11", &pmic5_nldo, "vdd-l1-l8-l11"),
912 RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
913 RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l13-l16-l17"),
914 RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
915 RPMH_VREG("ldo15", "ldo%s15", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"),
916 RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l13-l16-l17"),
917 RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l13-l16-l17"),
918 RPMH_VREG("ldo18", "ldo%s18", &pmic5_nldo, "vdd-l3-l4-l5-l18"),
919 {}
920 };
921
922 static const struct rpmh_vreg_init_data pm8350_vreg_data[] = {
923 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
924 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
925 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
926 RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps510, "vdd-s4"),
927 RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps510, "vdd-s5"),
928 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
929 RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
930 RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"),
931 RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"),
932 RPMH_VREG("smps10", "smp%s10", &pmic5_hfsmps510, "vdd-s10"),
933 RPMH_VREG("smps11", "smp%s11", &pmic5_hfsmps510, "vdd-s11"),
934 RPMH_VREG("smps12", "smp%s12", &pmic5_hfsmps510, "vdd-s12"),
935 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l4"),
936 RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l7"),
937 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3-l5"),
938 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l1-l4"),
939 RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l3-l5"),
940 RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6-l9-l10"),
941 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l2-l7"),
942 RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l8"),
943 RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9-l10"),
944 RPMH_VREG("ldo10", "ldo%s10", &pmic5_nldo, "vdd-l6-l9-l10"),
945 {}
946 };
947
948 static const struct rpmh_vreg_init_data pm8350c_vreg_data[] = {
949 RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps515, "vdd-s1"),
950 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
951 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
952 RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps510, "vdd-s4"),
953 RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps510, "vdd-s5"),
954 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
955 RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
956 RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"),
957 RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"),
958 RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps510, "vdd-s10"),
959 RPMH_VREG("ldo1", "ldo%s1", &pmic5_pldo_lv, "vdd-l1-l12"),
960 RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo_lv, "vdd-l2-l8"),
961 RPMH_VREG("ldo3", "ldo%s3", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
962 RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
963 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
964 RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l6-l9-l11"),
965 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
966 RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo_lv, "vdd-l2-l8"),
967 RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l6-l9-l11"),
968 RPMH_VREG("ldo10", "ldo%s10", &pmic5_nldo, "vdd-l10"),
969 RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l6-l9-l11"),
970 RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l1-l12"),
971 RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"),
972 RPMH_VREG("bob", "bob%s1", &pmic5_bob, "vdd-bob"),
973 {}
974 };
975
976 static const struct rpmh_vreg_init_data pm8450_vreg_data[] = {
977 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps520, "vdd-s1"),
978 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps520, "vdd-s2"),
979 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps520, "vdd-s3"),
980 RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps520, "vdd-s4"),
981 RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps520, "vdd-s5"),
982 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps520, "vdd-s6"),
983 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"),
984 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2"),
985 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"),
986 RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo_lv, "vdd-l4"),
987 {}
988 };
989
990 static const struct rpmh_vreg_init_data pm8009_vreg_data[] = {
991 RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps510, "vdd-s1"),
992 RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps515, "vdd-s2"),
993 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"),
994 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2"),
995 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"),
996 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4"),
997 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6"),
998 RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6"),
999 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo_lv, "vdd-l7"),
1000 {}
1001 };
1002
1003 static const struct rpmh_vreg_init_data pm8009_1_vreg_data[] = {
1004 RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps510, "vdd-s1"),
1005 RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps515_1, "vdd-s2"),
1006 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"),
1007 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2"),
1008 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"),
1009 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4"),
1010 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6"),
1011 RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6"),
1012 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo_lv, "vdd-l7"),
1013 {}
1014 };
1015
1016 static const struct rpmh_vreg_init_data pm6150_vreg_data[] = {
1017 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
1018 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
1019 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
1020 RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"),
1021 RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"),
1022 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"),
1023 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2-l3"),
1024 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l2-l3"),
1025 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4-l7-l8"),
1026 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
1027 RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6"),
1028 RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo, "vdd-l4-l7-l8"),
1029 RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l4-l7-l8"),
1030 RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l9"),
1031 RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo_lv, "vdd-l10-l14-l15"),
1032 RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo_lv, "vdd-l11-l12-l13"),
1033 RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l11-l12-l13"),
1034 RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo_lv, "vdd-l11-l12-l13"),
1035 RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo_lv, "vdd-l10-l14-l15"),
1036 RPMH_VREG("ldo15", "ldo%s15", &pmic5_pldo_lv, "vdd-l10-l14-l15"),
1037 RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
1038 RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
1039 RPMH_VREG("ldo18", "ldo%s18", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
1040 RPMH_VREG("ldo19", "ldo%s19", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"),
1041 {}
1042 };
1043
1044 static const struct rpmh_vreg_init_data pm6150l_vreg_data[] = {
1045 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
1046 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"),
1047 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"),
1048 RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps510, "vdd-s4"),
1049 RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps510, "vdd-s5"),
1050 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
1051 RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"),
1052 RPMH_VREG("smps8", "smp%s8", &pmic5_hfsmps510, "vdd-s8"),
1053 RPMH_VREG("ldo1", "ldo%s1", &pmic5_pldo_lv, "vdd-l1-l8"),
1054 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2-l3"),
1055 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l2-l3"),
1056 RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo, "vdd-l4-l5-l6"),
1057 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l4-l5-l6"),
1058 RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l4-l5-l6"),
1059 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-l11"),
1060 RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo, "vdd-l1-l8"),
1061 RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l9-l10"),
1062 RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l9-l10"),
1063 RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l7-l11"),
1064 RPMH_VREG("bob", "bob%s1", &pmic5_bob, "vdd-bob"),
1065 {}
1066 };
1067
1068 static const struct rpmh_vreg_init_data pm6350_vreg_data[] = {
1069 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, NULL),
1070 RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps510, NULL),
1071 /* smps3 - smps5 not configured */
1072 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, NULL),
1073 RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, NULL),
1074 RPMH_VREG("ldo3", "ldo%s3", &pmic5_pldo, NULL),
1075 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, NULL),
1076 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, NULL),
1077 RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, NULL),
1078 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, NULL),
1079 RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo, NULL),
1080 RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, NULL),
1081 RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, NULL),
1082 RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, NULL),
1083 RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo, NULL),
1084 RPMH_VREG("ldo13", "ldo%s13", &pmic5_nldo, NULL),
1085 RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo, NULL),
1086 RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo, NULL),
1087 RPMH_VREG("ldo16", "ldo%s16", &pmic5_nldo, NULL),
1088 /* ldo17 not configured */
1089 RPMH_VREG("ldo18", "ldo%s18", &pmic5_nldo, NULL),
1090 RPMH_VREG("ldo19", "ldo%s19", &pmic5_nldo, NULL),
1091 RPMH_VREG("ldo20", "ldo%s20", &pmic5_nldo, NULL),
1092 RPMH_VREG("ldo21", "ldo%s21", &pmic5_nldo, NULL),
1093 RPMH_VREG("ldo22", "ldo%s22", &pmic5_nldo, NULL),
1094 };
1095
1096 static const struct rpmh_vreg_init_data pmx55_vreg_data[] = {
1097 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
1098 RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps510, "vdd-s2"),
1099 RPMH_VREG("smps3", "smp%s3", &pmic5_hfsmps510, "vdd-s3"),
1100 RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"),
1101 RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"),
1102 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
1103 RPMH_VREG("smps7", "smp%s7", &pmic5_hfsmps510, "vdd-s7"),
1104 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l2"),
1105 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l1-l2"),
1106 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3-l9"),
1107 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4-l12"),
1108 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6"),
1109 RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6"),
1110 RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo, "vdd-l7-l8"),
1111 RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l7-l8"),
1112 RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l3-l9"),
1113 RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l10-l11-l13"),
1114 RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l10-l11-l13"),
1115 RPMH_VREG("ldo12", "ldo%s12", &pmic5_nldo, "vdd-l4-l12"),
1116 RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l10-l11-l13"),
1117 RPMH_VREG("ldo14", "ldo%s14", &pmic5_nldo, "vdd-l14"),
1118 RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo, "vdd-l15"),
1119 RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l16"),
1120 {}
1121 };
1122
1123 static const struct rpmh_vreg_init_data pmx65_vreg_data[] = {
1124 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"),
1125 RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps510, "vdd-s2"),
1126 RPMH_VREG("smps3", "smp%s3", &pmic5_hfsmps510, "vdd-s3"),
1127 RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"),
1128 RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"),
1129 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"),
1130 RPMH_VREG("smps7", "smp%s7", &pmic5_hfsmps510, "vdd-s7"),
1131 RPMH_VREG("smps8", "smp%s8", &pmic5_hfsmps510, "vdd-s8"),
1132 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"),
1133 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2-l18"),
1134 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"),
1135 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4"),
1136 RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6-l16"),
1137 RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6-l16"),
1138 RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo, "vdd-l7"),
1139 RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l8-l9"),
1140 RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l8-l9"),
1141 RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l10"),
1142 RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l11-l13"),
1143 RPMH_VREG("ldo12", "ldo%s12", &pmic5_nldo, "vdd-l12"),
1144 RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l11-l13"),
1145 RPMH_VREG("ldo14", "ldo%s14", &pmic5_nldo, "vdd-l14"),
1146 RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo, "vdd-l15"),
1147 RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l5-l6-l16"),
1148 RPMH_VREG("ldo17", "ldo%s17", &pmic5_nldo, "vdd-l17"),
1149 /* ldo18 not configured */
1150 RPMH_VREG("ldo19", "ldo%s19", &pmic5_nldo, "vdd-l19"),
1151 RPMH_VREG("ldo20", "ldo%s20", &pmic5_nldo, "vdd-l20"),
1152 RPMH_VREG("ldo21", "ldo%s21", &pmic5_nldo, "vdd-l21"),
1153 {}
1154 };
1155
1156 static const struct rpmh_vreg_init_data pm7325_vreg_data[] = {
1157 RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps510, "vdd-s1"),
1158 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps520, "vdd-s2"),
1159 RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps520, "vdd-s3"),
1160 RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps520, "vdd-s4"),
1161 RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps520, "vdd-s5"),
1162 RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps520, "vdd-s6"),
1163 RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps520, "vdd-s7"),
1164 RPMH_VREG("smps8", "smp%s8", &pmic5_hfsmps510, "vdd-s8"),
1165 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l4-l12-l15"),
1166 RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l7"),
1167 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"),
1168 RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l1-l4-l12-l15"),
1169 RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l5"),
1170 RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6-l9-l10"),
1171 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l2-l7"),
1172 RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l8"),
1173 RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9-l10"),
1174 RPMH_VREG("ldo10", "ldo%s10", &pmic5_nldo, "vdd-l6-l9-l10"),
1175 RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"),
1176 RPMH_VREG("ldo12", "ldo%s12", &pmic5_nldo, "vdd-l1-l4-l12-l15"),
1177 RPMH_VREG("ldo13", "ldo%s13", &pmic5_nldo, "vdd-l13"),
1178 RPMH_VREG("ldo14", "ldo%s14", &pmic5_nldo, "vdd-l14-l16"),
1179 RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo, "vdd-l1-l4-l12-l15"),
1180 RPMH_VREG("ldo16", "ldo%s16", &pmic5_nldo, "vdd-l14-l16"),
1181 RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"),
1182 RPMH_VREG("ldo18", "ldo%s18", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"),
1183 RPMH_VREG("ldo19", "ldo%s19", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"),
1184 {}
1185 };
1186
1187 static const struct rpmh_vreg_init_data pmr735a_vreg_data[] = {
1188 RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps520, "vdd-s1"),
1189 RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps520, "vdd-s2"),
1190 RPMH_VREG("smps3", "smp%s3", &pmic5_hfsmps510, "vdd-s3"),
1191 RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l2"),
1192 RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l1-l2"),
1193 RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"),
1194 RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo_lv, "vdd-l4"),
1195 RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l5-l6"),
1196 RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l5-l6"),
1197 RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-bob"),
1198 {}
1199 };
1200
1201 static const struct rpmh_vreg_init_data pm660_vreg_data[] = {
1202 RPMH_VREG("smps1", "smp%s1", &pmic4_ftsmps426, "vdd-s1"),
1203 RPMH_VREG("smps2", "smp%s2", &pmic4_ftsmps426, "vdd-s2"),
1204 RPMH_VREG("smps3", "smp%s3", &pmic4_ftsmps426, "vdd-s3"),
1205 RPMH_VREG("smps4", "smp%s4", &pmic4_hfsmps3, "vdd-s4"),
1206 RPMH_VREG("smps5", "smp%s5", &pmic4_hfsmps3, "vdd-s5"),
1207 RPMH_VREG("smps6", "smp%s6", &pmic4_hfsmps3, "vdd-s6"),
1208 RPMH_VREG("ldo1", "ldo%s1", &pmic4_nldo, "vdd-l1-l6-l7"),
1209 RPMH_VREG("ldo2", "ldo%s2", &pmic4_nldo, "vdd-l2-l3"),
1210 RPMH_VREG("ldo3", "ldo%s3", &pmic4_nldo, "vdd-l2-l3"),
1211 /* ldo4 is inaccessible on PM660 */
1212 RPMH_VREG("ldo5", "ldo%s5", &pmic4_nldo, "vdd-l5"),
1213 RPMH_VREG("ldo6", "ldo%s6", &pmic4_nldo, "vdd-l1-l6-l7"),
1214 RPMH_VREG("ldo7", "ldo%s7", &pmic4_nldo, "vdd-l1-l6-l7"),
1215 RPMH_VREG("ldo8", "ldo%s8", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
1216 RPMH_VREG("ldo9", "ldo%s9", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
1217 RPMH_VREG("ldo10", "ldo%s10", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
1218 RPMH_VREG("ldo11", "ldo%s11", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
1219 RPMH_VREG("ldo12", "ldo%s12", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
1220 RPMH_VREG("ldo13", "ldo%s13", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
1221 RPMH_VREG("ldo14", "ldo%s14", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"),
1222 RPMH_VREG("ldo15", "ldo%s15", &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"),
1223 RPMH_VREG("ldo16", "ldo%s16", &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"),
1224 RPMH_VREG("ldo17", "ldo%s17", &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"),
1225 RPMH_VREG("ldo18", "ldo%s18", &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"),
1226 RPMH_VREG("ldo19", "ldo%s19", &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"),
1227 {}
1228 };
1229
1230 static const struct rpmh_vreg_init_data pm660l_vreg_data[] = {
1231 RPMH_VREG("smps1", "smp%s1", &pmic4_ftsmps426, "vdd-s1"),
1232 RPMH_VREG("smps2", "smp%s2", &pmic4_ftsmps426, "vdd-s2"),
1233 RPMH_VREG("smps3", "smp%s3", &pmic4_ftsmps426, "vdd-s3-s4"),
1234 RPMH_VREG("smps5", "smp%s5", &pmic4_ftsmps426, "vdd-s5"),
1235 RPMH_VREG("ldo1", "ldo%s1", &pmic4_nldo, "vdd-l1-l9-l10"),
1236 RPMH_VREG("ldo2", "ldo%s2", &pmic4_pldo, "vdd-l2"),
1237 RPMH_VREG("ldo3", "ldo%s3", &pmic4_pldo, "vdd-l3-l5-l7-l8"),
1238 RPMH_VREG("ldo4", "ldo%s4", &pmic4_pldo, "vdd-l4-l6"),
1239 RPMH_VREG("ldo5", "ldo%s5", &pmic4_pldo, "vdd-l3-l5-l7-l8"),
1240 RPMH_VREG("ldo6", "ldo%s6", &pmic4_pldo, "vdd-l4-l6"),
1241 RPMH_VREG("ldo7", "ldo%s7", &pmic4_pldo, "vdd-l3-l5-l7-l8"),
1242 RPMH_VREG("ldo8", "ldo%s8", &pmic4_pldo, "vdd-l3-l5-l7-l8"),
1243 RPMH_VREG("bob", "bob%s1", &pmic4_bob, "vdd-bob"),
1244 {}
1245 };
1246
rpmh_regulator_probe(struct platform_device * pdev)1247 static int rpmh_regulator_probe(struct platform_device *pdev)
1248 {
1249 struct device *dev = &pdev->dev;
1250 const struct rpmh_vreg_init_data *vreg_data;
1251 struct device_node *node;
1252 struct rpmh_vreg *vreg;
1253 const char *pmic_id;
1254 int ret;
1255
1256 vreg_data = of_device_get_match_data(dev);
1257 if (!vreg_data)
1258 return -ENODEV;
1259
1260 ret = of_property_read_string(dev->of_node, "qcom,pmic-id", &pmic_id);
1261 if (ret < 0) {
1262 dev_err(dev, "qcom,pmic-id missing in DT node\n");
1263 return ret;
1264 }
1265
1266 for_each_available_child_of_node(dev->of_node, node) {
1267 vreg = devm_kzalloc(dev, sizeof(*vreg), GFP_KERNEL);
1268 if (!vreg) {
1269 of_node_put(node);
1270 return -ENOMEM;
1271 }
1272
1273 ret = rpmh_regulator_init_vreg(vreg, dev, node, pmic_id,
1274 vreg_data);
1275 if (ret < 0) {
1276 of_node_put(node);
1277 return ret;
1278 }
1279 }
1280
1281 return 0;
1282 }
1283
1284 static const struct of_device_id __maybe_unused rpmh_regulator_match_table[] = {
1285 {
1286 .compatible = "qcom,pm8005-rpmh-regulators",
1287 .data = pm8005_vreg_data,
1288 },
1289 {
1290 .compatible = "qcom,pm8009-rpmh-regulators",
1291 .data = pm8009_vreg_data,
1292 },
1293 {
1294 .compatible = "qcom,pm8009-1-rpmh-regulators",
1295 .data = pm8009_1_vreg_data,
1296 },
1297 {
1298 .compatible = "qcom,pm8150-rpmh-regulators",
1299 .data = pm8150_vreg_data,
1300 },
1301 {
1302 .compatible = "qcom,pm8150l-rpmh-regulators",
1303 .data = pm8150l_vreg_data,
1304 },
1305 {
1306 .compatible = "qcom,pm8350-rpmh-regulators",
1307 .data = pm8350_vreg_data,
1308 },
1309 {
1310 .compatible = "qcom,pm8350c-rpmh-regulators",
1311 .data = pm8350c_vreg_data,
1312 },
1313 {
1314 .compatible = "qcom,pm8450-rpmh-regulators",
1315 .data = pm8450_vreg_data,
1316 },
1317 {
1318 .compatible = "qcom,pm8998-rpmh-regulators",
1319 .data = pm8998_vreg_data,
1320 },
1321 {
1322 .compatible = "qcom,pmg1110-rpmh-regulators",
1323 .data = pmg1110_vreg_data,
1324 },
1325 {
1326 .compatible = "qcom,pmi8998-rpmh-regulators",
1327 .data = pmi8998_vreg_data,
1328 },
1329 {
1330 .compatible = "qcom,pm6150-rpmh-regulators",
1331 .data = pm6150_vreg_data,
1332 },
1333 {
1334 .compatible = "qcom,pm6150l-rpmh-regulators",
1335 .data = pm6150l_vreg_data,
1336 },
1337 {
1338 .compatible = "qcom,pm6350-rpmh-regulators",
1339 .data = pm6350_vreg_data,
1340 },
1341 {
1342 .compatible = "qcom,pmc8180-rpmh-regulators",
1343 .data = pm8150_vreg_data,
1344 },
1345 {
1346 .compatible = "qcom,pmc8180c-rpmh-regulators",
1347 .data = pm8150l_vreg_data,
1348 },
1349 {
1350 .compatible = "qcom,pmm8155au-rpmh-regulators",
1351 .data = pmm8155au_vreg_data,
1352 },
1353 {
1354 .compatible = "qcom,pmx55-rpmh-regulators",
1355 .data = pmx55_vreg_data,
1356 },
1357 {
1358 .compatible = "qcom,pmx65-rpmh-regulators",
1359 .data = pmx65_vreg_data,
1360 },
1361 {
1362 .compatible = "qcom,pm7325-rpmh-regulators",
1363 .data = pm7325_vreg_data,
1364 },
1365 {
1366 .compatible = "qcom,pmr735a-rpmh-regulators",
1367 .data = pmr735a_vreg_data,
1368 },
1369 {
1370 .compatible = "qcom,pm660-rpmh-regulators",
1371 .data = pm660_vreg_data,
1372 },
1373 {
1374 .compatible = "qcom,pm660l-rpmh-regulators",
1375 .data = pm660l_vreg_data,
1376 },
1377 {}
1378 };
1379 MODULE_DEVICE_TABLE(of, rpmh_regulator_match_table);
1380
1381 static struct platform_driver rpmh_regulator_driver = {
1382 .driver = {
1383 .name = "qcom-rpmh-regulator",
1384 .of_match_table = of_match_ptr(rpmh_regulator_match_table),
1385 },
1386 .probe = rpmh_regulator_probe,
1387 };
1388 module_platform_driver(rpmh_regulator_driver);
1389
1390 MODULE_DESCRIPTION("Qualcomm RPMh regulator driver");
1391 MODULE_LICENSE("GPL v2");
1392
