1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
2 /*
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
5 */
6
7 #ifndef ATH11K_CORE_H
8 #define ATH11K_CORE_H
9
10 #include <linux/types.h>
11 #include <linux/interrupt.h>
12 #include <linux/irq.h>
13 #include <linux/bitfield.h>
14 #include <linux/dmi.h>
15 #include <linux/ctype.h>
16 #include <linux/rhashtable.h>
17 #include <linux/average.h>
18 #include "qmi.h"
19 #include "htc.h"
20 #include "wmi.h"
21 #include "hal.h"
22 #include "dp.h"
23 #include "ce.h"
24 #include "mac.h"
25 #include "hw.h"
26 #include "hal_rx.h"
27 #include "reg.h"
28 #include "thermal.h"
29 #include "dbring.h"
30 #include "spectral.h"
31 #include "wow.h"
32
33 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
34
35 #define ATH11K_TX_MGMT_NUM_PENDING_MAX 512
36
37 #define ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI 64
38
39 /* Pending management packets threshold for dropping probe responses */
40 #define ATH11K_PRB_RSP_DROP_THRESHOLD ((ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI * 3) / 4)
41
42 #define ATH11K_INVALID_HW_MAC_ID 0xFF
43 #define ATH11K_CONNECTION_LOSS_HZ (3 * HZ)
44
45 /* SMBIOS type containing Board Data File Name Extension */
46 #define ATH11K_SMBIOS_BDF_EXT_TYPE 0xF8
47
48 /* SMBIOS type structure length (excluding strings-set) */
49 #define ATH11K_SMBIOS_BDF_EXT_LENGTH 0x9
50
51 /* The magic used by QCA spec */
52 #define ATH11K_SMBIOS_BDF_EXT_MAGIC "BDF_"
53
54 extern unsigned int ath11k_frame_mode;
55
56 #define ATH11K_SCAN_TIMEOUT_HZ (20 * HZ)
57
58 #define ATH11K_MON_TIMER_INTERVAL 10
59 #define ATH11K_RESET_TIMEOUT_HZ (20 * HZ)
60 #define ATH11K_RESET_MAX_FAIL_COUNT_FIRST 3
61 #define ATH11K_RESET_MAX_FAIL_COUNT_FINAL 5
62 #define ATH11K_RESET_FAIL_TIMEOUT_HZ (20 * HZ)
63 #define ATH11K_RECONFIGURE_TIMEOUT_HZ (10 * HZ)
64 #define ATH11K_RECOVER_START_TIMEOUT_HZ (20 * HZ)
65
66 enum ath11k_supported_bw {
67 ATH11K_BW_20 = 0,
68 ATH11K_BW_40 = 1,
69 ATH11K_BW_80 = 2,
70 ATH11K_BW_160 = 3,
71 };
72
73 enum ath11k_bdf_search {
74 ATH11K_BDF_SEARCH_DEFAULT,
75 ATH11K_BDF_SEARCH_BUS_AND_BOARD,
76 };
77
78 enum wme_ac {
79 WME_AC_BE,
80 WME_AC_BK,
81 WME_AC_VI,
82 WME_AC_VO,
83 WME_NUM_AC
84 };
85
86 #define ATH11K_HT_MCS_MAX 7
87 #define ATH11K_VHT_MCS_MAX 9
88 #define ATH11K_HE_MCS_MAX 11
89
90 enum ath11k_crypt_mode {
91 /* Only use hardware crypto engine */
92 ATH11K_CRYPT_MODE_HW,
93 /* Only use software crypto */
94 ATH11K_CRYPT_MODE_SW,
95 };
96
ath11k_tid_to_ac(u32 tid)97 static inline enum wme_ac ath11k_tid_to_ac(u32 tid)
98 {
99 return (((tid == 0) || (tid == 3)) ? WME_AC_BE :
100 ((tid == 1) || (tid == 2)) ? WME_AC_BK :
101 ((tid == 4) || (tid == 5)) ? WME_AC_VI :
102 WME_AC_VO);
103 }
104
105 enum ath11k_skb_flags {
106 ATH11K_SKB_HW_80211_ENCAP = BIT(0),
107 ATH11K_SKB_CIPHER_SET = BIT(1),
108 };
109
110 struct ath11k_skb_cb {
111 dma_addr_t paddr;
112 u8 eid;
113 u8 flags;
114 u32 cipher;
115 struct ath11k *ar;
116 struct ieee80211_vif *vif;
117 } __packed;
118
119 struct ath11k_skb_rxcb {
120 dma_addr_t paddr;
121 bool is_first_msdu;
122 bool is_last_msdu;
123 bool is_continuation;
124 bool is_mcbc;
125 bool is_eapol;
126 struct hal_rx_desc *rx_desc;
127 u8 err_rel_src;
128 u8 err_code;
129 u8 mac_id;
130 u8 unmapped;
131 u8 is_frag;
132 u8 tid;
133 u16 peer_id;
134 u16 seq_no;
135 };
136
137 enum ath11k_hw_rev {
138 ATH11K_HW_IPQ8074,
139 ATH11K_HW_QCA6390_HW20,
140 ATH11K_HW_IPQ6018_HW10,
141 ATH11K_HW_QCN9074_HW10,
142 ATH11K_HW_WCN6855_HW20,
143 ATH11K_HW_WCN6855_HW21,
144 ATH11K_HW_WCN6750_HW10,
145 };
146
147 enum ath11k_firmware_mode {
148 /* the default mode, standard 802.11 functionality */
149 ATH11K_FIRMWARE_MODE_NORMAL,
150
151 /* factory tests etc */
152 ATH11K_FIRMWARE_MODE_FTM,
153
154 /* Cold boot calibration */
155 ATH11K_FIRMWARE_MODE_COLD_BOOT = 7,
156 };
157
158 extern bool ath11k_cold_boot_cal;
159
160 #define ATH11K_IRQ_NUM_MAX 52
161 #define ATH11K_EXT_IRQ_NUM_MAX 16
162
163 struct ath11k_ext_irq_grp {
164 struct ath11k_base *ab;
165 u32 irqs[ATH11K_EXT_IRQ_NUM_MAX];
166 u32 num_irq;
167 u32 grp_id;
168 u64 timestamp;
169 bool napi_enabled;
170 struct napi_struct napi;
171 struct net_device napi_ndev;
172 };
173
174 enum ath11k_smbios_cc_type {
175 /* disable country code setting from SMBIOS */
176 ATH11K_SMBIOS_CC_DISABLE = 0,
177
178 /* set country code by ANSI country name, based on ISO3166-1 alpha2 */
179 ATH11K_SMBIOS_CC_ISO = 1,
180
181 /* worldwide regdomain */
182 ATH11K_SMBIOS_CC_WW = 2,
183 };
184
185 struct ath11k_smbios_bdf {
186 struct dmi_header hdr;
187
188 u8 features_disabled;
189
190 /* enum ath11k_smbios_cc_type */
191 u8 country_code_flag;
192
193 /* To set specific country, you need to set country code
194 * flag=ATH11K_SMBIOS_CC_ISO first, then if country is United
195 * States, then country code value = 0x5553 ("US",'U' = 0x55, 'S'=
196 * 0x53). To set country to INDONESIA, then country code value =
197 * 0x4944 ("IN", 'I'=0x49, 'D'=0x44). If country code flag =
198 * ATH11K_SMBIOS_CC_WW, then you can use worldwide regulatory
199 * setting.
200 */
201 u16 cc_code;
202
203 u8 bdf_enabled;
204 u8 bdf_ext[];
205 } __packed;
206
207 #define HEHANDLE_CAP_PHYINFO_SIZE 3
208 #define HECAP_PHYINFO_SIZE 9
209 #define HECAP_MACINFO_SIZE 5
210 #define HECAP_TXRX_MCS_NSS_SIZE 2
211 #define HECAP_PPET16_PPET8_MAX_SIZE 25
212
213 #define HE_PPET16_PPET8_SIZE 8
214
215 /* 802.11ax PPE (PPDU packet Extension) threshold */
216 struct he_ppe_threshold {
217 u32 numss_m1;
218 u32 ru_mask;
219 u32 ppet16_ppet8_ru3_ru0[HE_PPET16_PPET8_SIZE];
220 };
221
222 struct ath11k_he {
223 u8 hecap_macinfo[HECAP_MACINFO_SIZE];
224 u32 hecap_rxmcsnssmap;
225 u32 hecap_txmcsnssmap;
226 u32 hecap_phyinfo[HEHANDLE_CAP_PHYINFO_SIZE];
227 struct he_ppe_threshold hecap_ppet;
228 u32 heop_param;
229 };
230
231 #define MAX_RADIOS 3
232
233 enum {
234 WMI_HOST_TP_SCALE_MAX = 0,
235 WMI_HOST_TP_SCALE_50 = 1,
236 WMI_HOST_TP_SCALE_25 = 2,
237 WMI_HOST_TP_SCALE_12 = 3,
238 WMI_HOST_TP_SCALE_MIN = 4,
239 WMI_HOST_TP_SCALE_SIZE = 5,
240 };
241
242 enum ath11k_scan_state {
243 ATH11K_SCAN_IDLE,
244 ATH11K_SCAN_STARTING,
245 ATH11K_SCAN_RUNNING,
246 ATH11K_SCAN_ABORTING,
247 };
248
249 enum ath11k_11d_state {
250 ATH11K_11D_IDLE,
251 ATH11K_11D_PREPARING,
252 ATH11K_11D_RUNNING,
253 };
254
255 enum ath11k_dev_flags {
256 ATH11K_CAC_RUNNING,
257 ATH11K_FLAG_CORE_REGISTERED,
258 ATH11K_FLAG_CRASH_FLUSH,
259 ATH11K_FLAG_RAW_MODE,
260 ATH11K_FLAG_HW_CRYPTO_DISABLED,
261 ATH11K_FLAG_BTCOEX,
262 ATH11K_FLAG_RECOVERY,
263 ATH11K_FLAG_UNREGISTERING,
264 ATH11K_FLAG_REGISTERED,
265 ATH11K_FLAG_QMI_FAIL,
266 ATH11K_FLAG_HTC_SUSPEND_COMPLETE,
267 ATH11K_FLAG_CE_IRQ_ENABLED,
268 ATH11K_FLAG_EXT_IRQ_ENABLED,
269 ATH11K_FLAG_FIXED_MEM_RGN,
270 ATH11K_FLAG_DEVICE_INIT_DONE,
271 ATH11K_FLAG_MULTI_MSI_VECTORS,
272 };
273
274 enum ath11k_monitor_flags {
275 ATH11K_FLAG_MONITOR_CONF_ENABLED,
276 ATH11K_FLAG_MONITOR_STARTED,
277 ATH11K_FLAG_MONITOR_VDEV_CREATED,
278 };
279
280 #define ATH11K_IPV6_UC_TYPE 0
281 #define ATH11K_IPV6_AC_TYPE 1
282
283 #define ATH11K_IPV6_MAX_COUNT 16
284 #define ATH11K_IPV4_MAX_COUNT 2
285
286 struct ath11k_arp_ns_offload {
287 u8 ipv4_addr[ATH11K_IPV4_MAX_COUNT][4];
288 u32 ipv4_count;
289 u32 ipv6_count;
290 u8 ipv6_addr[ATH11K_IPV6_MAX_COUNT][16];
291 u8 self_ipv6_addr[ATH11K_IPV6_MAX_COUNT][16];
292 u8 ipv6_type[ATH11K_IPV6_MAX_COUNT];
293 bool ipv6_valid[ATH11K_IPV6_MAX_COUNT];
294 u8 mac_addr[ETH_ALEN];
295 };
296
297 struct ath11k_rekey_data {
298 u8 kck[NL80211_KCK_LEN];
299 u8 kek[NL80211_KCK_LEN];
300 u64 replay_ctr;
301 bool enable_offload;
302 };
303
304 struct ath11k_vif {
305 u32 vdev_id;
306 enum wmi_vdev_type vdev_type;
307 enum wmi_vdev_subtype vdev_subtype;
308 u32 beacon_interval;
309 u32 dtim_period;
310 u16 ast_hash;
311 u16 ast_idx;
312 u16 tcl_metadata;
313 u8 hal_addr_search_flags;
314 u8 search_type;
315
316 struct ath11k *ar;
317 struct ieee80211_vif *vif;
318
319 u16 tx_seq_no;
320 struct wmi_wmm_params_all_arg wmm_params;
321 struct list_head list;
322 union {
323 struct {
324 u32 uapsd;
325 } sta;
326 struct {
327 /* 127 stations; wmi limit */
328 u8 tim_bitmap[16];
329 u8 tim_len;
330 u32 ssid_len;
331 u8 ssid[IEEE80211_MAX_SSID_LEN];
332 bool hidden_ssid;
333 /* P2P_IE with NoA attribute for P2P_GO case */
334 u32 noa_len;
335 u8 *noa_data;
336 } ap;
337 } u;
338
339 bool is_started;
340 bool is_up;
341 bool spectral_enabled;
342 bool ps;
343 u32 aid;
344 u8 bssid[ETH_ALEN];
345 struct cfg80211_bitrate_mask bitrate_mask;
346 struct delayed_work connection_loss_work;
347 int num_legacy_stations;
348 int rtscts_prot_mode;
349 int txpower;
350 bool rsnie_present;
351 bool wpaie_present;
352 bool bcca_zero_sent;
353 bool do_not_send_tmpl;
354 struct ieee80211_chanctx_conf chanctx;
355 struct ath11k_arp_ns_offload arp_ns_offload;
356 struct ath11k_rekey_data rekey_data;
357
358 #ifdef CONFIG_ATH11K_DEBUGFS
359 struct dentry *debugfs_twt;
360 #endif /* CONFIG_ATH11K_DEBUGFS */
361 };
362
363 struct ath11k_vif_iter {
364 u32 vdev_id;
365 struct ath11k_vif *arvif;
366 };
367
368 struct ath11k_rx_peer_stats {
369 u64 num_msdu;
370 u64 num_mpdu_fcs_ok;
371 u64 num_mpdu_fcs_err;
372 u64 tcp_msdu_count;
373 u64 udp_msdu_count;
374 u64 other_msdu_count;
375 u64 ampdu_msdu_count;
376 u64 non_ampdu_msdu_count;
377 u64 stbc_count;
378 u64 beamformed_count;
379 u64 mcs_count[HAL_RX_MAX_MCS + 1];
380 u64 nss_count[HAL_RX_MAX_NSS];
381 u64 bw_count[HAL_RX_BW_MAX];
382 u64 gi_count[HAL_RX_GI_MAX];
383 u64 coding_count[HAL_RX_SU_MU_CODING_MAX];
384 u64 tid_count[IEEE80211_NUM_TIDS + 1];
385 u64 pream_cnt[HAL_RX_PREAMBLE_MAX];
386 u64 reception_type[HAL_RX_RECEPTION_TYPE_MAX];
387 u64 rx_duration;
388 u64 dcm_count;
389 u64 ru_alloc_cnt[HAL_RX_RU_ALLOC_TYPE_MAX];
390 };
391
392 #define ATH11K_HE_MCS_NUM 12
393 #define ATH11K_VHT_MCS_NUM 10
394 #define ATH11K_BW_NUM 4
395 #define ATH11K_NSS_NUM 4
396 #define ATH11K_LEGACY_NUM 12
397 #define ATH11K_GI_NUM 4
398 #define ATH11K_HT_MCS_NUM 32
399
400 enum ath11k_pkt_rx_err {
401 ATH11K_PKT_RX_ERR_FCS,
402 ATH11K_PKT_RX_ERR_TKIP,
403 ATH11K_PKT_RX_ERR_CRYPT,
404 ATH11K_PKT_RX_ERR_PEER_IDX_INVAL,
405 ATH11K_PKT_RX_ERR_MAX,
406 };
407
408 enum ath11k_ampdu_subfrm_num {
409 ATH11K_AMPDU_SUBFRM_NUM_10,
410 ATH11K_AMPDU_SUBFRM_NUM_20,
411 ATH11K_AMPDU_SUBFRM_NUM_30,
412 ATH11K_AMPDU_SUBFRM_NUM_40,
413 ATH11K_AMPDU_SUBFRM_NUM_50,
414 ATH11K_AMPDU_SUBFRM_NUM_60,
415 ATH11K_AMPDU_SUBFRM_NUM_MORE,
416 ATH11K_AMPDU_SUBFRM_NUM_MAX,
417 };
418
419 enum ath11k_amsdu_subfrm_num {
420 ATH11K_AMSDU_SUBFRM_NUM_1,
421 ATH11K_AMSDU_SUBFRM_NUM_2,
422 ATH11K_AMSDU_SUBFRM_NUM_3,
423 ATH11K_AMSDU_SUBFRM_NUM_4,
424 ATH11K_AMSDU_SUBFRM_NUM_MORE,
425 ATH11K_AMSDU_SUBFRM_NUM_MAX,
426 };
427
428 enum ath11k_counter_type {
429 ATH11K_COUNTER_TYPE_BYTES,
430 ATH11K_COUNTER_TYPE_PKTS,
431 ATH11K_COUNTER_TYPE_MAX,
432 };
433
434 enum ath11k_stats_type {
435 ATH11K_STATS_TYPE_SUCC,
436 ATH11K_STATS_TYPE_FAIL,
437 ATH11K_STATS_TYPE_RETRY,
438 ATH11K_STATS_TYPE_AMPDU,
439 ATH11K_STATS_TYPE_MAX,
440 };
441
442 struct ath11k_htt_data_stats {
443 u64 legacy[ATH11K_COUNTER_TYPE_MAX][ATH11K_LEGACY_NUM];
444 u64 ht[ATH11K_COUNTER_TYPE_MAX][ATH11K_HT_MCS_NUM];
445 u64 vht[ATH11K_COUNTER_TYPE_MAX][ATH11K_VHT_MCS_NUM];
446 u64 he[ATH11K_COUNTER_TYPE_MAX][ATH11K_HE_MCS_NUM];
447 u64 bw[ATH11K_COUNTER_TYPE_MAX][ATH11K_BW_NUM];
448 u64 nss[ATH11K_COUNTER_TYPE_MAX][ATH11K_NSS_NUM];
449 u64 gi[ATH11K_COUNTER_TYPE_MAX][ATH11K_GI_NUM];
450 };
451
452 struct ath11k_htt_tx_stats {
453 struct ath11k_htt_data_stats stats[ATH11K_STATS_TYPE_MAX];
454 u64 tx_duration;
455 u64 ba_fails;
456 u64 ack_fails;
457 };
458
459 struct ath11k_per_ppdu_tx_stats {
460 u16 succ_pkts;
461 u16 failed_pkts;
462 u16 retry_pkts;
463 u32 succ_bytes;
464 u32 failed_bytes;
465 u32 retry_bytes;
466 };
467
468 DECLARE_EWMA(avg_rssi, 10, 8)
469
470 struct ath11k_sta {
471 struct ath11k_vif *arvif;
472
473 /* the following are protected by ar->data_lock */
474 u32 changed; /* IEEE80211_RC_* */
475 u32 bw;
476 u32 nss;
477 u32 smps;
478 enum hal_pn_type pn_type;
479
480 struct work_struct update_wk;
481 struct work_struct set_4addr_wk;
482 struct rate_info txrate;
483 u32 peer_nss;
484 struct rate_info last_txrate;
485 u64 rx_duration;
486 u64 tx_duration;
487 u8 rssi_comb;
488 struct ewma_avg_rssi avg_rssi;
489 s8 rssi_beacon;
490 s8 chain_signal[IEEE80211_MAX_CHAINS];
491 struct ath11k_htt_tx_stats *tx_stats;
492 struct ath11k_rx_peer_stats *rx_stats;
493
494 #ifdef CONFIG_MAC80211_DEBUGFS
495 /* protected by conf_mutex */
496 bool aggr_mode;
497 #endif
498
499 bool use_4addr_set;
500 u16 tcl_metadata;
501
502 /* Protected with ar->data_lock */
503 enum ath11k_wmi_peer_ps_state peer_ps_state;
504 u64 ps_start_time;
505 u64 ps_start_jiffies;
506 u64 ps_total_duration;
507 bool peer_current_ps_valid;
508 };
509
510 #define ATH11K_MIN_5G_FREQ 4150
511 #define ATH11K_MIN_6G_FREQ 5925
512 #define ATH11K_MAX_6G_FREQ 7115
513 #define ATH11K_NUM_CHANS 101
514 #define ATH11K_MAX_5G_CHAN 173
515
516 enum ath11k_state {
517 ATH11K_STATE_OFF,
518 ATH11K_STATE_ON,
519 ATH11K_STATE_RESTARTING,
520 ATH11K_STATE_RESTARTED,
521 ATH11K_STATE_WEDGED,
522 /* Add other states as required */
523 };
524
525 /* Antenna noise floor */
526 #define ATH11K_DEFAULT_NOISE_FLOOR -95
527
528 #define ATH11K_INVALID_RSSI_FULL -1
529
530 #define ATH11K_INVALID_RSSI_EMPTY -128
531
532 struct ath11k_fw_stats {
533 struct dentry *debugfs_fwstats;
534 u32 pdev_id;
535 u32 stats_id;
536 struct list_head pdevs;
537 struct list_head vdevs;
538 struct list_head bcn;
539 };
540
541 struct ath11k_dbg_htt_stats {
542 u8 type;
543 u8 reset;
544 struct debug_htt_stats_req *stats_req;
545 /* protects shared stats req buffer */
546 spinlock_t lock;
547 };
548
549 #define MAX_MODULE_ID_BITMAP_WORDS 16
550
551 struct ath11k_debug {
552 struct dentry *debugfs_pdev;
553 struct ath11k_dbg_htt_stats htt_stats;
554 u32 extd_tx_stats;
555 u32 extd_rx_stats;
556 u32 pktlog_filter;
557 u32 pktlog_mode;
558 u32 pktlog_peer_valid;
559 u8 pktlog_peer_addr[ETH_ALEN];
560 u32 rx_filter;
561 u32 mem_offset;
562 u32 module_id_bitmap[MAX_MODULE_ID_BITMAP_WORDS];
563 struct ath11k_debug_dbr *dbr_debug[WMI_DIRECT_BUF_MAX];
564 };
565
566 struct ath11k_per_peer_tx_stats {
567 u32 succ_bytes;
568 u32 retry_bytes;
569 u32 failed_bytes;
570 u16 succ_pkts;
571 u16 retry_pkts;
572 u16 failed_pkts;
573 u32 duration;
574 u8 ba_fails;
575 bool is_ampdu;
576 };
577
578 #define ATH11K_FLUSH_TIMEOUT (5 * HZ)
579 #define ATH11K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ)
580
581 struct ath11k {
582 struct ath11k_base *ab;
583 struct ath11k_pdev *pdev;
584 struct ieee80211_hw *hw;
585 struct ieee80211_ops *ops;
586 struct ath11k_pdev_wmi *wmi;
587 struct ath11k_pdev_dp dp;
588 u8 mac_addr[ETH_ALEN];
589 struct ath11k_he ar_he;
590 enum ath11k_state state;
591 bool supports_6ghz;
592 struct {
593 struct completion started;
594 struct completion completed;
595 struct completion on_channel;
596 struct delayed_work timeout;
597 enum ath11k_scan_state state;
598 bool is_roc;
599 int vdev_id;
600 int roc_freq;
601 bool roc_notify;
602 } scan;
603
604 struct {
605 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
606 struct ieee80211_sband_iftype_data
607 iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES];
608 } mac;
609
610 unsigned long dev_flags;
611 unsigned int filter_flags;
612 unsigned long monitor_flags;
613 u32 min_tx_power;
614 u32 max_tx_power;
615 u32 txpower_limit_2g;
616 u32 txpower_limit_5g;
617 u32 txpower_scale;
618 u32 power_scale;
619 u32 chan_tx_pwr;
620 u32 num_stations;
621 u32 max_num_stations;
622 /* To synchronize concurrent synchronous mac80211 callback operations,
623 * concurrent debugfs configuration and concurrent FW statistics events.
624 */
625 struct mutex conf_mutex;
626 /* protects the radio specific data like debug stats, ppdu_stats_info stats,
627 * vdev_stop_status info, scan data, ath11k_sta info, ath11k_vif info,
628 * channel context data, survey info, test mode data.
629 */
630 spinlock_t data_lock;
631
632 struct list_head arvifs;
633 /* should never be NULL; needed for regular htt rx */
634 struct ieee80211_channel *rx_channel;
635
636 /* valid during scan; needed for mgmt rx during scan */
637 struct ieee80211_channel *scan_channel;
638
639 u8 cfg_tx_chainmask;
640 u8 cfg_rx_chainmask;
641 u8 num_rx_chains;
642 u8 num_tx_chains;
643 /* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */
644 u8 pdev_idx;
645 u8 lmac_id;
646
647 struct completion peer_assoc_done;
648 struct completion peer_delete_done;
649
650 int install_key_status;
651 struct completion install_key_done;
652
653 int last_wmi_vdev_start_status;
654 struct completion vdev_setup_done;
655 struct completion vdev_delete_done;
656
657 int num_peers;
658 int max_num_peers;
659 u32 num_started_vdevs;
660 u32 num_created_vdevs;
661 unsigned long long allocated_vdev_map;
662
663 struct idr txmgmt_idr;
664 /* protects txmgmt_idr data */
665 spinlock_t txmgmt_idr_lock;
666 atomic_t num_pending_mgmt_tx;
667 wait_queue_head_t txmgmt_empty_waitq;
668
669 /* cycle count is reported twice for each visited channel during scan.
670 * access protected by data_lock
671 */
672 u32 survey_last_rx_clear_count;
673 u32 survey_last_cycle_count;
674
675 /* Channel info events are expected to come in pairs without and with
676 * COMPLETE flag set respectively for each channel visit during scan.
677 *
678 * However there are deviations from this rule. This flag is used to
679 * avoid reporting garbage data.
680 */
681 bool ch_info_can_report_survey;
682 struct survey_info survey[ATH11K_NUM_CHANS];
683 struct completion bss_survey_done;
684
685 struct work_struct regd_update_work;
686
687 struct work_struct wmi_mgmt_tx_work;
688 struct sk_buff_head wmi_mgmt_tx_queue;
689
690 struct ath11k_wow wow;
691 struct completion target_suspend;
692 bool target_suspend_ack;
693 struct ath11k_per_peer_tx_stats peer_tx_stats;
694 struct list_head ppdu_stats_info;
695 u32 ppdu_stat_list_depth;
696
697 struct ath11k_per_peer_tx_stats cached_stats;
698 u32 last_ppdu_id;
699 u32 cached_ppdu_id;
700 int monitor_vdev_id;
701 #ifdef CONFIG_ATH11K_DEBUGFS
702 struct ath11k_debug debug;
703 #endif
704 #ifdef CONFIG_ATH11K_SPECTRAL
705 struct ath11k_spectral spectral;
706 #endif
707 bool dfs_block_radar_events;
708 struct ath11k_thermal thermal;
709 u32 vdev_id_11d_scan;
710 struct completion completed_11d_scan;
711 enum ath11k_11d_state state_11d;
712 bool regdom_set_by_user;
713 int hw_rate_code;
714 u8 twt_enabled;
715 bool nlo_enabled;
716 u8 alpha2[REG_ALPHA2_LEN + 1];
717 struct ath11k_fw_stats fw_stats;
718 struct completion fw_stats_complete;
719 bool fw_stats_done;
720
721 /* protected by conf_mutex */
722 bool ps_state_enable;
723 bool ps_timekeeper_enable;
724 };
725
726 struct ath11k_band_cap {
727 u32 phy_id;
728 u32 max_bw_supported;
729 u32 ht_cap_info;
730 u32 he_cap_info[2];
731 u32 he_mcs;
732 u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE];
733 struct ath11k_ppe_threshold he_ppet;
734 u16 he_6ghz_capa;
735 };
736
737 struct ath11k_pdev_cap {
738 u32 supported_bands;
739 u32 ampdu_density;
740 u32 vht_cap;
741 u32 vht_mcs;
742 u32 he_mcs;
743 u32 tx_chain_mask;
744 u32 rx_chain_mask;
745 u32 tx_chain_mask_shift;
746 u32 rx_chain_mask_shift;
747 struct ath11k_band_cap band[NUM_NL80211_BANDS];
748 bool nss_ratio_enabled;
749 u8 nss_ratio_info;
750 };
751
752 struct ath11k_pdev {
753 struct ath11k *ar;
754 u32 pdev_id;
755 struct ath11k_pdev_cap cap;
756 u8 mac_addr[ETH_ALEN];
757 };
758
759 struct ath11k_board_data {
760 const struct firmware *fw;
761 const void *data;
762 size_t len;
763 };
764
765 struct ath11k_pci_ops {
766 int (*wakeup)(struct ath11k_base *ab);
767 void (*release)(struct ath11k_base *ab);
768 int (*get_msi_irq)(struct ath11k_base *ab, unsigned int vector);
769 void (*window_write32)(struct ath11k_base *ab, u32 offset, u32 value);
770 u32 (*window_read32)(struct ath11k_base *ab, u32 offset);
771 };
772
773 /* IPQ8074 HW channel counters frequency value in hertz */
774 #define IPQ8074_CC_FREQ_HERTZ 320000
775
776 struct ath11k_bp_stats {
777 /* Head Pointer reported by the last HTT Backpressure event for the ring */
778 u16 hp;
779
780 /* Tail Pointer reported by the last HTT Backpressure event for the ring */
781 u16 tp;
782
783 /* Number of Backpressure events received for the ring */
784 u32 count;
785
786 /* Last recorded event timestamp */
787 unsigned long jiffies;
788 };
789
790 struct ath11k_dp_ring_bp_stats {
791 struct ath11k_bp_stats umac_ring_bp_stats[HTT_SW_UMAC_RING_IDX_MAX];
792 struct ath11k_bp_stats lmac_ring_bp_stats[HTT_SW_LMAC_RING_IDX_MAX][MAX_RADIOS];
793 };
794
795 struct ath11k_soc_dp_tx_err_stats {
796 /* TCL Ring Descriptor unavailable */
797 u32 desc_na[DP_TCL_NUM_RING_MAX];
798 /* Other failures during dp_tx due to mem allocation failure
799 * idr unavailable etc.
800 */
801 atomic_t misc_fail;
802 };
803
804 struct ath11k_soc_dp_stats {
805 u32 err_ring_pkts;
806 u32 invalid_rbm;
807 u32 rxdma_error[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX];
808 u32 reo_error[HAL_REO_DEST_RING_ERROR_CODE_MAX];
809 u32 hal_reo_error[DP_REO_DST_RING_MAX];
810 struct ath11k_soc_dp_tx_err_stats tx_err;
811 struct ath11k_dp_ring_bp_stats bp_stats;
812 };
813
814 struct ath11k_msi_user {
815 char *name;
816 int num_vectors;
817 u32 base_vector;
818 };
819
820 struct ath11k_msi_config {
821 int total_vectors;
822 int total_users;
823 struct ath11k_msi_user *users;
824 u16 hw_rev;
825 };
826
827 /* Master structure to hold the hw data which may be used in core module */
828 struct ath11k_base {
829 enum ath11k_hw_rev hw_rev;
830 struct platform_device *pdev;
831 struct device *dev;
832 struct ath11k_qmi qmi;
833 struct ath11k_wmi_base wmi_ab;
834 struct completion fw_ready;
835 int num_radios;
836 /* HW channel counters frequency value in hertz common to all MACs */
837 u32 cc_freq_hz;
838
839 struct ath11k_htc htc;
840
841 struct ath11k_dp dp;
842
843 void __iomem *mem;
844 unsigned long mem_len;
845
846 struct {
847 enum ath11k_bus bus;
848 const struct ath11k_hif_ops *ops;
849 } hif;
850
851 struct {
852 struct completion wakeup_completed;
853 } wow;
854
855 struct ath11k_ce ce;
856 struct timer_list rx_replenish_retry;
857 struct ath11k_hal hal;
858 /* To synchronize core_start/core_stop */
859 struct mutex core_lock;
860 /* Protects data like peers */
861 spinlock_t base_lock;
862 struct ath11k_pdev pdevs[MAX_RADIOS];
863 struct {
864 enum WMI_HOST_WLAN_BAND supported_bands;
865 u32 pdev_id;
866 } target_pdev_ids[MAX_RADIOS];
867 u8 target_pdev_count;
868 struct ath11k_pdev __rcu *pdevs_active[MAX_RADIOS];
869 struct ath11k_hal_reg_capabilities_ext hal_reg_cap[MAX_RADIOS];
870 unsigned long long free_vdev_map;
871
872 /* To synchronize rhash tbl write operation */
873 struct mutex tbl_mtx_lock;
874
875 /* The rhashtable containing struct ath11k_peer keyed by mac addr */
876 struct rhashtable *rhead_peer_addr;
877 struct rhashtable_params rhash_peer_addr_param;
878
879 /* The rhashtable containing struct ath11k_peer keyed by id */
880 struct rhashtable *rhead_peer_id;
881 struct rhashtable_params rhash_peer_id_param;
882
883 struct list_head peers;
884 wait_queue_head_t peer_mapping_wq;
885 u8 mac_addr[ETH_ALEN];
886 bool wmi_ready;
887 u32 wlan_init_status;
888 int irq_num[ATH11K_IRQ_NUM_MAX];
889 struct ath11k_ext_irq_grp ext_irq_grp[ATH11K_EXT_IRQ_GRP_NUM_MAX];
890 struct ath11k_targ_cap target_caps;
891 u32 ext_service_bitmap[WMI_SERVICE_EXT_BM_SIZE];
892 bool pdevs_macaddr_valid;
893 int bd_api;
894
895 struct ath11k_hw_params hw_params;
896
897 const struct firmware *cal_file;
898
899 /* Below regd's are protected by ab->data_lock */
900 /* This is the regd set for every radio
901 * by the firmware during initialization
902 */
903 struct ieee80211_regdomain *default_regd[MAX_RADIOS];
904 /* This regd is set during dynamic country setting
905 * This may or may not be used during the runtime
906 */
907 struct ieee80211_regdomain *new_regd[MAX_RADIOS];
908
909 /* Current DFS Regulatory */
910 enum ath11k_dfs_region dfs_region;
911 #ifdef CONFIG_ATH11K_DEBUGFS
912 struct dentry *debugfs_soc;
913 struct dentry *debugfs_ath11k;
914 #endif
915 struct ath11k_soc_dp_stats soc_stats;
916
917 unsigned long dev_flags;
918 struct completion driver_recovery;
919 struct workqueue_struct *workqueue;
920 struct work_struct restart_work;
921 struct work_struct update_11d_work;
922 u8 new_alpha2[3];
923 struct workqueue_struct *workqueue_aux;
924 struct work_struct reset_work;
925 atomic_t reset_count;
926 atomic_t recovery_count;
927 atomic_t recovery_start_count;
928 bool is_reset;
929 struct completion reset_complete;
930 struct completion reconfigure_complete;
931 struct completion recovery_start;
932 /* continuous recovery fail count */
933 atomic_t fail_cont_count;
934 unsigned long reset_fail_timeout;
935 struct {
936 /* protected by data_lock */
937 u32 fw_crash_counter;
938 } stats;
939 u32 pktlog_defs_checksum;
940
941 struct ath11k_dbring_cap *db_caps;
942 u32 num_db_cap;
943
944 /* To synchronize 11d scan vdev id */
945 struct mutex vdev_id_11d_lock;
946 struct timer_list mon_reap_timer;
947
948 struct completion htc_suspend;
949
950 struct {
951 enum ath11k_bdf_search bdf_search;
952 u32 vendor;
953 u32 device;
954 u32 subsystem_vendor;
955 u32 subsystem_device;
956 } id;
957
958 struct {
959 struct {
960 const struct ath11k_msi_config *config;
961 u32 ep_base_data;
962 u32 irqs[32];
963 u32 addr_lo;
964 u32 addr_hi;
965 } msi;
966
967 const struct ath11k_pci_ops *ops;
968 } pci;
969
970 /* must be last */
971 u8 drv_priv[] __aligned(sizeof(void *));
972 };
973
974 struct ath11k_fw_stats_pdev {
975 struct list_head list;
976
977 /* PDEV stats */
978 s32 ch_noise_floor;
979 /* Cycles spent transmitting frames */
980 u32 tx_frame_count;
981 /* Cycles spent receiving frames */
982 u32 rx_frame_count;
983 /* Total channel busy time, evidently */
984 u32 rx_clear_count;
985 /* Total on-channel time */
986 u32 cycle_count;
987 u32 phy_err_count;
988 u32 chan_tx_power;
989 u32 ack_rx_bad;
990 u32 rts_bad;
991 u32 rts_good;
992 u32 fcs_bad;
993 u32 no_beacons;
994 u32 mib_int_count;
995
996 /* PDEV TX stats */
997 /* Num HTT cookies queued to dispatch list */
998 s32 comp_queued;
999 /* Num HTT cookies dispatched */
1000 s32 comp_delivered;
1001 /* Num MSDU queued to WAL */
1002 s32 msdu_enqued;
1003 /* Num MPDU queue to WAL */
1004 s32 mpdu_enqued;
1005 /* Num MSDUs dropped by WMM limit */
1006 s32 wmm_drop;
1007 /* Num Local frames queued */
1008 s32 local_enqued;
1009 /* Num Local frames done */
1010 s32 local_freed;
1011 /* Num queued to HW */
1012 s32 hw_queued;
1013 /* Num PPDU reaped from HW */
1014 s32 hw_reaped;
1015 /* Num underruns */
1016 s32 underrun;
1017 /* Num hw paused */
1018 u32 hw_paused;
1019 /* Num PPDUs cleaned up in TX abort */
1020 s32 tx_abort;
1021 /* Num MPDUs requeued by SW */
1022 s32 mpdus_requeued;
1023 /* excessive retries */
1024 u32 tx_ko;
1025 u32 tx_xretry;
1026 /* data hw rate code */
1027 u32 data_rc;
1028 /* Scheduler self triggers */
1029 u32 self_triggers;
1030 /* frames dropped due to excessive sw retries */
1031 u32 sw_retry_failure;
1032 /* illegal rate phy errors */
1033 u32 illgl_rate_phy_err;
1034 /* wal pdev continuous xretry */
1035 u32 pdev_cont_xretry;
1036 /* wal pdev tx timeouts */
1037 u32 pdev_tx_timeout;
1038 /* wal pdev resets */
1039 u32 pdev_resets;
1040 /* frames dropped due to non-availability of stateless TIDs */
1041 u32 stateless_tid_alloc_failure;
1042 /* PhY/BB underrun */
1043 u32 phy_underrun;
1044 /* MPDU is more than txop limit */
1045 u32 txop_ovf;
1046 /* Num sequences posted */
1047 u32 seq_posted;
1048 /* Num sequences failed in queueing */
1049 u32 seq_failed_queueing;
1050 /* Num sequences completed */
1051 u32 seq_completed;
1052 /* Num sequences restarted */
1053 u32 seq_restarted;
1054 /* Num of MU sequences posted */
1055 u32 mu_seq_posted;
1056 /* Num MPDUs flushed by SW, HWPAUSED, SW TXABORT
1057 * (Reset,channel change)
1058 */
1059 s32 mpdus_sw_flush;
1060 /* Num MPDUs filtered by HW, all filter condition (TTL expired) */
1061 s32 mpdus_hw_filter;
1062 /* Num MPDUs truncated by PDG (TXOP, TBTT,
1063 * PPDU_duration based on rate, dyn_bw)
1064 */
1065 s32 mpdus_truncated;
1066 /* Num MPDUs that was tried but didn't receive ACK or BA */
1067 s32 mpdus_ack_failed;
1068 /* Num MPDUs that was dropped du to expiry. */
1069 s32 mpdus_expired;
1070
1071 /* PDEV RX stats */
1072 /* Cnts any change in ring routing mid-ppdu */
1073 s32 mid_ppdu_route_change;
1074 /* Total number of statuses processed */
1075 s32 status_rcvd;
1076 /* Extra frags on rings 0-3 */
1077 s32 r0_frags;
1078 s32 r1_frags;
1079 s32 r2_frags;
1080 s32 r3_frags;
1081 /* MSDUs / MPDUs delivered to HTT */
1082 s32 htt_msdus;
1083 s32 htt_mpdus;
1084 /* MSDUs / MPDUs delivered to local stack */
1085 s32 loc_msdus;
1086 s32 loc_mpdus;
1087 /* AMSDUs that have more MSDUs than the status ring size */
1088 s32 oversize_amsdu;
1089 /* Number of PHY errors */
1090 s32 phy_errs;
1091 /* Number of PHY errors drops */
1092 s32 phy_err_drop;
1093 /* Number of mpdu errors - FCS, MIC, ENC etc. */
1094 s32 mpdu_errs;
1095 /* Num overflow errors */
1096 s32 rx_ovfl_errs;
1097 };
1098
1099 struct ath11k_fw_stats_vdev {
1100 struct list_head list;
1101
1102 u32 vdev_id;
1103 u32 beacon_snr;
1104 u32 data_snr;
1105 u32 num_tx_frames[WLAN_MAX_AC];
1106 u32 num_rx_frames;
1107 u32 num_tx_frames_retries[WLAN_MAX_AC];
1108 u32 num_tx_frames_failures[WLAN_MAX_AC];
1109 u32 num_rts_fail;
1110 u32 num_rts_success;
1111 u32 num_rx_err;
1112 u32 num_rx_discard;
1113 u32 num_tx_not_acked;
1114 u32 tx_rate_history[MAX_TX_RATE_VALUES];
1115 u32 beacon_rssi_history[MAX_TX_RATE_VALUES];
1116 };
1117
1118 struct ath11k_fw_stats_bcn {
1119 struct list_head list;
1120
1121 u32 vdev_id;
1122 u32 tx_bcn_succ_cnt;
1123 u32 tx_bcn_outage_cnt;
1124 };
1125
1126 void ath11k_fw_stats_init(struct ath11k *ar);
1127 void ath11k_fw_stats_pdevs_free(struct list_head *head);
1128 void ath11k_fw_stats_vdevs_free(struct list_head *head);
1129 void ath11k_fw_stats_bcn_free(struct list_head *head);
1130 void ath11k_fw_stats_free(struct ath11k_fw_stats *stats);
1131
1132 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq8074[];
1133 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq8074[];
1134 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq6018[];
1135
1136 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qca6390[];
1137 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qca6390[];
1138
1139 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qcn9074[];
1140 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qcn9074[];
1141 int ath11k_core_qmi_firmware_ready(struct ath11k_base *ab);
1142 int ath11k_core_pre_init(struct ath11k_base *ab);
1143 int ath11k_core_init(struct ath11k_base *ath11k);
1144 void ath11k_core_deinit(struct ath11k_base *ath11k);
1145 struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size,
1146 enum ath11k_bus bus);
1147 void ath11k_core_free(struct ath11k_base *ath11k);
1148 int ath11k_core_fetch_bdf(struct ath11k_base *ath11k,
1149 struct ath11k_board_data *bd);
1150 int ath11k_core_fetch_regdb(struct ath11k_base *ab, struct ath11k_board_data *bd);
1151 int ath11k_core_fetch_board_data_api_1(struct ath11k_base *ab,
1152 struct ath11k_board_data *bd,
1153 const char *name);
1154 void ath11k_core_free_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd);
1155 int ath11k_core_check_dt(struct ath11k_base *ath11k);
1156 int ath11k_core_check_smbios(struct ath11k_base *ab);
1157 void ath11k_core_halt(struct ath11k *ar);
1158 int ath11k_core_resume(struct ath11k_base *ab);
1159 int ath11k_core_suspend(struct ath11k_base *ab);
1160
1161 const struct firmware *ath11k_core_firmware_request(struct ath11k_base *ab,
1162 const char *filename);
1163
ath11k_scan_state_str(enum ath11k_scan_state state)1164 static inline const char *ath11k_scan_state_str(enum ath11k_scan_state state)
1165 {
1166 switch (state) {
1167 case ATH11K_SCAN_IDLE:
1168 return "idle";
1169 case ATH11K_SCAN_STARTING:
1170 return "starting";
1171 case ATH11K_SCAN_RUNNING:
1172 return "running";
1173 case ATH11K_SCAN_ABORTING:
1174 return "aborting";
1175 }
1176
1177 return "unknown";
1178 }
1179
ATH11K_SKB_CB(struct sk_buff * skb)1180 static inline struct ath11k_skb_cb *ATH11K_SKB_CB(struct sk_buff *skb)
1181 {
1182 BUILD_BUG_ON(sizeof(struct ath11k_skb_cb) >
1183 IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
1184 return (struct ath11k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
1185 }
1186
ATH11K_SKB_RXCB(struct sk_buff * skb)1187 static inline struct ath11k_skb_rxcb *ATH11K_SKB_RXCB(struct sk_buff *skb)
1188 {
1189 BUILD_BUG_ON(sizeof(struct ath11k_skb_rxcb) > sizeof(skb->cb));
1190 return (struct ath11k_skb_rxcb *)skb->cb;
1191 }
1192
ath11k_vif_to_arvif(struct ieee80211_vif * vif)1193 static inline struct ath11k_vif *ath11k_vif_to_arvif(struct ieee80211_vif *vif)
1194 {
1195 return (struct ath11k_vif *)vif->drv_priv;
1196 }
1197
ath11k_ab_to_ar(struct ath11k_base * ab,int mac_id)1198 static inline struct ath11k *ath11k_ab_to_ar(struct ath11k_base *ab,
1199 int mac_id)
1200 {
1201 return ab->pdevs[ath11k_hw_mac_id_to_pdev_id(&ab->hw_params, mac_id)].ar;
1202 }
1203
ath11k_core_create_firmware_path(struct ath11k_base * ab,const char * filename,void * buf,size_t buf_len)1204 static inline void ath11k_core_create_firmware_path(struct ath11k_base *ab,
1205 const char *filename,
1206 void *buf, size_t buf_len)
1207 {
1208 snprintf(buf, buf_len, "%s/%s/%s", ATH11K_FW_DIR,
1209 ab->hw_params.fw.dir, filename);
1210 }
1211
ath11k_bus_str(enum ath11k_bus bus)1212 static inline const char *ath11k_bus_str(enum ath11k_bus bus)
1213 {
1214 switch (bus) {
1215 case ATH11K_BUS_PCI:
1216 return "pci";
1217 case ATH11K_BUS_AHB:
1218 return "ahb";
1219 }
1220
1221 return "unknown";
1222 }
1223
1224 #endif /* _CORE_H_ */
1225
