1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Copyright (c) 2014-2015 Hisilicon Limited.
4 */
5
6 #include <linux/io-64-nonatomic-hi-lo.h>
7 #include <linux/of_mdio.h>
8 #include "hns_dsaf_main.h"
9 #include "hns_dsaf_mac.h"
10 #include "hns_dsaf_xgmac.h"
11 #include "hns_dsaf_reg.h"
12
13 static const struct mac_stats_string g_xgmac_stats_string[] = {
14 {"xgmac_tx_bad_pkts_minto64", MAC_STATS_FIELD_OFF(tx_fragment_err)},
15 {"xgmac_tx_good_pkts_minto64", MAC_STATS_FIELD_OFF(tx_undersize)},
16 {"xgmac_tx_total_pkts_minto64", MAC_STATS_FIELD_OFF(tx_under_min_pkts)},
17 {"xgmac_tx_pkts_64", MAC_STATS_FIELD_OFF(tx_64bytes)},
18 {"xgmac_tx_pkts_65to127", MAC_STATS_FIELD_OFF(tx_65to127)},
19 {"xgmac_tx_pkts_128to255", MAC_STATS_FIELD_OFF(tx_128to255)},
20 {"xgmac_tx_pkts_256to511", MAC_STATS_FIELD_OFF(tx_256to511)},
21 {"xgmac_tx_pkts_512to1023", MAC_STATS_FIELD_OFF(tx_512to1023)},
22 {"xgmac_tx_pkts_1024to1518", MAC_STATS_FIELD_OFF(tx_1024to1518)},
23 {"xgmac_tx_pkts_1519tomax", MAC_STATS_FIELD_OFF(tx_1519tomax)},
24 {"xgmac_tx_good_pkts_1519tomax",
25 MAC_STATS_FIELD_OFF(tx_1519tomax_good)},
26 {"xgmac_tx_good_pkts_untralmax", MAC_STATS_FIELD_OFF(tx_oversize)},
27 {"xgmac_tx_bad_pkts_untralmax", MAC_STATS_FIELD_OFF(tx_jabber_err)},
28 {"xgmac_tx_good_pkts_all", MAC_STATS_FIELD_OFF(tx_good_pkts)},
29 {"xgmac_tx_good_byte_all", MAC_STATS_FIELD_OFF(tx_good_bytes)},
30 {"xgmac_tx_total_pkt", MAC_STATS_FIELD_OFF(tx_total_pkts)},
31 {"xgmac_tx_total_byt", MAC_STATS_FIELD_OFF(tx_total_bytes)},
32 {"xgmac_tx_uc_pkt", MAC_STATS_FIELD_OFF(tx_uc_pkts)},
33 {"xgmac_tx_mc_pkt", MAC_STATS_FIELD_OFF(tx_mc_pkts)},
34 {"xgmac_tx_bc_pkt", MAC_STATS_FIELD_OFF(tx_bc_pkts)},
35 {"xgmac_tx_pause_frame_num", MAC_STATS_FIELD_OFF(tx_pfc_tc0)},
36 {"xgmac_tx_pfc_per_1pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc1)},
37 {"xgmac_tx_pfc_per_2pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc2)},
38 {"xgmac_tx_pfc_per_3pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc3)},
39 {"xgmac_tx_pfc_per_4pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc4)},
40 {"xgmac_tx_pfc_per_5pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc5)},
41 {"xgmac_tx_pfc_per_6pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc6)},
42 {"xgmac_tx_pfc_per_7pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc7)},
43 {"xgmac_tx_mac_ctrol_frame", MAC_STATS_FIELD_OFF(tx_ctrl)},
44 {"xgmac_tx_1731_pkts", MAC_STATS_FIELD_OFF(tx_1731_pkts)},
45 {"xgmac_tx_1588_pkts", MAC_STATS_FIELD_OFF(tx_1588_pkts)},
46 {"xgmac_rx_good_pkt_from_dsaf", MAC_STATS_FIELD_OFF(rx_good_from_sw)},
47 {"xgmac_rx_bad_pkt_from_dsaf", MAC_STATS_FIELD_OFF(rx_bad_from_sw)},
48 {"xgmac_tx_bad_pkt_64tomax", MAC_STATS_FIELD_OFF(tx_bad_pkts)},
49
50 {"xgmac_rx_bad_pkts_minto64", MAC_STATS_FIELD_OFF(rx_fragment_err)},
51 {"xgmac_rx_good_pkts_minto64", MAC_STATS_FIELD_OFF(rx_undersize)},
52 {"xgmac_rx_total_pkts_minto64", MAC_STATS_FIELD_OFF(rx_under_min)},
53 {"xgmac_rx_pkt_64", MAC_STATS_FIELD_OFF(rx_64bytes)},
54 {"xgmac_rx_pkt_65to127", MAC_STATS_FIELD_OFF(rx_65to127)},
55 {"xgmac_rx_pkt_128to255", MAC_STATS_FIELD_OFF(rx_128to255)},
56 {"xgmac_rx_pkt_256to511", MAC_STATS_FIELD_OFF(rx_256to511)},
57 {"xgmac_rx_pkt_512to1023", MAC_STATS_FIELD_OFF(rx_512to1023)},
58 {"xgmac_rx_pkt_1024to1518", MAC_STATS_FIELD_OFF(rx_1024to1518)},
59 {"xgmac_rx_pkt_1519tomax", MAC_STATS_FIELD_OFF(rx_1519tomax)},
60 {"xgmac_rx_good_pkt_1519tomax", MAC_STATS_FIELD_OFF(rx_1519tomax_good)},
61 {"xgmac_rx_good_pkt_untramax", MAC_STATS_FIELD_OFF(rx_oversize)},
62 {"xgmac_rx_bad_pkt_untramax", MAC_STATS_FIELD_OFF(rx_jabber_err)},
63 {"xgmac_rx_good_pkt", MAC_STATS_FIELD_OFF(rx_good_pkts)},
64 {"xgmac_rx_good_byt", MAC_STATS_FIELD_OFF(rx_good_bytes)},
65 {"xgmac_rx_pkt", MAC_STATS_FIELD_OFF(rx_total_pkts)},
66 {"xgmac_rx_byt", MAC_STATS_FIELD_OFF(rx_total_bytes)},
67 {"xgmac_rx_uc_pkt", MAC_STATS_FIELD_OFF(rx_uc_pkts)},
68 {"xgmac_rx_mc_pkt", MAC_STATS_FIELD_OFF(rx_mc_pkts)},
69 {"xgmac_rx_bc_pkt", MAC_STATS_FIELD_OFF(rx_bc_pkts)},
70 {"xgmac_rx_pause_frame_num", MAC_STATS_FIELD_OFF(rx_pfc_tc0)},
71 {"xgmac_rx_pfc_per_1pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc1)},
72 {"xgmac_rx_pfc_per_2pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc2)},
73 {"xgmac_rx_pfc_per_3pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc3)},
74 {"xgmac_rx_pfc_per_4pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc4)},
75 {"xgmac_rx_pfc_per_5pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc5)},
76 {"xgmac_rx_pfc_per_6pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc6)},
77 {"xgmac_rx_pfc_per_7pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc7)},
78 {"xgmac_rx_mac_control", MAC_STATS_FIELD_OFF(rx_unknown_ctrl)},
79 {"xgmac_tx_good_pkt_todsaf", MAC_STATS_FIELD_OFF(tx_good_to_sw)},
80 {"xgmac_tx_bad_pkt_todsaf", MAC_STATS_FIELD_OFF(tx_bad_to_sw)},
81 {"xgmac_rx_1731_pkt", MAC_STATS_FIELD_OFF(rx_1731_pkts)},
82 {"xgmac_rx_symbol_err_pkt", MAC_STATS_FIELD_OFF(rx_symbol_err)},
83 {"xgmac_rx_fcs_pkt", MAC_STATS_FIELD_OFF(rx_fcs_err)}
84 };
85
86 /**
87 *hns_xgmac_tx_enable - xgmac port tx enable
88 *@drv: mac driver
89 *@value: value of enable
90 */
hns_xgmac_tx_enable(struct mac_driver * drv,u32 value)91 static void hns_xgmac_tx_enable(struct mac_driver *drv, u32 value)
92 {
93 dsaf_set_dev_bit(drv, XGMAC_MAC_ENABLE_REG, XGMAC_ENABLE_TX_B, !!value);
94 }
95
96 /**
97 *hns_xgmac_rx_enable - xgmac port rx enable
98 *@drv: mac driver
99 *@value: value of enable
100 */
hns_xgmac_rx_enable(struct mac_driver * drv,u32 value)101 static void hns_xgmac_rx_enable(struct mac_driver *drv, u32 value)
102 {
103 dsaf_set_dev_bit(drv, XGMAC_MAC_ENABLE_REG, XGMAC_ENABLE_RX_B, !!value);
104 }
105
106 /**
107 * hns_xgmac_lf_rf_insert - insert lf rf control about xgmac
108 * @mac_drv: mac driver
109 * @mode: inserf rf or lf
110 */
hns_xgmac_lf_rf_insert(struct mac_driver * mac_drv,u32 mode)111 static void hns_xgmac_lf_rf_insert(struct mac_driver *mac_drv, u32 mode)
112 {
113 dsaf_set_dev_field(mac_drv, XGMAC_MAC_TX_LF_RF_CONTROL_REG,
114 XGMAC_LF_RF_INSERT_M, XGMAC_LF_RF_INSERT_S, mode);
115 }
116
117 /**
118 * hns_xgmac_lf_rf_control_init - initial the lf rf control register
119 * @mac_drv: mac driver
120 */
hns_xgmac_lf_rf_control_init(struct mac_driver * mac_drv)121 static void hns_xgmac_lf_rf_control_init(struct mac_driver *mac_drv)
122 {
123 u32 val = 0;
124
125 dsaf_set_bit(val, XGMAC_UNIDIR_EN_B, 0);
126 dsaf_set_bit(val, XGMAC_RF_TX_EN_B, 1);
127 dsaf_set_field(val, XGMAC_LF_RF_INSERT_M, XGMAC_LF_RF_INSERT_S, 0);
128 dsaf_write_dev(mac_drv, XGMAC_MAC_TX_LF_RF_CONTROL_REG, val);
129 }
130
131 /**
132 *hns_xgmac_enable - enable xgmac port
133 *@mac_drv: mac driver
134 *@mode: mode of mac port
135 */
hns_xgmac_enable(void * mac_drv,enum mac_commom_mode mode)136 static void hns_xgmac_enable(void *mac_drv, enum mac_commom_mode mode)
137 {
138 struct mac_driver *drv = (struct mac_driver *)mac_drv;
139
140 hns_xgmac_lf_rf_insert(drv, HNS_XGMAC_NO_LF_RF_INSERT);
141
142 /*enable XGE rX/tX */
143 if (mode == MAC_COMM_MODE_TX) {
144 hns_xgmac_tx_enable(drv, 1);
145 } else if (mode == MAC_COMM_MODE_RX) {
146 hns_xgmac_rx_enable(drv, 1);
147 } else if (mode == MAC_COMM_MODE_RX_AND_TX) {
148 hns_xgmac_tx_enable(drv, 1);
149 hns_xgmac_rx_enable(drv, 1);
150 } else {
151 dev_err(drv->dev, "error mac mode:%d\n", mode);
152 }
153 }
154
155 /**
156 *hns_xgmac_disable - disable xgmac port
157 *@mac_drv: mac driver
158 *@mode: mode of mac port
159 */
hns_xgmac_disable(void * mac_drv,enum mac_commom_mode mode)160 static void hns_xgmac_disable(void *mac_drv, enum mac_commom_mode mode)
161 {
162 struct mac_driver *drv = (struct mac_driver *)mac_drv;
163
164 if (mode == MAC_COMM_MODE_TX) {
165 hns_xgmac_tx_enable(drv, 0);
166 } else if (mode == MAC_COMM_MODE_RX) {
167 hns_xgmac_rx_enable(drv, 0);
168 } else if (mode == MAC_COMM_MODE_RX_AND_TX) {
169 hns_xgmac_tx_enable(drv, 0);
170 hns_xgmac_rx_enable(drv, 0);
171 }
172 hns_xgmac_lf_rf_insert(drv, HNS_XGMAC_LF_INSERT);
173 }
174
175 /**
176 *hns_xgmac_pma_fec_enable - xgmac PMA FEC enable
177 *@drv: mac driver
178 *@tx_value: tx value
179 *@rx_value: rx value
180 *return status
181 */
hns_xgmac_pma_fec_enable(struct mac_driver * drv,u32 tx_value,u32 rx_value)182 static void hns_xgmac_pma_fec_enable(struct mac_driver *drv, u32 tx_value,
183 u32 rx_value)
184 {
185 u32 origin = dsaf_read_dev(drv, XGMAC_PMA_FEC_CONTROL_REG);
186
187 dsaf_set_bit(origin, XGMAC_PMA_FEC_CTL_TX_B, !!tx_value);
188 dsaf_set_bit(origin, XGMAC_PMA_FEC_CTL_RX_B, !!rx_value);
189 dsaf_write_dev(drv, XGMAC_PMA_FEC_CONTROL_REG, origin);
190 }
191
192 /* clr exc irq for xge*/
hns_xgmac_exc_irq_en(struct mac_driver * drv,u32 en)193 static void hns_xgmac_exc_irq_en(struct mac_driver *drv, u32 en)
194 {
195 u32 clr_vlue = 0xfffffffful;
196 u32 msk_vlue = en ? 0xfffffffful : 0; /*1 is en, 0 is dis*/
197
198 dsaf_write_dev(drv, XGMAC_INT_STATUS_REG, clr_vlue);
199 dsaf_write_dev(drv, XGMAC_INT_ENABLE_REG, msk_vlue);
200 }
201
202 /**
203 *hns_xgmac_init - initialize XGE
204 *@mac_drv: mac driver
205 */
hns_xgmac_init(void * mac_drv)206 static void hns_xgmac_init(void *mac_drv)
207 {
208 struct mac_driver *drv = (struct mac_driver *)mac_drv;
209 struct dsaf_device *dsaf_dev
210 = (struct dsaf_device *)dev_get_drvdata(drv->dev);
211 u32 port = drv->mac_id;
212
213 dsaf_dev->misc_op->xge_srst(dsaf_dev, port, 0);
214 msleep(100);
215 dsaf_dev->misc_op->xge_srst(dsaf_dev, port, 1);
216
217 msleep(100);
218 hns_xgmac_lf_rf_control_init(drv);
219 hns_xgmac_exc_irq_en(drv, 0);
220
221 hns_xgmac_pma_fec_enable(drv, 0x0, 0x0);
222
223 hns_xgmac_disable(mac_drv, MAC_COMM_MODE_RX_AND_TX);
224 }
225
226 /**
227 *hns_xgmac_config_pad_and_crc - set xgmac pad and crc enable the same time
228 *@mac_drv: mac driver
229 *@newval:enable of pad and crc
230 */
hns_xgmac_config_pad_and_crc(void * mac_drv,u8 newval)231 static void hns_xgmac_config_pad_and_crc(void *mac_drv, u8 newval)
232 {
233 struct mac_driver *drv = (struct mac_driver *)mac_drv;
234 u32 origin = dsaf_read_dev(drv, XGMAC_MAC_CONTROL_REG);
235
236 dsaf_set_bit(origin, XGMAC_CTL_TX_PAD_B, !!newval);
237 dsaf_set_bit(origin, XGMAC_CTL_TX_FCS_B, !!newval);
238 dsaf_set_bit(origin, XGMAC_CTL_RX_FCS_B, !!newval);
239 dsaf_write_dev(drv, XGMAC_MAC_CONTROL_REG, origin);
240 }
241
242 /**
243 *hns_xgmac_pausefrm_cfg - set pause param about xgmac
244 *@mac_drv: mac driver
245 *@rx_en: enable receive
246 *@tx_en: enable transmit
247 */
hns_xgmac_pausefrm_cfg(void * mac_drv,u32 rx_en,u32 tx_en)248 static void hns_xgmac_pausefrm_cfg(void *mac_drv, u32 rx_en, u32 tx_en)
249 {
250 struct mac_driver *drv = (struct mac_driver *)mac_drv;
251 u32 origin = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_CTRL_REG);
252
253 dsaf_set_bit(origin, XGMAC_PAUSE_CTL_TX_B, !!tx_en);
254 dsaf_set_bit(origin, XGMAC_PAUSE_CTL_RX_B, !!rx_en);
255 dsaf_write_dev(drv, XGMAC_MAC_PAUSE_CTRL_REG, origin);
256 }
257
hns_xgmac_set_pausefrm_mac_addr(void * mac_drv,const char * mac_addr)258 static void hns_xgmac_set_pausefrm_mac_addr(void *mac_drv, const char *mac_addr)
259 {
260 struct mac_driver *drv = (struct mac_driver *)mac_drv;
261
262 u32 high_val = mac_addr[1] | (mac_addr[0] << 8);
263 u32 low_val = mac_addr[5] | (mac_addr[4] << 8)
264 | (mac_addr[3] << 16) | (mac_addr[2] << 24);
265 dsaf_write_dev(drv, XGMAC_MAC_PAUSE_LOCAL_MAC_L_REG, low_val);
266 dsaf_write_dev(drv, XGMAC_MAC_PAUSE_LOCAL_MAC_H_REG, high_val);
267 }
268
269 /**
270 *hns_xgmac_set_tx_auto_pause_frames - set tx pause param about xgmac
271 *@mac_drv: mac driver
272 *@enable:enable tx pause param
273 */
hns_xgmac_set_tx_auto_pause_frames(void * mac_drv,u16 enable)274 static void hns_xgmac_set_tx_auto_pause_frames(void *mac_drv, u16 enable)
275 {
276 struct mac_driver *drv = (struct mac_driver *)mac_drv;
277
278 dsaf_set_dev_bit(drv, XGMAC_MAC_PAUSE_CTRL_REG,
279 XGMAC_PAUSE_CTL_TX_B, !!enable);
280
281 /*if enable is not zero ,set tx pause time */
282 if (enable)
283 dsaf_write_dev(drv, XGMAC_MAC_PAUSE_TIME_REG, enable);
284 }
285
286 /**
287 *hns_xgmac_config_max_frame_length - set xgmac max frame length
288 *@mac_drv: mac driver
289 *@newval:xgmac max frame length
290 */
hns_xgmac_config_max_frame_length(void * mac_drv,u16 newval)291 static void hns_xgmac_config_max_frame_length(void *mac_drv, u16 newval)
292 {
293 struct mac_driver *drv = (struct mac_driver *)mac_drv;
294
295 dsaf_write_dev(drv, XGMAC_MAC_MAX_PKT_SIZE_REG, newval);
296 }
297
hns_xgmac_update_stats(void * mac_drv)298 static void hns_xgmac_update_stats(void *mac_drv)
299 {
300 struct mac_driver *drv = (struct mac_driver *)mac_drv;
301 struct mac_hw_stats *hw_stats = &drv->mac_cb->hw_stats;
302
303 /* TX */
304 hw_stats->tx_fragment_err
305 = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_FRAGMENT);
306 hw_stats->tx_undersize
307 = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_UNDERSIZE);
308 hw_stats->tx_under_min_pkts
309 = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_UNDERMIN);
310 hw_stats->tx_64bytes = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_64OCTETS);
311 hw_stats->tx_65to127
312 = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_65TO127OCTETS);
313 hw_stats->tx_128to255
314 = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_128TO255OCTETS);
315 hw_stats->tx_256to511
316 = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_256TO511OCTETS);
317 hw_stats->tx_512to1023
318 = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_512TO1023OCTETS);
319 hw_stats->tx_1024to1518
320 = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_1024TO1518OCTETS);
321 hw_stats->tx_1519tomax
322 = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_1519TOMAXOCTETS);
323 hw_stats->tx_1519tomax_good
324 = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_1519TOMAXOCTETSOK);
325 hw_stats->tx_oversize = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_OVERSIZE);
326 hw_stats->tx_jabber_err = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_JABBER);
327 hw_stats->tx_good_pkts = hns_mac_reg_read64(drv, XGMAC_TX_GOODPKTS);
328 hw_stats->tx_good_bytes = hns_mac_reg_read64(drv, XGMAC_TX_GOODOCTETS);
329 hw_stats->tx_total_pkts = hns_mac_reg_read64(drv, XGMAC_TX_TOTAL_PKTS);
330 hw_stats->tx_total_bytes
331 = hns_mac_reg_read64(drv, XGMAC_TX_TOTALOCTETS);
332 hw_stats->tx_uc_pkts = hns_mac_reg_read64(drv, XGMAC_TX_UNICASTPKTS);
333 hw_stats->tx_mc_pkts = hns_mac_reg_read64(drv, XGMAC_TX_MULTICASTPKTS);
334 hw_stats->tx_bc_pkts = hns_mac_reg_read64(drv, XGMAC_TX_BROADCASTPKTS);
335 hw_stats->tx_pfc_tc0 = hns_mac_reg_read64(drv, XGMAC_TX_PRI0PAUSEPKTS);
336 hw_stats->tx_pfc_tc1 = hns_mac_reg_read64(drv, XGMAC_TX_PRI1PAUSEPKTS);
337 hw_stats->tx_pfc_tc2 = hns_mac_reg_read64(drv, XGMAC_TX_PRI2PAUSEPKTS);
338 hw_stats->tx_pfc_tc3 = hns_mac_reg_read64(drv, XGMAC_TX_PRI3PAUSEPKTS);
339 hw_stats->tx_pfc_tc4 = hns_mac_reg_read64(drv, XGMAC_TX_PRI4PAUSEPKTS);
340 hw_stats->tx_pfc_tc5 = hns_mac_reg_read64(drv, XGMAC_TX_PRI5PAUSEPKTS);
341 hw_stats->tx_pfc_tc6 = hns_mac_reg_read64(drv, XGMAC_TX_PRI6PAUSEPKTS);
342 hw_stats->tx_pfc_tc7 = hns_mac_reg_read64(drv, XGMAC_TX_PRI7PAUSEPKTS);
343 hw_stats->tx_ctrl = hns_mac_reg_read64(drv, XGMAC_TX_MACCTRLPKTS);
344 hw_stats->tx_1731_pkts = hns_mac_reg_read64(drv, XGMAC_TX_1731PKTS);
345 hw_stats->tx_1588_pkts = hns_mac_reg_read64(drv, XGMAC_TX_1588PKTS);
346 hw_stats->rx_good_from_sw
347 = hns_mac_reg_read64(drv, XGMAC_RX_FROMAPPGOODPKTS);
348 hw_stats->rx_bad_from_sw
349 = hns_mac_reg_read64(drv, XGMAC_RX_FROMAPPBADPKTS);
350 hw_stats->tx_bad_pkts = hns_mac_reg_read64(drv, XGMAC_TX_ERRALLPKTS);
351
352 /* RX */
353 hw_stats->rx_fragment_err
354 = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_FRAGMENT);
355 hw_stats->rx_undersize
356 = hns_mac_reg_read64(drv, XGMAC_RX_PKTSUNDERSIZE);
357 hw_stats->rx_under_min
358 = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_UNDERMIN);
359 hw_stats->rx_64bytes = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_64OCTETS);
360 hw_stats->rx_65to127
361 = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_65TO127OCTETS);
362 hw_stats->rx_128to255
363 = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_128TO255OCTETS);
364 hw_stats->rx_256to511
365 = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_256TO511OCTETS);
366 hw_stats->rx_512to1023
367 = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_512TO1023OCTETS);
368 hw_stats->rx_1024to1518
369 = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_1024TO1518OCTETS);
370 hw_stats->rx_1519tomax
371 = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_1519TOMAXOCTETS);
372 hw_stats->rx_1519tomax_good
373 = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_1519TOMAXOCTETSOK);
374 hw_stats->rx_oversize = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_OVERSIZE);
375 hw_stats->rx_jabber_err = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_JABBER);
376 hw_stats->rx_good_pkts = hns_mac_reg_read64(drv, XGMAC_RX_GOODPKTS);
377 hw_stats->rx_good_bytes = hns_mac_reg_read64(drv, XGMAC_RX_GOODOCTETS);
378 hw_stats->rx_total_pkts = hns_mac_reg_read64(drv, XGMAC_RX_TOTAL_PKTS);
379 hw_stats->rx_total_bytes
380 = hns_mac_reg_read64(drv, XGMAC_RX_TOTALOCTETS);
381 hw_stats->rx_uc_pkts = hns_mac_reg_read64(drv, XGMAC_RX_UNICASTPKTS);
382 hw_stats->rx_mc_pkts = hns_mac_reg_read64(drv, XGMAC_RX_MULTICASTPKTS);
383 hw_stats->rx_bc_pkts = hns_mac_reg_read64(drv, XGMAC_RX_BROADCASTPKTS);
384 hw_stats->rx_pfc_tc0 = hns_mac_reg_read64(drv, XGMAC_RX_PRI0PAUSEPKTS);
385 hw_stats->rx_pfc_tc1 = hns_mac_reg_read64(drv, XGMAC_RX_PRI1PAUSEPKTS);
386 hw_stats->rx_pfc_tc2 = hns_mac_reg_read64(drv, XGMAC_RX_PRI2PAUSEPKTS);
387 hw_stats->rx_pfc_tc3 = hns_mac_reg_read64(drv, XGMAC_RX_PRI3PAUSEPKTS);
388 hw_stats->rx_pfc_tc4 = hns_mac_reg_read64(drv, XGMAC_RX_PRI4PAUSEPKTS);
389 hw_stats->rx_pfc_tc5 = hns_mac_reg_read64(drv, XGMAC_RX_PRI5PAUSEPKTS);
390 hw_stats->rx_pfc_tc6 = hns_mac_reg_read64(drv, XGMAC_RX_PRI6PAUSEPKTS);
391 hw_stats->rx_pfc_tc7 = hns_mac_reg_read64(drv, XGMAC_RX_PRI7PAUSEPKTS);
392
393 hw_stats->rx_unknown_ctrl
394 = hns_mac_reg_read64(drv, XGMAC_RX_MACCTRLPKTS);
395 hw_stats->tx_good_to_sw
396 = hns_mac_reg_read64(drv, XGMAC_TX_SENDAPPGOODPKTS);
397 hw_stats->tx_bad_to_sw
398 = hns_mac_reg_read64(drv, XGMAC_TX_SENDAPPBADPKTS);
399 hw_stats->rx_1731_pkts = hns_mac_reg_read64(drv, XGMAC_RX_1731PKTS);
400 hw_stats->rx_symbol_err
401 = hns_mac_reg_read64(drv, XGMAC_RX_SYMBOLERRPKTS);
402 hw_stats->rx_fcs_err = hns_mac_reg_read64(drv, XGMAC_RX_FCSERRPKTS);
403 }
404
405 /**
406 *hns_xgmac_free - free xgmac driver
407 *@mac_drv: mac driver
408 */
hns_xgmac_free(void * mac_drv)409 static void hns_xgmac_free(void *mac_drv)
410 {
411 struct mac_driver *drv = (struct mac_driver *)mac_drv;
412 struct dsaf_device *dsaf_dev
413 = (struct dsaf_device *)dev_get_drvdata(drv->dev);
414
415 u32 mac_id = drv->mac_id;
416
417 dsaf_dev->misc_op->xge_srst(dsaf_dev, mac_id, 0);
418 }
419
420 /**
421 *hns_xgmac_get_info - get xgmac information
422 *@mac_drv: mac driver
423 *@mac_info:mac information
424 */
hns_xgmac_get_info(void * mac_drv,struct mac_info * mac_info)425 static void hns_xgmac_get_info(void *mac_drv, struct mac_info *mac_info)
426 {
427 struct mac_driver *drv = (struct mac_driver *)mac_drv;
428 u32 pause_time, pause_ctrl, port_mode, ctrl_val;
429
430 ctrl_val = dsaf_read_dev(drv, XGMAC_MAC_CONTROL_REG);
431 mac_info->pad_and_crc_en = dsaf_get_bit(ctrl_val, XGMAC_CTL_TX_PAD_B);
432 mac_info->auto_neg = 0;
433
434 pause_time = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_TIME_REG);
435 mac_info->tx_pause_time = pause_time;
436
437 port_mode = dsaf_read_dev(drv, XGMAC_PORT_MODE_REG);
438 mac_info->port_en = dsaf_get_field(port_mode, XGMAC_PORT_MODE_TX_M,
439 XGMAC_PORT_MODE_TX_S) &&
440 dsaf_get_field(port_mode, XGMAC_PORT_MODE_RX_M,
441 XGMAC_PORT_MODE_RX_S);
442 mac_info->duplex = 1;
443 mac_info->speed = MAC_SPEED_10000;
444
445 pause_ctrl = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_CTRL_REG);
446 mac_info->rx_pause_en = dsaf_get_bit(pause_ctrl, XGMAC_PAUSE_CTL_RX_B);
447 mac_info->tx_pause_en = dsaf_get_bit(pause_ctrl, XGMAC_PAUSE_CTL_TX_B);
448 }
449
450 /**
451 *hns_xgmac_get_pausefrm_cfg - get xgmac pause param
452 *@mac_drv: mac driver
453 *@rx_en:xgmac rx pause enable
454 *@tx_en:xgmac tx pause enable
455 */
hns_xgmac_get_pausefrm_cfg(void * mac_drv,u32 * rx_en,u32 * tx_en)456 static void hns_xgmac_get_pausefrm_cfg(void *mac_drv, u32 *rx_en, u32 *tx_en)
457 {
458 struct mac_driver *drv = (struct mac_driver *)mac_drv;
459 u32 pause_ctrl;
460
461 pause_ctrl = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_CTRL_REG);
462 *rx_en = dsaf_get_bit(pause_ctrl, XGMAC_PAUSE_CTL_RX_B);
463 *tx_en = dsaf_get_bit(pause_ctrl, XGMAC_PAUSE_CTL_TX_B);
464 }
465
466 /**
467 *hns_xgmac_get_link_status - get xgmac link status
468 *@mac_drv: mac driver
469 *@link_stat: xgmac link stat
470 */
hns_xgmac_get_link_status(void * mac_drv,u32 * link_stat)471 static void hns_xgmac_get_link_status(void *mac_drv, u32 *link_stat)
472 {
473 struct mac_driver *drv = (struct mac_driver *)mac_drv;
474
475 *link_stat = dsaf_read_dev(drv, XGMAC_LINK_STATUS_REG);
476 }
477
478 /**
479 *hns_xgmac_get_regs - dump xgmac regs
480 *@mac_drv: mac driver
481 *@data:data for value of regs
482 */
hns_xgmac_get_regs(void * mac_drv,void * data)483 static void hns_xgmac_get_regs(void *mac_drv, void *data)
484 {
485 u32 i;
486 struct mac_driver *drv = (struct mac_driver *)mac_drv;
487 u32 *regs = data;
488 u64 qtmp;
489
490 /* base config registers */
491 regs[0] = dsaf_read_dev(drv, XGMAC_INT_STATUS_REG);
492 regs[1] = dsaf_read_dev(drv, XGMAC_INT_ENABLE_REG);
493 regs[2] = dsaf_read_dev(drv, XGMAC_INT_SET_REG);
494 regs[3] = dsaf_read_dev(drv, XGMAC_IERR_U_INFO_REG);
495 regs[4] = dsaf_read_dev(drv, XGMAC_OVF_INFO_REG);
496 regs[5] = dsaf_read_dev(drv, XGMAC_OVF_CNT_REG);
497 regs[6] = dsaf_read_dev(drv, XGMAC_PORT_MODE_REG);
498 regs[7] = dsaf_read_dev(drv, XGMAC_CLK_ENABLE_REG);
499 regs[8] = dsaf_read_dev(drv, XGMAC_RESET_REG);
500 regs[9] = dsaf_read_dev(drv, XGMAC_LINK_CONTROL_REG);
501 regs[10] = dsaf_read_dev(drv, XGMAC_LINK_STATUS_REG);
502
503 regs[11] = dsaf_read_dev(drv, XGMAC_SPARE_REG);
504 regs[12] = dsaf_read_dev(drv, XGMAC_SPARE_CNT_REG);
505 regs[13] = dsaf_read_dev(drv, XGMAC_MAC_ENABLE_REG);
506 regs[14] = dsaf_read_dev(drv, XGMAC_MAC_CONTROL_REG);
507 regs[15] = dsaf_read_dev(drv, XGMAC_MAC_IPG_REG);
508 regs[16] = dsaf_read_dev(drv, XGMAC_MAC_MSG_CRC_EN_REG);
509 regs[17] = dsaf_read_dev(drv, XGMAC_MAC_MSG_IMG_REG);
510 regs[18] = dsaf_read_dev(drv, XGMAC_MAC_MSG_FC_CFG_REG);
511 regs[19] = dsaf_read_dev(drv, XGMAC_MAC_MSG_TC_CFG_REG);
512 regs[20] = dsaf_read_dev(drv, XGMAC_MAC_PAD_SIZE_REG);
513 regs[21] = dsaf_read_dev(drv, XGMAC_MAC_MIN_PKT_SIZE_REG);
514 regs[22] = dsaf_read_dev(drv, XGMAC_MAC_MAX_PKT_SIZE_REG);
515 regs[23] = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_CTRL_REG);
516 regs[24] = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_TIME_REG);
517 regs[25] = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_GAP_REG);
518 regs[26] = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_LOCAL_MAC_H_REG);
519 regs[27] = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_LOCAL_MAC_L_REG);
520 regs[28] = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_PEER_MAC_H_REG);
521 regs[29] = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_PEER_MAC_L_REG);
522 regs[30] = dsaf_read_dev(drv, XGMAC_MAC_PFC_PRI_EN_REG);
523 regs[31] = dsaf_read_dev(drv, XGMAC_MAC_1588_CTRL_REG);
524 regs[32] = dsaf_read_dev(drv, XGMAC_MAC_1588_TX_PORT_DLY_REG);
525 regs[33] = dsaf_read_dev(drv, XGMAC_MAC_1588_RX_PORT_DLY_REG);
526 regs[34] = dsaf_read_dev(drv, XGMAC_MAC_1588_ASYM_DLY_REG);
527 regs[35] = dsaf_read_dev(drv, XGMAC_MAC_1588_ADJUST_CFG_REG);
528
529 regs[36] = dsaf_read_dev(drv, XGMAC_MAC_Y1731_ETH_TYPE_REG);
530 regs[37] = dsaf_read_dev(drv, XGMAC_MAC_MIB_CONTROL_REG);
531 regs[38] = dsaf_read_dev(drv, XGMAC_MAC_WAN_RATE_ADJUST_REG);
532 regs[39] = dsaf_read_dev(drv, XGMAC_MAC_TX_ERR_MARK_REG);
533 regs[40] = dsaf_read_dev(drv, XGMAC_MAC_TX_LF_RF_CONTROL_REG);
534 regs[41] = dsaf_read_dev(drv, XGMAC_MAC_RX_LF_RF_STATUS_REG);
535 regs[42] = dsaf_read_dev(drv, XGMAC_MAC_TX_RUNT_PKT_CNT_REG);
536 regs[43] = dsaf_read_dev(drv, XGMAC_MAC_RX_RUNT_PKT_CNT_REG);
537 regs[44] = dsaf_read_dev(drv, XGMAC_MAC_RX_PREAM_ERR_PKT_CNT_REG);
538 regs[45] = dsaf_read_dev(drv, XGMAC_MAC_TX_LF_RF_TERM_PKT_CNT_REG);
539 regs[46] = dsaf_read_dev(drv, XGMAC_MAC_TX_SN_MISMATCH_PKT_CNT_REG);
540 regs[47] = dsaf_read_dev(drv, XGMAC_MAC_RX_ERR_MSG_CNT_REG);
541 regs[48] = dsaf_read_dev(drv, XGMAC_MAC_RX_ERR_EFD_CNT_REG);
542 regs[49] = dsaf_read_dev(drv, XGMAC_MAC_ERR_INFO_REG);
543 regs[50] = dsaf_read_dev(drv, XGMAC_MAC_DBG_INFO_REG);
544
545 regs[51] = dsaf_read_dev(drv, XGMAC_PCS_BASER_SYNC_THD_REG);
546 regs[52] = dsaf_read_dev(drv, XGMAC_PCS_STATUS1_REG);
547 regs[53] = dsaf_read_dev(drv, XGMAC_PCS_BASER_STATUS1_REG);
548 regs[54] = dsaf_read_dev(drv, XGMAC_PCS_BASER_STATUS2_REG);
549 regs[55] = dsaf_read_dev(drv, XGMAC_PCS_BASER_SEEDA_0_REG);
550 regs[56] = dsaf_read_dev(drv, XGMAC_PCS_BASER_SEEDA_1_REG);
551 regs[57] = dsaf_read_dev(drv, XGMAC_PCS_BASER_SEEDB_0_REG);
552 regs[58] = dsaf_read_dev(drv, XGMAC_PCS_BASER_SEEDB_1_REG);
553 regs[59] = dsaf_read_dev(drv, XGMAC_PCS_BASER_TEST_CONTROL_REG);
554 regs[60] = dsaf_read_dev(drv, XGMAC_PCS_BASER_TEST_ERR_CNT_REG);
555 regs[61] = dsaf_read_dev(drv, XGMAC_PCS_DBG_INFO_REG);
556 regs[62] = dsaf_read_dev(drv, XGMAC_PCS_DBG_INFO1_REG);
557 regs[63] = dsaf_read_dev(drv, XGMAC_PCS_DBG_INFO2_REG);
558 regs[64] = dsaf_read_dev(drv, XGMAC_PCS_DBG_INFO3_REG);
559
560 regs[65] = dsaf_read_dev(drv, XGMAC_PMA_ENABLE_REG);
561 regs[66] = dsaf_read_dev(drv, XGMAC_PMA_CONTROL_REG);
562 regs[67] = dsaf_read_dev(drv, XGMAC_PMA_SIGNAL_STATUS_REG);
563 regs[68] = dsaf_read_dev(drv, XGMAC_PMA_DBG_INFO_REG);
564 regs[69] = dsaf_read_dev(drv, XGMAC_PMA_FEC_ABILITY_REG);
565 regs[70] = dsaf_read_dev(drv, XGMAC_PMA_FEC_CONTROL_REG);
566 regs[71] = dsaf_read_dev(drv, XGMAC_PMA_FEC_CORR_BLOCK_CNT__REG);
567 regs[72] = dsaf_read_dev(drv, XGMAC_PMA_FEC_UNCORR_BLOCK_CNT__REG);
568
569 /* status registers */
570 #define hns_xgmac_cpy_q(p, q) \
571 do {\
572 *(p) = (u32)(q);\
573 *((p) + 1) = (u32)((q) >> 32);\
574 } while (0)
575
576 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_FRAGMENT);
577 hns_xgmac_cpy_q(®s[73], qtmp);
578 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_UNDERSIZE);
579 hns_xgmac_cpy_q(®s[75], qtmp);
580 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_UNDERMIN);
581 hns_xgmac_cpy_q(®s[77], qtmp);
582 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_64OCTETS);
583 hns_xgmac_cpy_q(®s[79], qtmp);
584 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_65TO127OCTETS);
585 hns_xgmac_cpy_q(®s[81], qtmp);
586 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_128TO255OCTETS);
587 hns_xgmac_cpy_q(®s[83], qtmp);
588 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_256TO511OCTETS);
589 hns_xgmac_cpy_q(®s[85], qtmp);
590 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_512TO1023OCTETS);
591 hns_xgmac_cpy_q(®s[87], qtmp);
592 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_1024TO1518OCTETS);
593 hns_xgmac_cpy_q(®s[89], qtmp);
594 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_1519TOMAXOCTETS);
595 hns_xgmac_cpy_q(®s[91], qtmp);
596 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_1519TOMAXOCTETSOK);
597 hns_xgmac_cpy_q(®s[93], qtmp);
598 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_OVERSIZE);
599 hns_xgmac_cpy_q(®s[95], qtmp);
600 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PKTS_JABBER);
601 hns_xgmac_cpy_q(®s[97], qtmp);
602 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_GOODPKTS);
603 hns_xgmac_cpy_q(®s[99], qtmp);
604 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_GOODOCTETS);
605 hns_xgmac_cpy_q(®s[101], qtmp);
606 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_TOTAL_PKTS);
607 hns_xgmac_cpy_q(®s[103], qtmp);
608 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_TOTALOCTETS);
609 hns_xgmac_cpy_q(®s[105], qtmp);
610 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_UNICASTPKTS);
611 hns_xgmac_cpy_q(®s[107], qtmp);
612 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_MULTICASTPKTS);
613 hns_xgmac_cpy_q(®s[109], qtmp);
614 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_BROADCASTPKTS);
615 hns_xgmac_cpy_q(®s[111], qtmp);
616 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI0PAUSEPKTS);
617 hns_xgmac_cpy_q(®s[113], qtmp);
618 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI1PAUSEPKTS);
619 hns_xgmac_cpy_q(®s[115], qtmp);
620 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI2PAUSEPKTS);
621 hns_xgmac_cpy_q(®s[117], qtmp);
622 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI3PAUSEPKTS);
623 hns_xgmac_cpy_q(®s[119], qtmp);
624 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI4PAUSEPKTS);
625 hns_xgmac_cpy_q(®s[121], qtmp);
626 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI5PAUSEPKTS);
627 hns_xgmac_cpy_q(®s[123], qtmp);
628 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI6PAUSEPKTS);
629 hns_xgmac_cpy_q(®s[125], qtmp);
630 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_PRI7PAUSEPKTS);
631 hns_xgmac_cpy_q(®s[127], qtmp);
632 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_MACCTRLPKTS);
633 hns_xgmac_cpy_q(®s[129], qtmp);
634 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_1731PKTS);
635 hns_xgmac_cpy_q(®s[131], qtmp);
636 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_1588PKTS);
637 hns_xgmac_cpy_q(®s[133], qtmp);
638 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_FROMAPPGOODPKTS);
639 hns_xgmac_cpy_q(®s[135], qtmp);
640 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_FROMAPPBADPKTS);
641 hns_xgmac_cpy_q(®s[137], qtmp);
642 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_ERRALLPKTS);
643 hns_xgmac_cpy_q(®s[139], qtmp);
644
645 /* RX */
646 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_FRAGMENT);
647 hns_xgmac_cpy_q(®s[141], qtmp);
648 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTSUNDERSIZE);
649 hns_xgmac_cpy_q(®s[143], qtmp);
650 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_UNDERMIN);
651 hns_xgmac_cpy_q(®s[145], qtmp);
652 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_64OCTETS);
653 hns_xgmac_cpy_q(®s[147], qtmp);
654 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_65TO127OCTETS);
655 hns_xgmac_cpy_q(®s[149], qtmp);
656 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_128TO255OCTETS);
657 hns_xgmac_cpy_q(®s[151], qtmp);
658 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_256TO511OCTETS);
659 hns_xgmac_cpy_q(®s[153], qtmp);
660 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_512TO1023OCTETS);
661 hns_xgmac_cpy_q(®s[155], qtmp);
662 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_1024TO1518OCTETS);
663 hns_xgmac_cpy_q(®s[157], qtmp);
664 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_1519TOMAXOCTETS);
665 hns_xgmac_cpy_q(®s[159], qtmp);
666 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_1519TOMAXOCTETSOK);
667 hns_xgmac_cpy_q(®s[161], qtmp);
668 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_OVERSIZE);
669 hns_xgmac_cpy_q(®s[163], qtmp);
670 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PKTS_JABBER);
671 hns_xgmac_cpy_q(®s[165], qtmp);
672 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_GOODPKTS);
673 hns_xgmac_cpy_q(®s[167], qtmp);
674 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_GOODOCTETS);
675 hns_xgmac_cpy_q(®s[169], qtmp);
676 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_TOTAL_PKTS);
677 hns_xgmac_cpy_q(®s[171], qtmp);
678 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_TOTALOCTETS);
679 hns_xgmac_cpy_q(®s[173], qtmp);
680 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_UNICASTPKTS);
681 hns_xgmac_cpy_q(®s[175], qtmp);
682 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_MULTICASTPKTS);
683 hns_xgmac_cpy_q(®s[177], qtmp);
684 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_BROADCASTPKTS);
685 hns_xgmac_cpy_q(®s[179], qtmp);
686 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI0PAUSEPKTS);
687 hns_xgmac_cpy_q(®s[181], qtmp);
688 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI1PAUSEPKTS);
689 hns_xgmac_cpy_q(®s[183], qtmp);
690 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI2PAUSEPKTS);
691 hns_xgmac_cpy_q(®s[185], qtmp);
692 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI3PAUSEPKTS);
693 hns_xgmac_cpy_q(®s[187], qtmp);
694 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI4PAUSEPKTS);
695 hns_xgmac_cpy_q(®s[189], qtmp);
696 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI5PAUSEPKTS);
697 hns_xgmac_cpy_q(®s[191], qtmp);
698 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI6PAUSEPKTS);
699 hns_xgmac_cpy_q(®s[193], qtmp);
700 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_PRI7PAUSEPKTS);
701 hns_xgmac_cpy_q(®s[195], qtmp);
702
703 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_MACCTRLPKTS);
704 hns_xgmac_cpy_q(®s[197], qtmp);
705 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_SENDAPPGOODPKTS);
706 hns_xgmac_cpy_q(®s[199], qtmp);
707 qtmp = hns_mac_reg_read64(drv, XGMAC_TX_SENDAPPBADPKTS);
708 hns_xgmac_cpy_q(®s[201], qtmp);
709 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_1731PKTS);
710 hns_xgmac_cpy_q(®s[203], qtmp);
711 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_SYMBOLERRPKTS);
712 hns_xgmac_cpy_q(®s[205], qtmp);
713 qtmp = hns_mac_reg_read64(drv, XGMAC_RX_FCSERRPKTS);
714 hns_xgmac_cpy_q(®s[207], qtmp);
715
716 /* mark end of mac regs */
717 for (i = 208; i < 214; i++)
718 regs[i] = 0xaaaaaaaa;
719 }
720
721 /**
722 *hns_xgmac_get_stats - get xgmac statistic
723 *@mac_drv: mac driver
724 *@data:data for value of stats regs
725 */
hns_xgmac_get_stats(void * mac_drv,u64 * data)726 static void hns_xgmac_get_stats(void *mac_drv, u64 *data)
727 {
728 u32 i;
729 u64 *buf = data;
730 struct mac_driver *drv = (struct mac_driver *)mac_drv;
731 struct mac_hw_stats *hw_stats = NULL;
732
733 hw_stats = &drv->mac_cb->hw_stats;
734
735 for (i = 0; i < ARRAY_SIZE(g_xgmac_stats_string); i++) {
736 buf[i] = DSAF_STATS_READ(hw_stats,
737 g_xgmac_stats_string[i].offset);
738 }
739 }
740
741 /**
742 *hns_xgmac_get_strings - get xgmac strings name
743 *@stringset: type of values in data
744 *@data:data for value of string name
745 */
hns_xgmac_get_strings(u32 stringset,u8 * data)746 static void hns_xgmac_get_strings(u32 stringset, u8 *data)
747 {
748 u8 *buff = data;
749 u32 i;
750
751 if (stringset != ETH_SS_STATS)
752 return;
753
754 for (i = 0; i < ARRAY_SIZE(g_xgmac_stats_string); i++)
755 ethtool_sprintf(&buff, g_xgmac_stats_string[i].desc);
756 }
757
758 /**
759 *hns_xgmac_get_sset_count - get xgmac string set count
760 *@stringset: type of values in data
761 *return xgmac string set count
762 */
hns_xgmac_get_sset_count(int stringset)763 static int hns_xgmac_get_sset_count(int stringset)
764 {
765 if (stringset == ETH_SS_STATS || stringset == ETH_SS_PRIV_FLAGS)
766 return ARRAY_SIZE(g_xgmac_stats_string);
767
768 return 0;
769 }
770
771 /**
772 *hns_xgmac_get_regs_count - get xgmac regs count
773 *return xgmac regs count
774 */
hns_xgmac_get_regs_count(void)775 static int hns_xgmac_get_regs_count(void)
776 {
777 return HNS_XGMAC_DUMP_NUM;
778 }
779
hns_xgmac_config(struct hns_mac_cb * mac_cb,struct mac_params * mac_param)780 void *hns_xgmac_config(struct hns_mac_cb *mac_cb, struct mac_params *mac_param)
781 {
782 struct mac_driver *mac_drv;
783
784 mac_drv = devm_kzalloc(mac_cb->dev, sizeof(*mac_drv), GFP_KERNEL);
785 if (!mac_drv)
786 return NULL;
787
788 mac_drv->mac_init = hns_xgmac_init;
789 mac_drv->mac_enable = hns_xgmac_enable;
790 mac_drv->mac_disable = hns_xgmac_disable;
791
792 mac_drv->mac_id = mac_param->mac_id;
793 mac_drv->mac_mode = mac_param->mac_mode;
794 mac_drv->io_base = mac_param->vaddr;
795 mac_drv->dev = mac_param->dev;
796 mac_drv->mac_cb = mac_cb;
797
798 mac_drv->set_mac_addr = hns_xgmac_set_pausefrm_mac_addr;
799 mac_drv->set_an_mode = NULL;
800 mac_drv->config_loopback = NULL;
801 mac_drv->config_pad_and_crc = hns_xgmac_config_pad_and_crc;
802 mac_drv->mac_free = hns_xgmac_free;
803 mac_drv->adjust_link = NULL;
804 mac_drv->set_tx_auto_pause_frames = hns_xgmac_set_tx_auto_pause_frames;
805 mac_drv->config_max_frame_length = hns_xgmac_config_max_frame_length;
806 mac_drv->mac_pausefrm_cfg = hns_xgmac_pausefrm_cfg;
807 mac_drv->autoneg_stat = NULL;
808 mac_drv->get_info = hns_xgmac_get_info;
809 mac_drv->get_pause_enable = hns_xgmac_get_pausefrm_cfg;
810 mac_drv->get_link_status = hns_xgmac_get_link_status;
811 mac_drv->get_regs = hns_xgmac_get_regs;
812 mac_drv->get_ethtool_stats = hns_xgmac_get_stats;
813 mac_drv->get_sset_count = hns_xgmac_get_sset_count;
814 mac_drv->get_regs_count = hns_xgmac_get_regs_count;
815 mac_drv->get_strings = hns_xgmac_get_strings;
816 mac_drv->update_stats = hns_xgmac_update_stats;
817
818 return (void *)mac_drv;
819 }
820
