1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _M68K_PGTABLE_H
3 #define _M68K_PGTABLE_H
4
5
6 #if defined(CONFIG_SUN3) || defined(CONFIG_COLDFIRE)
7 #include <asm-generic/pgtable-nopmd.h>
8 #else
9 #include <asm-generic/pgtable-nopud.h>
10 #endif
11
12 #include <asm/setup.h>
13
14 #ifndef __ASSEMBLY__
15 #include <asm/processor.h>
16 #include <linux/sched.h>
17 #include <linux/threads.h>
18
19 /*
20 * This file contains the functions and defines necessary to modify and use
21 * the m68k page table tree.
22 */
23
24 #include <asm/virtconvert.h>
25
26 /* Certain architectures need to do special things when pte's
27 * within a page table are directly modified. Thus, the following
28 * hook is made available.
29 */
30 #define set_pte(pteptr, pteval) \
31 do{ \
32 *(pteptr) = (pteval); \
33 } while(0)
34 #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
35
36
37 /* PMD_SHIFT determines the size of the area a second-level page table can map */
38 #if CONFIG_PGTABLE_LEVELS == 3
39 #define PMD_SHIFT 18
40 #endif
41 #define PMD_SIZE (1UL << PMD_SHIFT)
42 #define PMD_MASK (~(PMD_SIZE-1))
43
44 /* PGDIR_SHIFT determines what a third-level page table entry can map */
45 #ifdef CONFIG_SUN3
46 #define PGDIR_SHIFT 17
47 #elif defined(CONFIG_COLDFIRE)
48 #define PGDIR_SHIFT 22
49 #else
50 #define PGDIR_SHIFT 25
51 #endif
52 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
53 #define PGDIR_MASK (~(PGDIR_SIZE-1))
54
55 /*
56 * entries per page directory level: the m68k is configured as three-level,
57 * so we do have PMD level physically.
58 */
59 #ifdef CONFIG_SUN3
60 #define PTRS_PER_PTE 16
61 #define __PAGETABLE_PMD_FOLDED 1
62 #define PTRS_PER_PMD 1
63 #define PTRS_PER_PGD 2048
64 #elif defined(CONFIG_COLDFIRE)
65 #define PTRS_PER_PTE 512
66 #define __PAGETABLE_PMD_FOLDED 1
67 #define PTRS_PER_PMD 1
68 #define PTRS_PER_PGD 1024
69 #else
70 #define PTRS_PER_PTE 64
71 #define PTRS_PER_PMD 128
72 #define PTRS_PER_PGD 128
73 #endif
74 #define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE)
75
76 /* Virtual address region for use by kernel_map() */
77 #ifdef CONFIG_SUN3
78 #define KMAP_START 0x0dc00000
79 #define KMAP_END 0x0e000000
80 #elif defined(CONFIG_COLDFIRE)
81 #define KMAP_START 0xe0000000
82 #define KMAP_END 0xf0000000
83 #elif defined(CONFIG_VIRT)
84 #define KMAP_START 0xdf000000
85 #define KMAP_END 0xff000000
86 #else
87 #define KMAP_START 0xd0000000
88 #define KMAP_END 0xf0000000
89 #endif
90
91 #ifdef CONFIG_SUN3
92 extern unsigned long m68k_vmalloc_end;
93 #define VMALLOC_START 0x0f800000
94 #define VMALLOC_END m68k_vmalloc_end
95 #elif defined(CONFIG_COLDFIRE)
96 #define VMALLOC_START 0xd0000000
97 #define VMALLOC_END 0xe0000000
98 #elif defined(CONFIG_VIRT)
99 #define VMALLOC_OFFSET PAGE_SIZE
100 #define VMALLOC_START (((unsigned long) high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
101 #define VMALLOC_END KMAP_START
102 #else
103 /* Just any arbitrary offset to the start of the vmalloc VM area: the
104 * current 8MB value just means that there will be a 8MB "hole" after the
105 * physical memory until the kernel virtual memory starts. That means that
106 * any out-of-bounds memory accesses will hopefully be caught.
107 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
108 * area for the same reason. ;)
109 */
110 #define VMALLOC_OFFSET (8*1024*1024)
111 #define VMALLOC_START (((unsigned long) high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
112 #define VMALLOC_END KMAP_START
113 #endif
114
115 /* zero page used for uninitialized stuff */
116 extern void *empty_zero_page;
117
118 /*
119 * ZERO_PAGE is a global shared page that is always zero: used
120 * for zero-mapped memory areas etc..
121 */
122 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
123
124 /* number of bits that fit into a memory pointer */
125 #define BITS_PER_PTR (8*sizeof(unsigned long))
126
127 /* to align the pointer to a pointer address */
128 #define PTR_MASK (~(sizeof(void*)-1))
129
130 /* sizeof(void*)==1<<SIZEOF_PTR_LOG2 */
131 /* 64-bit machines, beware! SRB. */
132 #define SIZEOF_PTR_LOG2 2
133
134 extern void kernel_set_cachemode(void *addr, unsigned long size, int cmode);
135
136 /*
137 * The m68k doesn't have any external MMU info: the kernel page
138 * tables contain all the necessary information. The Sun3 does, but
139 * they are updated on demand.
140 */
update_mmu_cache(struct vm_area_struct * vma,unsigned long address,pte_t * ptep)141 static inline void update_mmu_cache(struct vm_area_struct *vma,
142 unsigned long address, pte_t *ptep)
143 {
144 }
145
146 #endif /* !__ASSEMBLY__ */
147
148 #define kern_addr_valid(addr) (1)
149
150 /* MMU-specific headers */
151
152 #ifdef CONFIG_SUN3
153 #include <asm/sun3_pgtable.h>
154 #elif defined(CONFIG_COLDFIRE)
155 #include <asm/mcf_pgtable.h>
156 #else
157 #include <asm/motorola_pgtable.h>
158 #endif
159
160 #ifndef __ASSEMBLY__
161 /*
162 * Macro to mark a page protection value as "uncacheable".
163 */
164 #ifdef CONFIG_COLDFIRE
165 # define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | CF_PAGE_NOCACHE))
166 #else
167 #ifdef SUN3_PAGE_NOCACHE
168 # define __SUN3_PAGE_NOCACHE SUN3_PAGE_NOCACHE
169 #else
170 # define __SUN3_PAGE_NOCACHE 0
171 #endif
172 #define pgprot_noncached(prot) \
173 (MMU_IS_SUN3 \
174 ? (__pgprot(pgprot_val(prot) | __SUN3_PAGE_NOCACHE)) \
175 : ((MMU_IS_851 || MMU_IS_030) \
176 ? (__pgprot(pgprot_val(prot) | _PAGE_NOCACHE030)) \
177 : (MMU_IS_040 || MMU_IS_060) \
178 ? (__pgprot((pgprot_val(prot) & _CACHEMASK040) | _PAGE_NOCACHE_S)) \
179 : (prot)))
180
181 pgprot_t pgprot_dmacoherent(pgprot_t prot);
182 #define pgprot_dmacoherent(prot) pgprot_dmacoherent(prot)
183
184 #endif /* CONFIG_COLDFIRE */
185 #endif /* !__ASSEMBLY__ */
186
187 #endif /* _M68K_PGTABLE_H */
188
