1 // SPDX-License-Identifier: GPL-2.0-only
2 // arch/arm/mach-orion5x/wrt350n-v2-setup.c
3 #include <linux/gpio.h>
4 #include <linux/kernel.h>
5 #include <linux/init.h>
6 #include <linux/platform_device.h>
7 #include <linux/pci.h>
8 #include <linux/irq.h>
9 #include <linux/delay.h>
10 #include <linux/mtd/physmap.h>
11 #include <linux/mv643xx_eth.h>
12 #include <linux/ethtool.h>
13 #include <linux/leds.h>
14 #include <linux/gpio_keys.h>
15 #include <linux/input.h>
16 #include <linux/platform_data/dsa.h>
17 #include <asm/mach-types.h>
18 #include <asm/mach/arch.h>
19 #include <asm/mach/pci.h>
20 #include "orion5x.h"
21 #include "common.h"
22 #include "mpp.h"
23 
24 /*
25  * LEDs attached to GPIO
26  */
27 static struct gpio_led wrt350n_v2_led_pins[] = {
28 	{
29 		.name		= "wrt350nv2:green:power",
30 		.gpio		= 0,
31 		.active_low	= 1,
32 	}, {
33 		.name		= "wrt350nv2:green:security",
34 		.gpio		= 1,
35 		.active_low	= 1,
36 	}, {
37 		.name		= "wrt350nv2:orange:power",
38 		.gpio		= 5,
39 		.active_low	= 1,
40 	}, {
41 		.name		= "wrt350nv2:green:usb",
42 		.gpio		= 6,
43 		.active_low	= 1,
44 	}, {
45 		.name		= "wrt350nv2:green:wireless",
46 		.gpio		= 7,
47 		.active_low	= 1,
48 	},
49 };
50 
51 static struct gpio_led_platform_data wrt350n_v2_led_data = {
52 	.leds		= wrt350n_v2_led_pins,
53 	.num_leds	= ARRAY_SIZE(wrt350n_v2_led_pins),
54 };
55 
56 static struct platform_device wrt350n_v2_leds = {
57 	.name	= "leds-gpio",
58 	.id	= -1,
59 	.dev	= {
60 		.platform_data	= &wrt350n_v2_led_data,
61 	},
62 };
63 
64 /*
65  * Buttons attached to GPIO
66  */
67 static struct gpio_keys_button wrt350n_v2_buttons[] = {
68 	{
69 		.code		= KEY_RESTART,
70 		.gpio		= 3,
71 		.desc		= "Reset Button",
72 		.active_low	= 1,
73 	}, {
74 		.code		= KEY_WPS_BUTTON,
75 		.gpio		= 2,
76 		.desc		= "WPS Button",
77 		.active_low	= 1,
78 	},
79 };
80 
81 static struct gpio_keys_platform_data wrt350n_v2_button_data = {
82 	.buttons	= wrt350n_v2_buttons,
83 	.nbuttons	= ARRAY_SIZE(wrt350n_v2_buttons),
84 };
85 
86 static struct platform_device wrt350n_v2_button_device = {
87 	.name		= "gpio-keys",
88 	.id		= -1,
89 	.num_resources	= 0,
90 	.dev		= {
91 		.platform_data	= &wrt350n_v2_button_data,
92 	},
93 };
94 
95 /*
96  * General setup
97  */
98 static unsigned int wrt350n_v2_mpp_modes[] __initdata = {
99 	MPP0_GPIO,		/* Power LED green (0=on) */
100 	MPP1_GPIO,		/* Security LED (0=on) */
101 	MPP2_GPIO,		/* Internal Button (0=on) */
102 	MPP3_GPIO,		/* Reset Button (0=on) */
103 	MPP4_GPIO,		/* PCI int */
104 	MPP5_GPIO,		/* Power LED orange (0=on) */
105 	MPP6_GPIO,		/* USB LED (0=on) */
106 	MPP7_GPIO,		/* Wireless LED (0=on) */
107 	MPP8_UNUSED,		/* ??? */
108 	MPP9_GIGE,		/* GE_RXERR */
109 	MPP10_UNUSED,		/* ??? */
110 	MPP11_UNUSED,		/* ??? */
111 	MPP12_GIGE,		/* GE_TXD[4] */
112 	MPP13_GIGE,		/* GE_TXD[5] */
113 	MPP14_GIGE,		/* GE_TXD[6] */
114 	MPP15_GIGE,		/* GE_TXD[7] */
115 	MPP16_GIGE,		/* GE_RXD[4] */
116 	MPP17_GIGE,		/* GE_RXD[5] */
117 	MPP18_GIGE,		/* GE_RXD[6] */
118 	MPP19_GIGE,		/* GE_RXD[7] */
119 	0,
120 };
121 
122 /*
123  * 8M NOR flash Device bus boot chip select
124  */
125 #define WRT350N_V2_NOR_BOOT_BASE	0xf4000000
126 #define WRT350N_V2_NOR_BOOT_SIZE	SZ_8M
127 
128 static struct mtd_partition wrt350n_v2_nor_flash_partitions[] = {
129 	{
130 		.name		= "kernel",
131 		.offset		= 0x00000000,
132 		.size		= 0x00760000,
133 	}, {
134 		.name		= "rootfs",
135 		.offset		= 0x001a0000,
136 		.size		= 0x005c0000,
137 	}, {
138 		.name		= "lang",
139 		.offset		= 0x00760000,
140 		.size		= 0x00040000,
141 	}, {
142 		.name		= "nvram",
143 		.offset		= 0x007a0000,
144 		.size		= 0x00020000,
145 	}, {
146 		.name		= "u-boot",
147 		.offset		= 0x007c0000,
148 		.size		= 0x00040000,
149 	},
150 };
151 
152 static struct physmap_flash_data wrt350n_v2_nor_flash_data = {
153 	.width		= 1,
154 	.parts		= wrt350n_v2_nor_flash_partitions,
155 	.nr_parts	= ARRAY_SIZE(wrt350n_v2_nor_flash_partitions),
156 };
157 
158 static struct resource wrt350n_v2_nor_flash_resource = {
159 	.flags		= IORESOURCE_MEM,
160 	.start		= WRT350N_V2_NOR_BOOT_BASE,
161 	.end		= WRT350N_V2_NOR_BOOT_BASE + WRT350N_V2_NOR_BOOT_SIZE - 1,
162 };
163 
164 static struct platform_device wrt350n_v2_nor_flash = {
165 	.name			= "physmap-flash",
166 	.id			= 0,
167 	.dev		= {
168 		.platform_data	= &wrt350n_v2_nor_flash_data,
169 	},
170 	.num_resources		= 1,
171 	.resource		= &wrt350n_v2_nor_flash_resource,
172 };
173 
174 static struct mv643xx_eth_platform_data wrt350n_v2_eth_data = {
175 	.phy_addr	= MV643XX_ETH_PHY_NONE,
176 	.speed		= SPEED_1000,
177 	.duplex		= DUPLEX_FULL,
178 };
179 
180 static struct dsa_chip_data wrt350n_v2_switch_chip_data = {
181 	.port_names[0]	= "lan2",
182 	.port_names[1]	= "lan1",
183 	.port_names[2]	= "wan",
184 	.port_names[3]	= "cpu",
185 	.port_names[5]	= "lan3",
186 	.port_names[7]	= "lan4",
187 };
188 
wrt350n_v2_init(void)189 static void __init wrt350n_v2_init(void)
190 {
191 	/*
192 	 * Setup basic Orion functions. Need to be called early.
193 	 */
194 	orion5x_init();
195 
196 	orion5x_mpp_conf(wrt350n_v2_mpp_modes);
197 
198 	/*
199 	 * Configure peripherals.
200 	 */
201 	orion5x_ehci0_init();
202 	orion5x_eth_init(&wrt350n_v2_eth_data);
203 	orion5x_eth_switch_init(&wrt350n_v2_switch_chip_data);
204 	orion5x_uart0_init();
205 
206 	mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
207 				    ORION_MBUS_DEVBUS_BOOT_ATTR,
208 				    WRT350N_V2_NOR_BOOT_BASE,
209 				    WRT350N_V2_NOR_BOOT_SIZE);
210 	platform_device_register(&wrt350n_v2_nor_flash);
211 	platform_device_register(&wrt350n_v2_leds);
212 	platform_device_register(&wrt350n_v2_button_device);
213 }
214 
wrt350n_v2_pci_map_irq(const struct pci_dev * dev,u8 slot,u8 pin)215 static int __init wrt350n_v2_pci_map_irq(const struct pci_dev *dev, u8 slot,
216 	u8 pin)
217 {
218 	int irq;
219 
220 	/*
221 	 * Check for devices with hard-wired IRQs.
222 	 */
223 	irq = orion5x_pci_map_irq(dev, slot, pin);
224 	if (irq != -1)
225 		return irq;
226 
227 	/*
228 	 * Mini-PCI slot.
229 	 */
230 	if (slot == 7)
231 		return gpio_to_irq(4);
232 
233 	return -1;
234 }
235 
236 static struct hw_pci wrt350n_v2_pci __initdata = {
237 	.nr_controllers	= 2,
238 	.setup		= orion5x_pci_sys_setup,
239 	.scan		= orion5x_pci_sys_scan_bus,
240 	.map_irq	= wrt350n_v2_pci_map_irq,
241 };
242 
wrt350n_v2_pci_init(void)243 static int __init wrt350n_v2_pci_init(void)
244 {
245 	if (machine_is_wrt350n_v2())
246 		pci_common_init(&wrt350n_v2_pci);
247 
248 	return 0;
249 }
250 subsys_initcall(wrt350n_v2_pci_init);
251 
252 MACHINE_START(WRT350N_V2, "Linksys WRT350N v2")
253 	/* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */
254 	.atag_offset	= 0x100,
255 	.nr_irqs	= ORION5X_NR_IRQS,
256 	.init_machine	= wrt350n_v2_init,
257 	.map_io		= orion5x_map_io,
258 	.init_early	= orion5x_init_early,
259 	.init_irq	= orion5x_init_irq,
260 	.init_time	= orion5x_timer_init,
261 	.fixup		= tag_fixup_mem32,
262 	.restart	= orion5x_restart,
263 MACHINE_END
264