1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
4 *
5 * Marvell Orion-VoIP GE Reference Design Setup
6 */
7 #include <linux/gpio.h>
8 #include <linux/kernel.h>
9 #include <linux/init.h>
10 #include <linux/platform_device.h>
11 #include <linux/pci.h>
12 #include <linux/irq.h>
13 #include <linux/mtd/physmap.h>
14 #include <linux/mv643xx_eth.h>
15 #include <linux/ethtool.h>
16 #include <linux/i2c.h>
17 #include <linux/platform_data/dsa.h>
18 #include <asm/mach-types.h>
19 #include <asm/mach/arch.h>
20 #include <asm/mach/pci.h>
21 #include "common.h"
22 #include "mpp.h"
23 #include "orion5x.h"
24
25 /*****************************************************************************
26 * RD-88F5181L GE Info
27 ****************************************************************************/
28 /*
29 * 16M NOR flash Device bus boot chip select
30 */
31 #define RD88F5181L_GE_NOR_BOOT_BASE 0xff000000
32 #define RD88F5181L_GE_NOR_BOOT_SIZE SZ_16M
33
34
35 /*****************************************************************************
36 * 16M NOR Flash on Device bus Boot chip select
37 ****************************************************************************/
38 static struct physmap_flash_data rd88f5181l_ge_nor_boot_flash_data = {
39 .width = 1,
40 };
41
42 static struct resource rd88f5181l_ge_nor_boot_flash_resource = {
43 .flags = IORESOURCE_MEM,
44 .start = RD88F5181L_GE_NOR_BOOT_BASE,
45 .end = RD88F5181L_GE_NOR_BOOT_BASE +
46 RD88F5181L_GE_NOR_BOOT_SIZE - 1,
47 };
48
49 static struct platform_device rd88f5181l_ge_nor_boot_flash = {
50 .name = "physmap-flash",
51 .id = 0,
52 .dev = {
53 .platform_data = &rd88f5181l_ge_nor_boot_flash_data,
54 },
55 .num_resources = 1,
56 .resource = &rd88f5181l_ge_nor_boot_flash_resource,
57 };
58
59
60 /*****************************************************************************
61 * General Setup
62 ****************************************************************************/
63 static unsigned int rd88f5181l_ge_mpp_modes[] __initdata = {
64 MPP0_GPIO, /* LED1 */
65 MPP1_GPIO, /* LED5 */
66 MPP2_GPIO, /* LED4 */
67 MPP3_GPIO, /* LED3 */
68 MPP4_GPIO, /* PCI_intA */
69 MPP5_GPIO, /* RTC interrupt */
70 MPP6_PCI_CLK, /* CPU PCI refclk */
71 MPP7_PCI_CLK, /* PCI/PCIe refclk */
72 MPP8_GPIO, /* 88e6131 interrupt */
73 MPP9_GPIO, /* GE_RXERR */
74 MPP10_GPIO, /* PCI_intB */
75 MPP11_GPIO, /* LED2 */
76 MPP12_GIGE, /* GE_TXD[4] */
77 MPP13_GIGE, /* GE_TXD[5] */
78 MPP14_GIGE, /* GE_TXD[6] */
79 MPP15_GIGE, /* GE_TXD[7] */
80 MPP16_GIGE, /* GE_RXD[4] */
81 MPP17_GIGE, /* GE_RXD[5] */
82 MPP18_GIGE, /* GE_RXD[6] */
83 MPP19_GIGE, /* GE_RXD[7] */
84 0,
85 };
86
87 static struct mv643xx_eth_platform_data rd88f5181l_ge_eth_data = {
88 .phy_addr = MV643XX_ETH_PHY_NONE,
89 .speed = SPEED_1000,
90 .duplex = DUPLEX_FULL,
91 };
92
93 static struct dsa_chip_data rd88f5181l_ge_switch_chip_data = {
94 .port_names[0] = "lan2",
95 .port_names[1] = "lan1",
96 .port_names[2] = "wan",
97 .port_names[3] = "cpu",
98 .port_names[5] = "lan4",
99 .port_names[7] = "lan3",
100 };
101
102 static struct i2c_board_info __initdata rd88f5181l_ge_i2c_rtc = {
103 I2C_BOARD_INFO("ds1338", 0x68),
104 };
105
rd88f5181l_ge_init(void)106 static void __init rd88f5181l_ge_init(void)
107 {
108 /*
109 * Setup basic Orion functions. Need to be called early.
110 */
111 orion5x_init();
112
113 orion5x_mpp_conf(rd88f5181l_ge_mpp_modes);
114
115 /*
116 * Configure peripherals.
117 */
118 orion5x_ehci0_init();
119 orion5x_eth_init(&rd88f5181l_ge_eth_data);
120 orion5x_eth_switch_init(&rd88f5181l_ge_switch_chip_data);
121 orion5x_i2c_init();
122 orion5x_uart0_init();
123
124 mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
125 ORION_MBUS_DEVBUS_BOOT_ATTR,
126 RD88F5181L_GE_NOR_BOOT_BASE,
127 RD88F5181L_GE_NOR_BOOT_SIZE);
128 platform_device_register(&rd88f5181l_ge_nor_boot_flash);
129
130 i2c_register_board_info(0, &rd88f5181l_ge_i2c_rtc, 1);
131 }
132
133 static int __init
rd88f5181l_ge_pci_map_irq(const struct pci_dev * dev,u8 slot,u8 pin)134 rd88f5181l_ge_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
135 {
136 int irq;
137
138 /*
139 * Check for devices with hard-wired IRQs.
140 */
141 irq = orion5x_pci_map_irq(dev, slot, pin);
142 if (irq != -1)
143 return irq;
144
145 /*
146 * Cardbus slot.
147 */
148 if (pin == 1)
149 return gpio_to_irq(4);
150 else
151 return gpio_to_irq(10);
152 }
153
154 static struct hw_pci rd88f5181l_ge_pci __initdata = {
155 .nr_controllers = 2,
156 .setup = orion5x_pci_sys_setup,
157 .scan = orion5x_pci_sys_scan_bus,
158 .map_irq = rd88f5181l_ge_pci_map_irq,
159 };
160
rd88f5181l_ge_pci_init(void)161 static int __init rd88f5181l_ge_pci_init(void)
162 {
163 if (machine_is_rd88f5181l_ge()) {
164 orion5x_pci_set_cardbus_mode();
165 pci_common_init(&rd88f5181l_ge_pci);
166 }
167
168 return 0;
169 }
170 subsys_initcall(rd88f5181l_ge_pci_init);
171
172 MACHINE_START(RD88F5181L_GE, "Marvell Orion-VoIP GE Reference Design")
173 /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */
174 .atag_offset = 0x100,
175 .nr_irqs = ORION5X_NR_IRQS,
176 .init_machine = rd88f5181l_ge_init,
177 .map_io = orion5x_map_io,
178 .init_early = orion5x_init_early,
179 .init_irq = orion5x_init_irq,
180 .init_time = orion5x_timer_init,
181 .fixup = tag_fixup_mem32,
182 .restart = orion5x_restart,
183 MACHINE_END
184
