1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * OMAP7xx specific gpio init
4 *
5 * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/
6 *
7 * Author:
8 * Charulatha V <charu@ti.com>
9 */
10
11 #include <linux/gpio.h>
12 #include <linux/platform_data/gpio-omap.h>
13
14 #include "irqs.h"
15 #include "soc.h"
16
17 #define OMAP7XX_GPIO1_BASE 0xfffbc000
18 #define OMAP7XX_GPIO2_BASE 0xfffbc800
19 #define OMAP7XX_GPIO3_BASE 0xfffbd000
20 #define OMAP7XX_GPIO4_BASE 0xfffbd800
21 #define OMAP7XX_GPIO5_BASE 0xfffbe000
22 #define OMAP7XX_GPIO6_BASE 0xfffbe800
23 #define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE
24
25 /* mpu gpio */
26 static struct resource omap7xx_mpu_gpio_resources[] = {
27 {
28 .start = OMAP1_MPUIO_VBASE,
29 .end = OMAP1_MPUIO_VBASE + SZ_2K - 1,
30 .flags = IORESOURCE_MEM,
31 },
32 {
33 .start = INT_7XX_MPUIO,
34 .flags = IORESOURCE_IRQ,
35 },
36 };
37
38 static struct omap_gpio_reg_offs omap7xx_mpuio_regs = {
39 .revision = USHRT_MAX,
40 .direction = OMAP_MPUIO_IO_CNTL / 2,
41 .datain = OMAP_MPUIO_INPUT_LATCH / 2,
42 .dataout = OMAP_MPUIO_OUTPUT / 2,
43 .irqstatus = OMAP_MPUIO_GPIO_INT / 2,
44 .irqenable = OMAP_MPUIO_GPIO_MASKIT / 2,
45 .irqenable_inv = true,
46 .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE >> 1,
47 };
48
49 static struct omap_gpio_platform_data omap7xx_mpu_gpio_config = {
50 .is_mpuio = true,
51 .bank_width = 16,
52 .bank_stride = 2,
53 .regs = &omap7xx_mpuio_regs,
54 };
55
56 static struct platform_device omap7xx_mpu_gpio = {
57 .name = "omap_gpio",
58 .id = 0,
59 .dev = {
60 .platform_data = &omap7xx_mpu_gpio_config,
61 },
62 .num_resources = ARRAY_SIZE(omap7xx_mpu_gpio_resources),
63 .resource = omap7xx_mpu_gpio_resources,
64 };
65
66 /* gpio1 */
67 static struct resource omap7xx_gpio1_resources[] = {
68 {
69 .start = OMAP7XX_GPIO1_BASE,
70 .end = OMAP7XX_GPIO1_BASE + SZ_2K - 1,
71 .flags = IORESOURCE_MEM,
72 },
73 {
74 .start = INT_7XX_GPIO_BANK1,
75 .flags = IORESOURCE_IRQ,
76 },
77 };
78
79 static struct omap_gpio_reg_offs omap7xx_gpio_regs = {
80 .revision = USHRT_MAX,
81 .direction = OMAP7XX_GPIO_DIR_CONTROL,
82 .datain = OMAP7XX_GPIO_DATA_INPUT,
83 .dataout = OMAP7XX_GPIO_DATA_OUTPUT,
84 .irqstatus = OMAP7XX_GPIO_INT_STATUS,
85 .irqenable = OMAP7XX_GPIO_INT_MASK,
86 .irqenable_inv = true,
87 .irqctrl = OMAP7XX_GPIO_INT_CONTROL,
88 };
89
90 static struct omap_gpio_platform_data omap7xx_gpio1_config = {
91 .bank_width = 32,
92 .regs = &omap7xx_gpio_regs,
93 };
94
95 static struct platform_device omap7xx_gpio1 = {
96 .name = "omap_gpio",
97 .id = 1,
98 .dev = {
99 .platform_data = &omap7xx_gpio1_config,
100 },
101 .num_resources = ARRAY_SIZE(omap7xx_gpio1_resources),
102 .resource = omap7xx_gpio1_resources,
103 };
104
105 /* gpio2 */
106 static struct resource omap7xx_gpio2_resources[] = {
107 {
108 .start = OMAP7XX_GPIO2_BASE,
109 .end = OMAP7XX_GPIO2_BASE + SZ_2K - 1,
110 .flags = IORESOURCE_MEM,
111 },
112 {
113 .start = INT_7XX_GPIO_BANK2,
114 .flags = IORESOURCE_IRQ,
115 },
116 };
117
118 static struct omap_gpio_platform_data omap7xx_gpio2_config = {
119 .bank_width = 32,
120 .regs = &omap7xx_gpio_regs,
121 };
122
123 static struct platform_device omap7xx_gpio2 = {
124 .name = "omap_gpio",
125 .id = 2,
126 .dev = {
127 .platform_data = &omap7xx_gpio2_config,
128 },
129 .num_resources = ARRAY_SIZE(omap7xx_gpio2_resources),
130 .resource = omap7xx_gpio2_resources,
131 };
132
133 /* gpio3 */
134 static struct resource omap7xx_gpio3_resources[] = {
135 {
136 .start = OMAP7XX_GPIO3_BASE,
137 .end = OMAP7XX_GPIO3_BASE + SZ_2K - 1,
138 .flags = IORESOURCE_MEM,
139 },
140 {
141 .start = INT_7XX_GPIO_BANK3,
142 .flags = IORESOURCE_IRQ,
143 },
144 };
145
146 static struct omap_gpio_platform_data omap7xx_gpio3_config = {
147 .bank_width = 32,
148 .regs = &omap7xx_gpio_regs,
149 };
150
151 static struct platform_device omap7xx_gpio3 = {
152 .name = "omap_gpio",
153 .id = 3,
154 .dev = {
155 .platform_data = &omap7xx_gpio3_config,
156 },
157 .num_resources = ARRAY_SIZE(omap7xx_gpio3_resources),
158 .resource = omap7xx_gpio3_resources,
159 };
160
161 /* gpio4 */
162 static struct resource omap7xx_gpio4_resources[] = {
163 {
164 .start = OMAP7XX_GPIO4_BASE,
165 .end = OMAP7XX_GPIO4_BASE + SZ_2K - 1,
166 .flags = IORESOURCE_MEM,
167 },
168 {
169 .start = INT_7XX_GPIO_BANK4,
170 .flags = IORESOURCE_IRQ,
171 },
172 };
173
174 static struct omap_gpio_platform_data omap7xx_gpio4_config = {
175 .bank_width = 32,
176 .regs = &omap7xx_gpio_regs,
177 };
178
179 static struct platform_device omap7xx_gpio4 = {
180 .name = "omap_gpio",
181 .id = 4,
182 .dev = {
183 .platform_data = &omap7xx_gpio4_config,
184 },
185 .num_resources = ARRAY_SIZE(omap7xx_gpio4_resources),
186 .resource = omap7xx_gpio4_resources,
187 };
188
189 /* gpio5 */
190 static struct resource omap7xx_gpio5_resources[] = {
191 {
192 .start = OMAP7XX_GPIO5_BASE,
193 .end = OMAP7XX_GPIO5_BASE + SZ_2K - 1,
194 .flags = IORESOURCE_MEM,
195 },
196 {
197 .start = INT_7XX_GPIO_BANK5,
198 .flags = IORESOURCE_IRQ,
199 },
200 };
201
202 static struct omap_gpio_platform_data omap7xx_gpio5_config = {
203 .bank_width = 32,
204 .regs = &omap7xx_gpio_regs,
205 };
206
207 static struct platform_device omap7xx_gpio5 = {
208 .name = "omap_gpio",
209 .id = 5,
210 .dev = {
211 .platform_data = &omap7xx_gpio5_config,
212 },
213 .num_resources = ARRAY_SIZE(omap7xx_gpio5_resources),
214 .resource = omap7xx_gpio5_resources,
215 };
216
217 /* gpio6 */
218 static struct resource omap7xx_gpio6_resources[] = {
219 {
220 .start = OMAP7XX_GPIO6_BASE,
221 .end = OMAP7XX_GPIO6_BASE + SZ_2K - 1,
222 .flags = IORESOURCE_MEM,
223 },
224 {
225 .start = INT_7XX_GPIO_BANK6,
226 .flags = IORESOURCE_IRQ,
227 },
228 };
229
230 static struct omap_gpio_platform_data omap7xx_gpio6_config = {
231 .bank_width = 32,
232 .regs = &omap7xx_gpio_regs,
233 };
234
235 static struct platform_device omap7xx_gpio6 = {
236 .name = "omap_gpio",
237 .id = 6,
238 .dev = {
239 .platform_data = &omap7xx_gpio6_config,
240 },
241 .num_resources = ARRAY_SIZE(omap7xx_gpio6_resources),
242 .resource = omap7xx_gpio6_resources,
243 };
244
245 static struct platform_device *omap7xx_gpio_dev[] __initdata = {
246 &omap7xx_mpu_gpio,
247 &omap7xx_gpio1,
248 &omap7xx_gpio2,
249 &omap7xx_gpio3,
250 &omap7xx_gpio4,
251 &omap7xx_gpio5,
252 &omap7xx_gpio6,
253 };
254
255 /*
256 * omap7xx_gpio_init needs to be done before
257 * machine_init functions access gpio APIs.
258 * Hence omap7xx_gpio_init is a postcore_initcall.
259 */
omap7xx_gpio_init(void)260 static int __init omap7xx_gpio_init(void)
261 {
262 int i;
263
264 if (!cpu_is_omap7xx())
265 return -EINVAL;
266
267 for (i = 0; i < ARRAY_SIZE(omap7xx_gpio_dev); i++)
268 platform_device_register(omap7xx_gpio_dev[i]);
269
270 return 0;
271 }
272 postcore_initcall(omap7xx_gpio_init);
273
