1// SPDX-License-Identifier: GPL-2.0
2/*
3 * FriendlyARM's Exynos4412 based TINY4412 board device tree source
4 *
5 * Copyright (c) 2013 Alex Ling <kasimling@gmail.com>
6 *
7 * Device tree source file for FriendlyARM's TINY4412 board which is based on
8 * Samsung's Exynos4412 SoC.
9 */
10
11/dts-v1/;
12#include "exynos4412.dtsi"
13#include <dt-bindings/gpio/gpio.h>
14#include <dt-bindings/leds/common.h>
15
16/ {
17	model = "FriendlyARM TINY4412 board based on Exynos4412";
18	compatible = "friendlyarm,tiny4412", "samsung,exynos4412", "samsung,exynos4";
19
20	chosen {
21		stdout-path = &serial_0;
22	};
23
24	memory@40000000 {
25		device_type = "memory";
26		reg = <0x40000000 0x40000000>;
27	};
28
29	leds {
30		compatible = "gpio-leds";
31
32		led1 {
33			label = "led1";
34			function = LED_FUNCTION_HEARTBEAT;
35			gpios = <&gpm4 0 GPIO_ACTIVE_LOW>;
36			default-state = "off";
37			linux,default-trigger = "heartbeat";
38		};
39
40		led2 {
41			label = "led2";
42			gpios = <&gpm4 1 GPIO_ACTIVE_LOW>;
43			default-state = "off";
44		};
45
46		led3 {
47			label = "led3";
48			gpios = <&gpm4 2 GPIO_ACTIVE_LOW>;
49			default-state = "off";
50		};
51
52		led4 {
53			label = "led4";
54			function = LED_FUNCTION_DISK_ACTIVITY;
55			gpios = <&gpm4 3 GPIO_ACTIVE_LOW>;
56			default-state = "off";
57			linux,default-trigger = "mmc0";
58		};
59	};
60
61	fixed-rate-clocks {
62		xxti {
63			compatible = "samsung,clock-xxti";
64			clock-frequency = <0>;
65		};
66
67		xusbxti {
68			compatible = "samsung,clock-xusbxti";
69			clock-frequency = <24000000>;
70		};
71
72		pmic_ap_clk: pmic-ap-clk {
73			/* Workaround for missing clock on PMIC */
74			compatible = "fixed-clock";
75			#clock-cells = <0>;
76			clock-frequency = <32768>;
77		};
78	};
79
80	panel {
81		compatible = "innolux,at070tn92";
82
83		port {
84			panel_input: endpoint {
85				remote-endpoint = <&lcdc_output>;
86			};
87		};
88	};
89};
90
91&cpu_thermal {
92	cooling-maps {
93		cooling_map0: map0 {
94			/* Corresponds to 800MHz at freq_table */
95			cooling-device = <&cpu0 7 7>, <&cpu1 7 7>,
96					 <&cpu2 7 7>, <&cpu3 7 7>;
97		};
98		cooling_map1: map1 {
99			/* Corresponds to 200MHz at freq_table */
100			cooling-device = <&cpu0 13 13>, <&cpu1 13 13>,
101					 <&cpu2 13 13>, <&cpu3 13 13>;
102		};
103	};
104};
105
106&fimd {
107	pinctrl-0 = <&lcd_clk>, <&lcd_data24>;
108	pinctrl-names = "default";
109	#address-cells = <1>;
110	#size-cells = <0>;
111	status = "okay";
112
113	port@3 {
114		reg = <3>;
115		lcdc_output: endpoint {
116			remote-endpoint = <&panel_input>;
117		};
118	};
119};
120
121&rtc {
122	status = "okay";
123	clocks = <&clock CLK_RTC>, <&pmic_ap_clk>;
124	clock-names = "rtc", "rtc_src";
125};
126
127&sdhci_2 {
128	bus-width = <4>;
129	pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
130	pinctrl-names = "default";
131	status = "okay";
132};
133
134&serial_0 {
135	status = "okay";
136};
137
138&serial_1 {
139	status = "okay";
140};
141
142&serial_2 {
143	status = "okay";
144};
145
146&serial_3 {
147	status = "okay";
148};
149