1* Samsung Multi Format Codec (MFC)
2
3Multi Format Codec (MFC) is the IP present in Samsung SoCs which
4supports high resolution decoding and encoding functionalities.
5The MFC device driver is a v4l2 driver which can encode/decode
6video raw/elementary streams and has support for all popular
7video codecs.
8
9Required properties:
10  - compatible : value should be either one among the following
11	(a) "samsung,mfc-v5" for MFC v5 present in Exynos4 SoCs
12	(b) "samsung,mfc-v6" for MFC v6 present in Exynos5 SoCs
13	(c) "samsung,mfc-v7" for MFC v7 present in Exynos5420 SoC
14	(d) "samsung,mfc-v8" for MFC v8 present in Exynos5800 SoC
15	(e) "samsung,exynos5433-mfc" for MFC v8 present in Exynos5433 SoC
16	(f) "samsung,mfc-v10" for MFC v10 present in Exynos7880 SoC
17
18  - reg : Physical base address of the IP registers and length of memory
19	  mapped region.
20
21  - interrupts : MFC interrupt number to the CPU.
22  - clocks : from common clock binding: handle to mfc clock.
23  - clock-names : from common clock binding: must contain "mfc",
24		  corresponding to entry in the clocks property.
25
26Optional properties:
27  - power-domains : power-domain property defined with a phandle
28			   to respective power domain.
29  - memory-region : from reserved memory binding: phandles to two reserved
30	memory regions, first is for "left" mfc memory bus interfaces,
31	second if for the "right" mfc memory bus, used when no SYSMMU
32	support is available; used only by MFC v5 present in Exynos4 SoCs
33
34Obsolete properties:
35  - samsung,mfc-r, samsung,mfc-l : support removed, please use memory-region
36	property instead
37
38
39Example:
40SoC specific DT entry:
41
42mfc: codec@13400000 {
43	compatible = "samsung,mfc-v5";
44	reg = <0x13400000 0x10000>;
45	interrupts = <0 94 0>;
46	power-domains = <&pd_mfc>;
47	clocks = <&clock 273>;
48	clock-names = "mfc";
49};
50
51Reserved memory specific DT entry for given board (see reserved memory binding
52for more information):
53
54reserved-memory {
55	#address-cells = <1>;
56	#size-cells = <1>;
57	ranges;
58
59	mfc_left: region@51000000 {
60		compatible = "shared-dma-pool";
61		no-map;
62		reg = <0x51000000 0x800000>;
63	};
64
65	mfc_right: region@43000000 {
66		compatible = "shared-dma-pool";
67		no-map;
68		reg = <0x43000000 0x800000>;
69	};
70};
71
72Board specific DT entry:
73
74codec@13400000 {
75	memory-region = <&mfc_left>, <&mfc_right>;
76};
77