1[ 2 { 3 "BriefDescription": "read requests to memory controller. Derived from unc_m_cas_count.rd", 4 "Counter": "0,1,2,3", 5 "EventCode": "0x4", 6 "EventName": "LLC_MISSES.MEM_READ", 7 "PerPkg": "1", 8 "ScaleUnit": "64Bytes", 9 "UMask": "0x3", 10 "Unit": "iMC" 11 }, 12 { 13 "BriefDescription": "write requests to memory controller. Derived from unc_m_cas_count.wr", 14 "Counter": "0,1,2,3", 15 "EventCode": "0x4", 16 "EventName": "LLC_MISSES.MEM_WRITE", 17 "PerPkg": "1", 18 "ScaleUnit": "64Bytes", 19 "UMask": "0xC", 20 "Unit": "iMC" 21 }, 22 { 23 "BriefDescription": "Memory controller clock ticks", 24 "Counter": "0,1,2,3", 25 "EventName": "UNC_M_CLOCKTICKS", 26 "PerPkg": "1", 27 "Unit": "iMC" 28 }, 29 { 30 "BriefDescription": "Cycles where DRAM ranks are in power down (CKE) mode+C37", 31 "Counter": "0,1,2,3", 32 "EventCode": "0x85", 33 "EventName": "UNC_M_POWER_CHANNEL_PPD", 34 "MetricExpr": "(UNC_M_POWER_CHANNEL_PPD / UNC_M_CLOCKTICKS) * 100.", 35 "MetricName": "power_channel_ppd %", 36 "PerPkg": "1", 37 "Unit": "iMC" 38 }, 39 { 40 "BriefDescription": "Cycles Memory is in self refresh power mode", 41 "Counter": "0,1,2,3", 42 "EventCode": "0x43", 43 "EventName": "UNC_M_POWER_SELF_REFRESH", 44 "MetricExpr": "(UNC_M_POWER_SELF_REFRESH / UNC_M_CLOCKTICKS) * 100.", 45 "MetricName": "power_self_refresh %", 46 "PerPkg": "1", 47 "Unit": "iMC" 48 }, 49 { 50 "BriefDescription": "Pre-charges due to page misses", 51 "Counter": "0,1,2,3", 52 "EventCode": "0x2", 53 "EventName": "UNC_M_PRE_COUNT.PAGE_MISS", 54 "PerPkg": "1", 55 "UMask": "0x1", 56 "Unit": "iMC" 57 }, 58 { 59 "BriefDescription": "Pre-charge for reads", 60 "Counter": "0,1,2,3", 61 "EventCode": "0x2", 62 "EventName": "UNC_M_PRE_COUNT.RD", 63 "PerPkg": "1", 64 "UMask": "0x4", 65 "Unit": "iMC" 66 }, 67 { 68 "BriefDescription": "Pre-charge for writes", 69 "Counter": "0,1,2,3", 70 "EventCode": "0x2", 71 "EventName": "UNC_M_PRE_COUNT.WR", 72 "PerPkg": "1", 73 "UMask": "0x8", 74 "Unit": "iMC" 75 }, 76 { 77 "BriefDescription": "Intel Optane DC persistent memory bandwidth read (MB/sec). Derived from unc_m_pmm_rpq_inserts", 78 "Counter": "0,1,2,3", 79 "EventCode": "0xE3", 80 "EventName": "UNC_M_PMM_BANDWIDTH.READ", 81 "PerPkg": "1", 82 "ScaleUnit": "6.103515625E-5MB/sec", 83 "Unit": "iMC" 84 }, 85 { 86 "BriefDescription": "Intel Optane DC persistent memory bandwidth write (MB/sec). Derived from unc_m_pmm_wpq_inserts", 87 "Counter": "0,1,2,3", 88 "EventCode": "0xE7", 89 "EventName": "UNC_M_PMM_BANDWIDTH.WRITE", 90 "PerPkg": "1", 91 "ScaleUnit": "6.103515625E-5MB/sec", 92 "Unit": "iMC" 93 }, 94 { 95 "BriefDescription": "Intel Optane DC persistent memory bandwidth total (MB/sec). Derived from unc_m_pmm_rpq_inserts", 96 "Counter": "0,1,2,3", 97 "EventCode": "0xE3", 98 "EventName": "UNC_M_PMM_BANDWIDTH.TOTAL", 99 "MetricExpr": "UNC_M_PMM_RPQ_INSERTS + UNC_M_PMM_WPQ_INSERTS", 100 "MetricName": "UNC_M_PMM_BANDWIDTH.TOTAL", 101 "PerPkg": "1", 102 "ScaleUnit": "6.103515625E-5MB/sec", 103 "Unit": "iMC" 104 }, 105 { 106 "BriefDescription": "Intel Optane DC persistent memory read latency (ns). Derived from unc_m_pmm_rpq_occupancy.all", 107 "Counter": "0,1,2,3", 108 "EventCode": "0xE0", 109 "EventName": "UNC_M_PMM_READ_LATENCY", 110 "MetricExpr": "UNC_M_PMM_RPQ_OCCUPANCY.ALL / UNC_M_PMM_RPQ_INSERTS / UNC_M_CLOCKTICKS", 111 "MetricName": "UNC_M_PMM_READ_LATENCY", 112 "PerPkg": "1", 113 "ScaleUnit": "6000000000ns", 114 "UMask": "0x1", 115 "Unit": "iMC" 116 } 117] 118