1[
2    {
3        "PublicDescription": "Software increment. Instruction architecturally executed (condition code check pass).",
4        "EventCode": "0x00",
5        "EventName": "SW_INCR",
6        "BriefDescription": "Software increment."
7    },
8    {
9        "PublicDescription": "Instruction architecturally executed. This event counts all retired instructions, including those that fail their condition check.",
10        "EventCode": "0x08",
11        "EventName": "INST_RETIRED",
12        "BriefDescription": "Instruction architecturally executed."
13    },
14    {
15        "EventCode": "0x0A",
16        "EventName": "EXC_RETURN",
17        "BriefDescription": "Instruction architecturally executed, condition code check pass, exception return."
18    },
19    {
20        "PublicDescription": "Instruction architecturally executed, condition code check pass, write to CONTEXTIDR. This event only counts writes to CONTEXTIDR in AArch32 state, and via the CONTEXTIDR_EL1 mnemonic in AArch64 state.",
21        "EventCode": "0x0B",
22        "EventName": "CID_WRITE_RETIRED",
23        "BriefDescription": "Instruction architecturally executed, condition code check pass, write to CONTEXTIDR."
24    },
25    {
26        "EventCode": "0x1B",
27        "EventName": "INST_SPEC",
28        "BriefDescription": "Operation speculatively executed"
29    },
30    {
31        "PublicDescription": "Instruction architecturally executed, condition code check pass, write to TTBR. This event only counts writes to TTBR0/TTBR1 in AArch32 state and TTBR0_EL1/TTBR1_EL1 in AArch64 state.",
32        "EventCode": "0x1C",
33        "EventName": "TTBR_WRITE_RETIRED",
34        "BriefDescription": "Instruction architecturally executed, condition code check pass, write to TTBR"
35    },
36    {
37        "PublicDescription": "Instruction architecturally executed, branch. This event counts all branches, taken or not. This excludes exception entries, debug entries and CCFAIL branches.",
38        "EventCode": "0x21",
39        "EventName": "BR_RETIRED",
40        "BriefDescription": "Instruction architecturally executed, branch."
41    },
42    {
43        "PublicDescription": "Instruction architecturally executed, mispredicted branch. This event counts any branch counted by BR_RETIRED which is not correctly predicted and causes a pipeline flush.",
44        "EventCode": "0x22",
45        "EventName": "BR_MIS_PRED_RETIRED",
46        "BriefDescription": "Instruction architecturally executed, mispredicted branch."
47    },
48    {
49        "ArchStdEvent": "ASE_SPEC"
50    },
51    {
52        "ArchStdEvent": "BR_IMMED_SPEC"
53    },
54    {
55        "ArchStdEvent": "BR_INDIRECT_SPEC"
56    },
57    {
58        "ArchStdEvent": "BR_RETURN_SPEC"
59    },
60    {
61        "ArchStdEvent": "CRYPTO_SPEC"
62    },
63    {
64        "ArchStdEvent": "DMB_SPEC"
65    },
66    {
67        "ArchStdEvent": "DP_SPEC"
68    },
69    {
70        "ArchStdEvent": "DSB_SPEC"
71    },
72    {
73        "ArchStdEvent": "ISB_SPEC"
74    },
75    {
76        "ArchStdEvent": "LDREX_SPEC"
77    },
78    {
79        "ArchStdEvent": "LDST_SPEC"
80    },
81    {
82        "ArchStdEvent": "LD_SPEC"
83    },
84    {
85        "ArchStdEvent": "PC_WRITE_SPEC"
86    },
87    {
88        "ArchStdEvent": "RC_LD_SPEC"
89    },
90    {
91        "ArchStdEvent": "RC_ST_SPEC"
92    },
93    {
94        "ArchStdEvent": "STREX_FAIL_SPEC"
95    },
96    {
97        "ArchStdEvent": "STREX_PASS_SPEC"
98    },
99    {
100        "ArchStdEvent": "STREX_SPEC"
101    },
102    {
103        "ArchStdEvent": "ST_SPEC"
104    },
105    {
106        "ArchStdEvent": "VFP_SPEC"
107    }
108]
109