1// SPDX-License-Identifier: GPL-2.0 2/dts-v1/; 3 4#include <dt-bindings/input/input.h> 5#include "tegra20.dtsi" 6 7/ { 8 model = "Compulab TrimSlice board"; 9 compatible = "compulab,trimslice", "nvidia,tegra20"; 10 11 aliases { 12 rtc0 = "/i2c@7000c500/rtc@56"; 13 rtc1 = "/rtc@7000e000"; 14 serial0 = &uarta; 15 }; 16 17 chosen { 18 stdout-path = "serial0:115200n8"; 19 }; 20 21 memory@0 { 22 reg = <0x00000000 0x40000000>; 23 }; 24 25 host1x@50000000 { 26 hdmi@54280000 { 27 status = "okay"; 28 29 vdd-supply = <&hdmi_vdd_reg>; 30 pll-supply = <&hdmi_pll_reg>; 31 32 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 33 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) 34 GPIO_ACTIVE_HIGH>; 35 }; 36 }; 37 38 pinmux@70000014 { 39 pinctrl-names = "default"; 40 pinctrl-0 = <&state_default>; 41 42 state_default: pinmux { 43 ata { 44 nvidia,pins = "ata"; 45 nvidia,function = "ide"; 46 }; 47 atb { 48 nvidia,pins = "atb", "gma"; 49 nvidia,function = "sdio4"; 50 }; 51 atc { 52 nvidia,pins = "atc", "gmb"; 53 nvidia,function = "nand"; 54 }; 55 atd { 56 nvidia,pins = "atd", "ate", "gme", "pta"; 57 nvidia,function = "gmi"; 58 }; 59 cdev1 { 60 nvidia,pins = "cdev1"; 61 nvidia,function = "plla_out"; 62 }; 63 cdev2 { 64 nvidia,pins = "cdev2"; 65 nvidia,function = "pllp_out4"; 66 }; 67 crtp { 68 nvidia,pins = "crtp"; 69 nvidia,function = "crt"; 70 }; 71 csus { 72 nvidia,pins = "csus"; 73 nvidia,function = "vi_sensor_clk"; 74 }; 75 dap1 { 76 nvidia,pins = "dap1"; 77 nvidia,function = "dap1"; 78 }; 79 dap2 { 80 nvidia,pins = "dap2"; 81 nvidia,function = "dap2"; 82 }; 83 dap3 { 84 nvidia,pins = "dap3"; 85 nvidia,function = "dap3"; 86 }; 87 dap4 { 88 nvidia,pins = "dap4"; 89 nvidia,function = "dap4"; 90 }; 91 ddc { 92 nvidia,pins = "ddc"; 93 nvidia,function = "i2c2"; 94 }; 95 dta { 96 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte"; 97 nvidia,function = "vi"; 98 }; 99 dtf { 100 nvidia,pins = "dtf"; 101 nvidia,function = "i2c3"; 102 }; 103 gmc { 104 nvidia,pins = "gmc", "gmd"; 105 nvidia,function = "sflash"; 106 }; 107 gpu { 108 nvidia,pins = "gpu"; 109 nvidia,function = "uarta"; 110 }; 111 gpu7 { 112 nvidia,pins = "gpu7"; 113 nvidia,function = "rtck"; 114 }; 115 gpv { 116 nvidia,pins = "gpv", "slxa", "slxk"; 117 nvidia,function = "pcie"; 118 }; 119 hdint { 120 nvidia,pins = "hdint"; 121 nvidia,function = "hdmi"; 122 }; 123 i2cp { 124 nvidia,pins = "i2cp"; 125 nvidia,function = "i2cp"; 126 }; 127 irrx { 128 nvidia,pins = "irrx", "irtx"; 129 nvidia,function = "uartb"; 130 }; 131 kbca { 132 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd", 133 "kbce", "kbcf"; 134 nvidia,function = "kbc"; 135 }; 136 lcsn { 137 nvidia,pins = "lcsn", "ld0", "ld1", "ld2", 138 "ld3", "ld4", "ld5", "ld6", "ld7", 139 "ld8", "ld9", "ld10", "ld11", "ld12", 140 "ld13", "ld14", "ld15", "ld16", "ld17", 141 "ldc", "ldi", "lhp0", "lhp1", "lhp2", 142 "lhs", "lm0", "lm1", "lpp", "lpw0", 143 "lpw1", "lpw2", "lsc0", "lsc1", "lsck", 144 "lsda", "lsdi", "lspi", "lvp0", "lvp1", 145 "lvs"; 146 nvidia,function = "displaya"; 147 }; 148 owc { 149 nvidia,pins = "owc", "uac"; 150 nvidia,function = "rsvd2"; 151 }; 152 pmc { 153 nvidia,pins = "pmc"; 154 nvidia,function = "pwr_on"; 155 }; 156 rm { 157 nvidia,pins = "rm"; 158 nvidia,function = "i2c1"; 159 }; 160 sdb { 161 nvidia,pins = "sdb", "sdc", "sdd"; 162 nvidia,function = "pwm"; 163 }; 164 sdio1 { 165 nvidia,pins = "sdio1"; 166 nvidia,function = "sdio1"; 167 }; 168 slxc { 169 nvidia,pins = "slxc", "slxd"; 170 nvidia,function = "sdio3"; 171 }; 172 spdi { 173 nvidia,pins = "spdi", "spdo"; 174 nvidia,function = "spdif"; 175 }; 176 spia { 177 nvidia,pins = "spia", "spib", "spic"; 178 nvidia,function = "spi2"; 179 }; 180 spid { 181 nvidia,pins = "spid", "spie", "spif"; 182 nvidia,function = "spi1"; 183 }; 184 spig { 185 nvidia,pins = "spig", "spih"; 186 nvidia,function = "spi2_alt"; 187 }; 188 uaa { 189 nvidia,pins = "uaa", "uab", "uda"; 190 nvidia,function = "ulpi"; 191 }; 192 uad { 193 nvidia,pins = "uad"; 194 nvidia,function = "irda"; 195 }; 196 uca { 197 nvidia,pins = "uca", "ucb"; 198 nvidia,function = "uartc"; 199 }; 200 conf_ata { 201 nvidia,pins = "ata", "atc", "atd", "ate", 202 "crtp", "dap2", "dap3", "dap4", "dta", 203 "dtb", "dtc", "dtd", "dte", "gmb", 204 "gme", "i2cp", "pta", "slxc", "slxd", 205 "spdi", "spdo", "uda"; 206 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 207 nvidia,tristate = <TEGRA_PIN_ENABLE>; 208 }; 209 conf_atb { 210 nvidia,pins = "atb", "cdev1", "cdev2", "dap1", 211 "gma", "gmc", "gmd", "gpu", "gpu7", 212 "gpv", "sdio1", "slxa", "slxk", "uac"; 213 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 214 nvidia,tristate = <TEGRA_PIN_DISABLE>; 215 }; 216 conf_ck32 { 217 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb", 218 "pmcc", "pmcd", "pmce", "xm2c", "xm2d"; 219 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 220 }; 221 conf_csus { 222 nvidia,pins = "csus", "spia", "spib", 223 "spid", "spif"; 224 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 225 nvidia,tristate = <TEGRA_PIN_ENABLE>; 226 }; 227 conf_ddc { 228 nvidia,pins = "ddc", "dtf", "rm", "sdc", "sdd"; 229 nvidia,pull = <TEGRA_PIN_PULL_UP>; 230 nvidia,tristate = <TEGRA_PIN_DISABLE>; 231 }; 232 conf_hdint { 233 nvidia,pins = "hdint", "lcsn", "ldc", "lm1", 234 "lpw1", "lsc1", "lsck", "lsda", "lsdi", 235 "lvp0", "pmc"; 236 nvidia,tristate = <TEGRA_PIN_ENABLE>; 237 }; 238 conf_irrx { 239 nvidia,pins = "irrx", "irtx", "kbca", "kbcb", 240 "kbcc", "kbcd", "kbce", "kbcf", "owc", 241 "spic", "spie", "spig", "spih", "uaa", 242 "uab", "uad", "uca", "ucb"; 243 nvidia,pull = <TEGRA_PIN_PULL_UP>; 244 nvidia,tristate = <TEGRA_PIN_ENABLE>; 245 }; 246 conf_lc { 247 nvidia,pins = "lc", "ls"; 248 nvidia,pull = <TEGRA_PIN_PULL_UP>; 249 }; 250 conf_ld0 { 251 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4", 252 "ld5", "ld6", "ld7", "ld8", "ld9", 253 "ld10", "ld11", "ld12", "ld13", "ld14", 254 "ld15", "ld16", "ld17", "ldi", "lhp0", 255 "lhp1", "lhp2", "lhs", "lm0", "lpp", 256 "lpw0", "lpw2", "lsc0", "lspi", "lvp1", 257 "lvs", "sdb"; 258 nvidia,tristate = <TEGRA_PIN_DISABLE>; 259 }; 260 conf_ld17_0 { 261 nvidia,pins = "ld17_0", "ld19_18", "ld21_20", 262 "ld23_22"; 263 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 264 }; 265 conf_spif { 266 nvidia,pins = "spif"; 267 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 268 nvidia,tristate = <TEGRA_PIN_DISABLE>; 269 }; 270 }; 271 }; 272 273 i2s@70002800 { 274 status = "okay"; 275 }; 276 277 serial@70006000 { 278 status = "okay"; 279 }; 280 281 dvi_ddc: i2c@7000c000 { 282 status = "okay"; 283 clock-frequency = <100000>; 284 }; 285 286 spi@7000c380 { 287 status = "okay"; 288 spi-max-frequency = <48000000>; 289 spi-flash@0 { 290 compatible = "winbond,w25q80bl", "jedec,spi-nor"; 291 reg = <0>; 292 spi-max-frequency = <48000000>; 293 }; 294 }; 295 296 hdmi_ddc: i2c@7000c400 { 297 status = "okay"; 298 clock-frequency = <100000>; 299 }; 300 301 i2c@7000c500 { 302 status = "okay"; 303 clock-frequency = <400000>; 304 305 codec: codec@1a { 306 compatible = "ti,tlv320aic23"; 307 reg = <0x1a>; 308 }; 309 310 rtc@56 { 311 compatible = "emmicro,em3027"; 312 reg = <0x56>; 313 }; 314 }; 315 316 pmc@7000e400 { 317 nvidia,suspend-mode = <1>; 318 nvidia,cpu-pwr-good-time = <5000>; 319 nvidia,cpu-pwr-off-time = <5000>; 320 nvidia,core-pwr-good-time = <3845 3845>; 321 nvidia,core-pwr-off-time = <3875>; 322 nvidia,sys-clock-req-active-high; 323 }; 324 325 pcie@80003000 { 326 status = "okay"; 327 328 avdd-pex-supply = <&pci_vdd_reg>; 329 vdd-pex-supply = <&pci_vdd_reg>; 330 avdd-pex-pll-supply = <&pci_vdd_reg>; 331 avdd-plle-supply = <&pci_vdd_reg>; 332 vddio-pex-clk-supply = <&pci_clk_reg>; 333 334 pci@1,0 { 335 status = "okay"; 336 }; 337 }; 338 339 usb@c5000000 { 340 status = "okay"; 341 }; 342 343 usb-phy@c5000000 { 344 status = "okay"; 345 vbus-supply = <&vbus_reg>; 346 }; 347 348 usb@c5004000 { 349 status = "okay"; 350 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0) 351 GPIO_ACTIVE_LOW>; 352 }; 353 354 usb-phy@c5004000 { 355 status = "okay"; 356 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0) 357 GPIO_ACTIVE_LOW>; 358 }; 359 360 usb@c5008000 { 361 status = "okay"; 362 }; 363 364 usb-phy@c5008000 { 365 status = "okay"; 366 }; 367 368 sdhci@c8000000 { 369 status = "okay"; 370 broken-cd; 371 bus-width = <4>; 372 }; 373 374 sdhci@c8000600 { 375 status = "okay"; 376 cd-gpios = <&gpio TEGRA_GPIO(P, 1) GPIO_ACTIVE_LOW>; 377 wp-gpios = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>; 378 bus-width = <4>; 379 }; 380 381 clocks { 382 compatible = "simple-bus"; 383 #address-cells = <1>; 384 #size-cells = <0>; 385 386 clk32k_in: clock@0 { 387 compatible = "fixed-clock"; 388 reg = <0>; 389 #clock-cells = <0>; 390 clock-frequency = <32768>; 391 }; 392 }; 393 394 gpio-keys { 395 compatible = "gpio-keys"; 396 397 power { 398 label = "Power"; 399 gpios = <&gpio TEGRA_GPIO(X, 6) GPIO_ACTIVE_LOW>; 400 linux,code = <KEY_POWER>; 401 wakeup-source; 402 }; 403 }; 404 405 poweroff { 406 compatible = "gpio-poweroff"; 407 gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>; 408 }; 409 410 regulators { 411 compatible = "simple-bus"; 412 #address-cells = <1>; 413 #size-cells = <0>; 414 415 hdmi_vdd_reg: regulator@0 { 416 compatible = "regulator-fixed"; 417 reg = <0>; 418 regulator-name = "avdd_hdmi"; 419 regulator-min-microvolt = <3300000>; 420 regulator-max-microvolt = <3300000>; 421 regulator-always-on; 422 }; 423 424 hdmi_pll_reg: regulator@1 { 425 compatible = "regulator-fixed"; 426 reg = <1>; 427 regulator-name = "avdd_hdmi_pll"; 428 regulator-min-microvolt = <1800000>; 429 regulator-max-microvolt = <1800000>; 430 regulator-always-on; 431 }; 432 433 vbus_reg: regulator@2 { 434 compatible = "regulator-fixed"; 435 reg = <2>; 436 regulator-name = "usb1_vbus"; 437 regulator-min-microvolt = <5000000>; 438 regulator-max-microvolt = <5000000>; 439 enable-active-high; 440 gpio = <&gpio TEGRA_GPIO(V, 2) 0>; 441 regulator-always-on; 442 regulator-boot-on; 443 }; 444 445 pci_clk_reg: regulator@3 { 446 compatible = "regulator-fixed"; 447 reg = <3>; 448 regulator-name = "pci_clk"; 449 regulator-min-microvolt = <3300000>; 450 regulator-max-microvolt = <3300000>; 451 regulator-always-on; 452 }; 453 454 pci_vdd_reg: regulator@4 { 455 compatible = "regulator-fixed"; 456 reg = <4>; 457 regulator-name = "pci_vdd"; 458 regulator-min-microvolt = <1050000>; 459 regulator-max-microvolt = <1050000>; 460 regulator-always-on; 461 }; 462 }; 463 464 sound { 465 compatible = "nvidia,tegra-audio-trimslice"; 466 nvidia,i2s-controller = <&tegra_i2s1>; 467 nvidia,audio-codec = <&codec>; 468 469 clocks = <&tegra_car TEGRA20_CLK_PLL_A>, 470 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>, 471 <&tegra_car TEGRA20_CLK_CDEV1>; 472 clock-names = "pll_a", "pll_a_out0", "mclk"; 473 }; 474}; 475