1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright 2012 ST-Ericsson AB
4 */
5
6#include <dt-bindings/interrupt-controller/irq.h>
7#include "ste-dbx5x0.dtsi"
8#include "ste-href-family-pinctrl.dtsi"
9
10/ {
11	memory {
12		device_type = "memory";
13		reg = <0x00000000 0x20000000>;
14	};
15
16	soc {
17		uart@80120000 {
18			pinctrl-names = "default", "sleep";
19			pinctrl-0 = <&uart0_default_mode>;
20			pinctrl-1 = <&uart0_sleep_mode>;
21			status = "okay";
22		};
23
24		/* This UART is unused and thus left disabled */
25		uart@80121000 {
26			pinctrl-names = "default", "sleep";
27			pinctrl-0 = <&uart1_default_mode>;
28			pinctrl-1 = <&uart1_sleep_mode>;
29		};
30
31		uart@80007000 {
32			pinctrl-names = "default", "sleep";
33			pinctrl-0 = <&uart2_default_mode>;
34			pinctrl-1 = <&uart2_sleep_mode>;
35			status = "okay";
36		};
37
38		i2c@80004000 {
39			pinctrl-names = "default","sleep";
40			pinctrl-0 = <&i2c0_default_mode>;
41			pinctrl-1 = <&i2c0_sleep_mode>;
42		};
43
44		i2c@80122000 {
45			pinctrl-names = "default","sleep";
46			pinctrl-0 = <&i2c1_default_mode>;
47			pinctrl-1 = <&i2c1_sleep_mode>;
48		};
49
50		i2c@80128000 {
51			pinctrl-names = "default","sleep";
52			pinctrl-0 = <&i2c2_default_mode>;
53			pinctrl-1 = <&i2c2_sleep_mode>;
54			lp5521@33 {
55				compatible = "national,lp5521";
56				reg = <0x33>;
57				label = "lp5521_pri";
58				clock-mode = /bits/ 8 <2>;
59				chan0 {
60					led-cur = /bits/ 8 <0x2f>;
61					max-cur = /bits/ 8 <0x5f>;
62					linux,default-trigger = "heartbeat";
63				};
64				chan1 {
65					led-cur = /bits/ 8 <0x2f>;
66					max-cur = /bits/ 8 <0x5f>;
67				};
68				chan2 {
69					led-cur = /bits/ 8 <0x2f>;
70					max-cur = /bits/ 8 <0x5f>;
71				};
72			};
73			lp5521@34 {
74				compatible = "national,lp5521";
75				reg = <0x34>;
76				label = "lp5521_sec";
77				clock-mode = /bits/ 8 <2>;
78				chan0 {
79					led-cur = /bits/ 8 <0x2f>;
80					max-cur = /bits/ 8 <0x5f>;
81				};
82				chan1 {
83					led-cur = /bits/ 8 <0x2f>;
84					max-cur = /bits/ 8 <0x5f>;
85				};
86				chan2 {
87					led-cur = /bits/ 8 <0x2f>;
88					max-cur = /bits/ 8 <0x5f>;
89				};
90			};
91			bh1780@29 {
92				compatible = "rohm,bh1780gli";
93				reg = <0x29>;
94			};
95		};
96
97		i2c@80110000 {
98			pinctrl-names = "default","sleep";
99			pinctrl-0 = <&i2c3_default_mode>;
100			pinctrl-1 = <&i2c3_sleep_mode>;
101		};
102
103		/* ST6G3244ME level translator for 1.8/2.9 V */
104		vmmci: regulator-gpio {
105			compatible = "regulator-gpio";
106
107			regulator-min-microvolt = <1800000>;
108			regulator-max-microvolt = <2900000>;
109			regulator-name = "mmci-reg";
110			regulator-type = "voltage";
111
112			startup-delay-us = <100>;
113
114			states = <1800000 0x1
115				  2900000 0x0>;
116		};
117
118		// External Micro SD slot
119		sdi0_per1@80126000 {
120			arm,primecell-periphid = <0x10480180>;
121			max-frequency = <100000000>;
122			bus-width = <4>;
123			cap-sd-highspeed;
124			cap-mmc-highspeed;
125			sd-uhs-sdr12;
126			sd-uhs-sdr25;
127			full-pwr-cycle;
128			st,sig-dir-dat0;
129			st,sig-dir-dat2;
130			st,sig-dir-cmd;
131			st,sig-pin-fbclk;
132			vmmc-supply = <&ab8500_ldo_aux3_reg>;
133			vqmmc-supply = <&vmmci>;
134			pinctrl-names = "default", "sleep";
135			pinctrl-0 = <&sdi0_default_mode>;
136			pinctrl-1 = <&sdi0_sleep_mode>;
137
138			status = "okay";
139		};
140
141		// WLAN SDIO channel
142		sdi1_per2@80118000 {
143			arm,primecell-periphid = <0x10480180>;
144			max-frequency = <100000000>;
145			bus-width = <4>;
146			non-removable;
147			pinctrl-names = "default", "sleep";
148			pinctrl-0 = <&sdi1_default_mode>;
149			pinctrl-1 = <&sdi1_sleep_mode>;
150
151			status = "okay";
152		};
153
154		// PoP:ed eMMC
155		sdi2_per3@80005000 {
156			arm,primecell-periphid = <0x10480180>;
157			max-frequency = <100000000>;
158			bus-width = <8>;
159			cap-mmc-highspeed;
160			non-removable;
161			vmmc-supply = <&db8500_vsmps2_reg>;
162			pinctrl-names = "default", "sleep";
163			pinctrl-0 = <&sdi2_default_mode>;
164			pinctrl-1 = <&sdi2_sleep_mode>;
165
166			status = "okay";
167		};
168
169		// On-board eMMC
170		sdi4_per2@80114000 {
171			arm,primecell-periphid = <0x10480180>;
172		        max-frequency = <100000000>;
173			bus-width = <8>;
174			cap-mmc-highspeed;
175			non-removable;
176			vmmc-supply = <&ab8500_ldo_aux2_reg>;
177			pinctrl-names = "default", "sleep";
178			pinctrl-0 = <&sdi4_default_mode>;
179			pinctrl-1 = <&sdi4_sleep_mode>;
180
181			status = "okay";
182		};
183
184		msp0: msp@80123000 {
185			pinctrl-names = "default";
186			pinctrl-0 = <&msp0_default_mode>;
187			status = "okay";
188		};
189
190		msp1: msp@80124000 {
191			pinctrl-names = "default";
192			pinctrl-0 = <&msp1_default_mode>;
193			status = "okay";
194		};
195
196		msp2: msp@80117000 {
197			pinctrl-names = "default";
198			pinctrl-0 = <&msp2_default_mode>;
199		};
200
201		msp3: msp@80125000 {
202			status = "okay";
203		};
204
205		prcmu@80157000 {
206			ab8500 {
207				ab8500-gpio {
208				};
209
210				ab8500_usb {
211					pinctrl-names = "default", "sleep";
212					pinctrl-0 = <&musb_default_mode>;
213					pinctrl-1 = <&musb_sleep_mode>;
214				};
215
216				ab8500-regulators {
217					ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
218						regulator-name = "V-DISPLAY";
219					};
220
221					ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
222						regulator-name = "V-eMMC1";
223					};
224
225					ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
226						regulator-name = "V-MMC-SD";
227					};
228
229					ab8500_ldo_intcore_reg: ab8500_ldo_intcore {
230						regulator-name = "V-INTCORE";
231					};
232
233					ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
234						regulator-name = "V-TVOUT";
235					};
236
237					ab8500_ldo_audio_reg: ab8500_ldo_audio {
238						regulator-name = "V-AUD";
239					};
240
241					ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
242						regulator-name = "V-AMIC1";
243					};
244
245					ab8500_ldo_anamic2_reg: ab8500_ldo_anamic2 {
246						regulator-name = "V-AMIC2";
247					};
248
249					ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
250						regulator-name = "V-DMIC";
251					};
252
253					ab8500_ldo_ana_reg: ab8500_ldo_ana {
254						regulator-name = "V-CSI/DSI";
255					};
256				};
257			};
258		};
259
260		mcde@a0350000 {
261			pinctrl-names = "default", "sleep";
262			pinctrl-0 = <&lcd_default_mode>;
263			pinctrl-1 = <&lcd_sleep_mode>;
264		};
265	};
266};
267