1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the r8a77470 SoC 4 * 5 * Copyright (C) 2018 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/interrupt-controller/irq.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/clock/r8a77470-cpg-mssr.h> 11#include <dt-bindings/power/r8a77470-sysc.h> 12/ { 13 compatible = "renesas,r8a77470"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 aliases { 18 i2c0 = &i2c0; 19 i2c1 = &i2c1; 20 i2c2 = &i2c2; 21 i2c3 = &i2c3; 22 i2c4 = &i2c4; 23 }; 24 25 cpus { 26 #address-cells = <1>; 27 #size-cells = <0>; 28 enable-method = "renesas,apmu"; 29 30 cpu0: cpu@0 { 31 device_type = "cpu"; 32 compatible = "arm,cortex-a7"; 33 reg = <0>; 34 clock-frequency = <1000000000>; 35 clocks = <&cpg CPG_CORE R8A77470_CLK_Z2>; 36 power-domains = <&sysc R8A77470_PD_CA7_CPU0>; 37 next-level-cache = <&L2_CA7>; 38 }; 39 40 cpu1: cpu@1 { 41 device_type = "cpu"; 42 compatible = "arm,cortex-a7"; 43 reg = <1>; 44 clock-frequency = <1000000000>; 45 clocks = <&cpg CPG_CORE R8A77470_CLK_Z2>; 46 power-domains = <&sysc R8A77470_PD_CA7_CPU1>; 47 next-level-cache = <&L2_CA7>; 48 }; 49 50 L2_CA7: cache-controller-0 { 51 compatible = "cache"; 52 cache-unified; 53 cache-level = <2>; 54 power-domains = <&sysc R8A77470_PD_CA7_SCU>; 55 }; 56 }; 57 58 /* External root clock */ 59 extal_clk: extal { 60 compatible = "fixed-clock"; 61 #clock-cells = <0>; 62 /* This value must be overridden by the board. */ 63 clock-frequency = <0>; 64 }; 65 66 pmu { 67 compatible = "arm,cortex-a7-pmu"; 68 interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 69 <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 70 interrupt-affinity = <&cpu0>, <&cpu1>; 71 }; 72 73 /* External SCIF clock */ 74 scif_clk: scif { 75 compatible = "fixed-clock"; 76 #clock-cells = <0>; 77 /* This value must be overridden by the board. */ 78 clock-frequency = <0>; 79 }; 80 81 soc { 82 compatible = "simple-bus"; 83 interrupt-parent = <&gic>; 84 85 #address-cells = <2>; 86 #size-cells = <2>; 87 ranges; 88 89 rwdt: watchdog@e6020000 { 90 compatible = "renesas,r8a77470-wdt", 91 "renesas,rcar-gen2-wdt"; 92 reg = <0 0xe6020000 0 0x0c>; 93 clocks = <&cpg CPG_MOD 402>; 94 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 95 resets = <&cpg 402>; 96 status = "disabled"; 97 }; 98 99 gpio0: gpio@e6050000 { 100 compatible = "renesas,gpio-r8a77470", 101 "renesas,rcar-gen2-gpio"; 102 reg = <0 0xe6050000 0 0x50>; 103 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 104 #gpio-cells = <2>; 105 gpio-controller; 106 gpio-ranges = <&pfc 0 0 23>; 107 #interrupt-cells = <2>; 108 interrupt-controller; 109 clocks = <&cpg CPG_MOD 912>; 110 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 111 resets = <&cpg 912>; 112 }; 113 114 gpio1: gpio@e6051000 { 115 compatible = "renesas,gpio-r8a77470", 116 "renesas,rcar-gen2-gpio"; 117 reg = <0 0xe6051000 0 0x50>; 118 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 119 #gpio-cells = <2>; 120 gpio-controller; 121 gpio-ranges = <&pfc 0 32 23>; 122 #interrupt-cells = <2>; 123 interrupt-controller; 124 clocks = <&cpg CPG_MOD 911>; 125 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 126 resets = <&cpg 911>; 127 }; 128 129 gpio2: gpio@e6052000 { 130 compatible = "renesas,gpio-r8a77470", 131 "renesas,rcar-gen2-gpio"; 132 reg = <0 0xe6052000 0 0x50>; 133 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 134 #gpio-cells = <2>; 135 gpio-controller; 136 gpio-ranges = <&pfc 0 64 32>; 137 #interrupt-cells = <2>; 138 interrupt-controller; 139 clocks = <&cpg CPG_MOD 910>; 140 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 141 resets = <&cpg 910>; 142 }; 143 144 gpio3: gpio@e6053000 { 145 compatible = "renesas,gpio-r8a77470", 146 "renesas,rcar-gen2-gpio"; 147 reg = <0 0xe6053000 0 0x50>; 148 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 149 #gpio-cells = <2>; 150 gpio-controller; 151 gpio-ranges = <&pfc 0 96 30>; 152 gpio-reserved-ranges = <17 10>; 153 #interrupt-cells = <2>; 154 interrupt-controller; 155 clocks = <&cpg CPG_MOD 909>; 156 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 157 resets = <&cpg 909>; 158 }; 159 160 gpio4: gpio@e6054000 { 161 compatible = "renesas,gpio-r8a77470", 162 "renesas,rcar-gen2-gpio"; 163 reg = <0 0xe6054000 0 0x50>; 164 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 165 #gpio-cells = <2>; 166 gpio-controller; 167 gpio-ranges = <&pfc 0 128 26>; 168 #interrupt-cells = <2>; 169 interrupt-controller; 170 clocks = <&cpg CPG_MOD 908>; 171 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 172 resets = <&cpg 908>; 173 }; 174 175 gpio5: gpio@e6055000 { 176 compatible = "renesas,gpio-r8a77470", 177 "renesas,rcar-gen2-gpio"; 178 reg = <0 0xe6055000 0 0x50>; 179 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 180 #gpio-cells = <2>; 181 gpio-controller; 182 gpio-ranges = <&pfc 0 160 32>; 183 #interrupt-cells = <2>; 184 interrupt-controller; 185 clocks = <&cpg CPG_MOD 907>; 186 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 187 resets = <&cpg 907>; 188 }; 189 190 pfc: pin-controller@e6060000 { 191 compatible = "renesas,pfc-r8a77470"; 192 reg = <0 0xe6060000 0 0x118>; 193 }; 194 195 cpg: clock-controller@e6150000 { 196 compatible = "renesas,r8a77470-cpg-mssr"; 197 reg = <0 0xe6150000 0 0x1000>; 198 clocks = <&extal_clk>, <&usb_extal_clk>; 199 clock-names = "extal", "usb_extal"; 200 #clock-cells = <2>; 201 #power-domain-cells = <0>; 202 #reset-cells = <1>; 203 }; 204 205 apmu@e6151000 { 206 compatible = "renesas,r8a77470-apmu", "renesas,apmu"; 207 reg = <0 0xe6151000 0 0x188>; 208 cpus = <&cpu0 &cpu1>; 209 }; 210 211 rst: reset-controller@e6160000 { 212 compatible = "renesas,r8a77470-rst"; 213 reg = <0 0xe6160000 0 0x100>; 214 }; 215 216 sysc: system-controller@e6180000 { 217 compatible = "renesas,r8a77470-sysc"; 218 reg = <0 0xe6180000 0 0x200>; 219 #power-domain-cells = <1>; 220 }; 221 222 irqc: interrupt-controller@e61c0000 { 223 compatible = "renesas,irqc-r8a77470", "renesas,irqc"; 224 #interrupt-cells = <2>; 225 interrupt-controller; 226 reg = <0 0xe61c0000 0 0x200>; 227 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 228 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 229 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 230 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 231 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 232 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, 233 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 234 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, 235 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 236 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 237 clocks = <&cpg CPG_MOD 407>; 238 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 239 resets = <&cpg 407>; 240 }; 241 242 icram0: sram@e63a0000 { 243 compatible = "mmio-sram"; 244 reg = <0 0xe63a0000 0 0x12000>; 245 }; 246 247 icram1: sram@e63c0000 { 248 compatible = "mmio-sram"; 249 reg = <0 0xe63c0000 0 0x1000>; 250 #address-cells = <1>; 251 #size-cells = <1>; 252 ranges = <0 0 0xe63c0000 0x1000>; 253 254 smp-sram@0 { 255 compatible = "renesas,smp-sram"; 256 reg = <0 0x100>; 257 }; 258 }; 259 260 icram2: sram@e6300000 { 261 compatible = "mmio-sram"; 262 reg = <0 0xe6300000 0 0x20000>; 263 }; 264 265 i2c0: i2c@e6508000 { 266 #address-cells = <1>; 267 #size-cells = <0>; 268 compatible = "renesas,i2c-r8a77470", 269 "renesas,rcar-gen2-i2c"; 270 reg = <0 0xe6508000 0 0x40>; 271 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 272 clocks = <&cpg CPG_MOD 931>; 273 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 274 resets = <&cpg 931>; 275 i2c-scl-internal-delay-ns = <6>; 276 status = "disabled"; 277 }; 278 279 i2c1: i2c@e6518000 { 280 #address-cells = <1>; 281 #size-cells = <0>; 282 compatible = "renesas,i2c-r8a77470", 283 "renesas,rcar-gen2-i2c"; 284 reg = <0 0xe6518000 0 0x40>; 285 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 286 clocks = <&cpg CPG_MOD 930>; 287 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 288 resets = <&cpg 930>; 289 i2c-scl-internal-delay-ns = <6>; 290 status = "disabled"; 291 }; 292 293 i2c2: i2c@e6530000 { 294 #address-cells = <1>; 295 #size-cells = <0>; 296 compatible = "renesas,i2c-r8a77470", 297 "renesas,rcar-gen2-i2c"; 298 reg = <0 0xe6530000 0 0x40>; 299 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 300 clocks = <&cpg CPG_MOD 929>; 301 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 302 resets = <&cpg 929>; 303 i2c-scl-internal-delay-ns = <6>; 304 status = "disabled"; 305 }; 306 307 i2c3: i2c@e6540000 { 308 #address-cells = <1>; 309 #size-cells = <0>; 310 compatible = "renesas,i2c-r8a77470", 311 "renesas,rcar-gen2-i2c"; 312 reg = <0 0xe6540000 0 0x40>; 313 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 314 clocks = <&cpg CPG_MOD 928>; 315 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 316 resets = <&cpg 928>; 317 i2c-scl-internal-delay-ns = <6>; 318 status = "disabled"; 319 }; 320 321 i2c4: i2c@e6520000 { 322 #address-cells = <1>; 323 #size-cells = <0>; 324 compatible = "renesas,i2c-r8a77470", 325 "renesas,rcar-gen2-i2c"; 326 reg = <0 0xe6520000 0 0x40>; 327 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 328 clocks = <&cpg CPG_MOD 927>; 329 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 330 resets = <&cpg 927>; 331 i2c-scl-internal-delay-ns = <6>; 332 status = "disabled"; 333 }; 334 335 hsusb0: hsusb@e6590000 { 336 compatible = "renesas,usbhs-r8a77470", 337 "renesas,rcar-gen2-usbhs"; 338 reg = <0 0xe6590000 0 0x100>; 339 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 340 clocks = <&cpg CPG_MOD 704>; 341 dmas = <&usb_dmac00 0>, <&usb_dmac00 1>, 342 <&usb_dmac10 0>, <&usb_dmac10 1>; 343 dma-names = "ch0", "ch1", "ch2", "ch3"; 344 renesas,buswait = <4>; 345 phys = <&usb0 1>; 346 phy-names = "usb"; 347 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 348 resets = <&cpg 704>; 349 status = "disabled"; 350 }; 351 352 usbphy0: usb-phy@e6590100 { 353 compatible = "renesas,usb-phy-r8a77470", 354 "renesas,rcar-gen2-usb-phy"; 355 reg = <0 0xe6590100 0 0x100>; 356 #address-cells = <1>; 357 #size-cells = <0>; 358 clocks = <&cpg CPG_MOD 704>; 359 clock-names = "usbhs"; 360 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 361 resets = <&cpg 704>; 362 status = "disabled"; 363 364 usb0: usb-channel@0 { 365 reg = <0>; 366 #phy-cells = <1>; 367 }; 368 }; 369 370 hsusb1: hsusb@e6598000 { 371 compatible = "renesas,usbhs-r8a77470", 372 "renesas,rcar-gen2-usbhs"; 373 reg = <0 0xe6598000 0 0x100>; 374 interrupts = <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>; 375 clocks = <&cpg CPG_MOD 706>; 376 dmas = <&usb_dmac01 0>, <&usb_dmac01 1>, 377 <&usb_dmac11 0>, <&usb_dmac11 1>; 378 dma-names = "ch0", "ch1", "ch2", "ch3"; 379 renesas,buswait = <4>; 380 /* We need to turn on usbphy0 to make usbphy1 to work */ 381 phys = <&usb1 1>; 382 phy-names = "usb"; 383 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 384 resets = <&cpg 706>; 385 status = "disabled"; 386 }; 387 388 usbphy1: usb-phy@e6598100 { 389 compatible = "renesas,usb-phy-r8a77470", 390 "renesas,rcar-gen2-usb-phy"; 391 reg = <0 0xe6598100 0 0x100>; 392 #address-cells = <1>; 393 #size-cells = <0>; 394 clocks = <&cpg CPG_MOD 706>; 395 clock-names = "usbhs"; 396 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 397 resets = <&cpg 706>; 398 status = "disabled"; 399 400 usb1: usb-channel@0 { 401 reg = <0>; 402 #phy-cells = <1>; 403 }; 404 }; 405 406 usb_dmac00: dma-controller@e65a0000 { 407 compatible = "renesas,r8a77470-usb-dmac", 408 "renesas,usb-dmac"; 409 reg = <0 0xe65a0000 0 0x100>; 410 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 411 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 412 interrupt-names = "ch0", "ch1"; 413 clocks = <&cpg CPG_MOD 330>; 414 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 415 resets = <&cpg 330>; 416 #dma-cells = <1>; 417 dma-channels = <2>; 418 }; 419 420 usb_dmac10: dma-controller@e65b0000 { 421 compatible = "renesas,r8a77470-usb-dmac", 422 "renesas,usb-dmac"; 423 reg = <0 0xe65b0000 0 0x100>; 424 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 425 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 426 interrupt-names = "ch0", "ch1"; 427 clocks = <&cpg CPG_MOD 331>; 428 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 429 resets = <&cpg 331>; 430 #dma-cells = <1>; 431 dma-channels = <2>; 432 }; 433 434 usb_dmac01: dma-controller@e65a8000 { 435 compatible = "renesas,r8a77470-usb-dmac", 436 "renesas,usb-dmac"; 437 reg = <0 0xe65a8000 0 0x100>; 438 interrupts = <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH 439 GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>; 440 interrupt-names = "ch0", "ch1"; 441 clocks = <&cpg CPG_MOD 326>; 442 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 443 resets = <&cpg 326>; 444 #dma-cells = <1>; 445 dma-channels = <2>; 446 }; 447 448 usb_dmac11: dma-controller@e65b8000 { 449 compatible = "renesas,r8a77470-usb-dmac", 450 "renesas,usb-dmac"; 451 reg = <0 0xe65b8000 0 0x100>; 452 interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH 453 GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>; 454 interrupt-names = "ch0", "ch1"; 455 clocks = <&cpg CPG_MOD 327>; 456 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 457 resets = <&cpg 327>; 458 #dma-cells = <1>; 459 dma-channels = <2>; 460 }; 461 462 dmac0: dma-controller@e6700000 { 463 compatible = "renesas,dmac-r8a77470", 464 "renesas,rcar-dmac"; 465 reg = <0 0xe6700000 0 0x20000>; 466 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH 467 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH 468 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH 469 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 470 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 471 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH 472 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 473 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 474 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH 475 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH 476 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH 477 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH 478 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH 479 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 480 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH 481 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; 482 interrupt-names = "error", 483 "ch0", "ch1", "ch2", "ch3", 484 "ch4", "ch5", "ch6", "ch7", 485 "ch8", "ch9", "ch10", "ch11", 486 "ch12", "ch13", "ch14"; 487 clocks = <&cpg CPG_MOD 219>; 488 clock-names = "fck"; 489 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 490 resets = <&cpg 219>; 491 #dma-cells = <1>; 492 dma-channels = <15>; 493 }; 494 495 dmac1: dma-controller@e6720000 { 496 compatible = "renesas,dmac-r8a77470", 497 "renesas,rcar-dmac"; 498 reg = <0 0xe6720000 0 0x20000>; 499 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 500 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 501 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH 502 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 503 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 504 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH 505 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH 506 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH 507 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH 508 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH 509 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH 510 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH 511 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH 512 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH 513 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH 514 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; 515 interrupt-names = "error", 516 "ch0", "ch1", "ch2", "ch3", 517 "ch4", "ch5", "ch6", "ch7", 518 "ch8", "ch9", "ch10", "ch11", 519 "ch12", "ch13", "ch14"; 520 clocks = <&cpg CPG_MOD 218>; 521 clock-names = "fck"; 522 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 523 resets = <&cpg 218>; 524 #dma-cells = <1>; 525 dma-channels = <15>; 526 }; 527 528 avb: ethernet@e6800000 { 529 compatible = "renesas,etheravb-r8a77470", 530 "renesas,etheravb-rcar-gen2"; 531 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; 532 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; 533 clocks = <&cpg CPG_MOD 812>; 534 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 535 resets = <&cpg 812>; 536 #address-cells = <1>; 537 #size-cells = <0>; 538 status = "disabled"; 539 }; 540 541 qspi0: spi@e6b10000 { 542 compatible = "renesas,qspi-r8a77470", "renesas,qspi"; 543 reg = <0 0xe6b10000 0 0x2c>; 544 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 545 clocks = <&cpg CPG_MOD 918>; 546 dmas = <&dmac0 0x17>, <&dmac0 0x18>, 547 <&dmac1 0x17>, <&dmac1 0x18>; 548 dma-names = "tx", "rx", "tx", "rx"; 549 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 550 num-cs = <1>; 551 #address-cells = <1>; 552 #size-cells = <0>; 553 resets = <&cpg 918>; 554 status = "disabled"; 555 }; 556 557 qspi1: spi@ee200000 { 558 compatible = "renesas,qspi-r8a77470", "renesas,qspi"; 559 reg = <0 0xee200000 0 0x2c>; 560 interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>; 561 clocks = <&cpg CPG_MOD 917>; 562 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, 563 <&dmac1 0xd1>, <&dmac1 0xd2>; 564 dma-names = "tx", "rx", "tx", "rx"; 565 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 566 num-cs = <1>; 567 #address-cells = <1>; 568 #size-cells = <0>; 569 resets = <&cpg 917>; 570 status = "disabled"; 571 }; 572 573 scif0: serial@e6e60000 { 574 compatible = "renesas,scif-r8a77470", 575 "renesas,rcar-gen2-scif", "renesas,scif"; 576 reg = <0 0xe6e60000 0 0x40>; 577 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 578 clocks = <&cpg CPG_MOD 721>, 579 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; 580 clock-names = "fck", "brg_int", "scif_clk"; 581 dmas = <&dmac0 0x29>, <&dmac0 0x2a>, 582 <&dmac1 0x29>, <&dmac1 0x2a>; 583 dma-names = "tx", "rx", "tx", "rx"; 584 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 585 resets = <&cpg 721>; 586 status = "disabled"; 587 }; 588 589 scif1: serial@e6e68000 { 590 compatible = "renesas,scif-r8a77470", 591 "renesas,rcar-gen2-scif", "renesas,scif"; 592 reg = <0 0xe6e68000 0 0x40>; 593 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 594 clocks = <&cpg CPG_MOD 720>, 595 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; 596 clock-names = "fck", "brg_int", "scif_clk"; 597 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, 598 <&dmac1 0x2d>, <&dmac1 0x2e>; 599 dma-names = "tx", "rx", "tx", "rx"; 600 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 601 resets = <&cpg 720>; 602 status = "disabled"; 603 }; 604 605 scif2: serial@e6e58000 { 606 compatible = "renesas,scif-r8a77470", 607 "renesas,rcar-gen2-scif", "renesas,scif"; 608 reg = <0 0xe6e58000 0 0x40>; 609 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 610 clocks = <&cpg CPG_MOD 719>, 611 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; 612 clock-names = "fck", "brg_int", "scif_clk"; 613 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, 614 <&dmac1 0x2b>, <&dmac1 0x2c>; 615 dma-names = "tx", "rx", "tx", "rx"; 616 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 617 resets = <&cpg 719>; 618 status = "disabled"; 619 }; 620 621 scif3: serial@e6ea8000 { 622 compatible = "renesas,scif-r8a77470", 623 "renesas,rcar-gen2-scif", "renesas,scif"; 624 reg = <0 0xe6ea8000 0 0x40>; 625 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 626 clocks = <&cpg CPG_MOD 718>, 627 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; 628 clock-names = "fck", "brg_int", "scif_clk"; 629 dmas = <&dmac0 0x2f>, <&dmac0 0x30>, 630 <&dmac1 0x2f>, <&dmac1 0x30>; 631 dma-names = "tx", "rx", "tx", "rx"; 632 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 633 resets = <&cpg 718>; 634 status = "disabled"; 635 }; 636 637 scif4: serial@e6ee0000 { 638 compatible = "renesas,scif-r8a77470", 639 "renesas,rcar-gen2-scif", "renesas,scif"; 640 reg = <0 0xe6ee0000 0 0x40>; 641 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 642 clocks = <&cpg CPG_MOD 715>, 643 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; 644 clock-names = "fck", "brg_int", "scif_clk"; 645 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>, 646 <&dmac1 0xfb>, <&dmac1 0xfc>; 647 dma-names = "tx", "rx", "tx", "rx"; 648 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 649 resets = <&cpg 715>; 650 status = "disabled"; 651 }; 652 653 scif5: serial@e6ee8000 { 654 compatible = "renesas,scif-r8a77470", 655 "renesas,rcar-gen2-scif", "renesas,scif"; 656 reg = <0 0xe6ee8000 0 0x40>; 657 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 658 clocks = <&cpg CPG_MOD 714>, 659 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; 660 clock-names = "fck", "brg_int", "scif_clk"; 661 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>, 662 <&dmac1 0xfd>, <&dmac1 0xfe>; 663 dma-names = "tx", "rx", "tx", "rx"; 664 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 665 resets = <&cpg 714>; 666 status = "disabled"; 667 }; 668 669 hscif0: serial@e62c0000 { 670 compatible = "renesas,hscif-r8a77470", 671 "renesas,rcar-gen2-hscif", "renesas,hscif"; 672 reg = <0 0xe62c0000 0 0x60>; 673 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 674 clocks = <&cpg CPG_MOD 717>, 675 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; 676 clock-names = "fck", "brg_int", "scif_clk"; 677 dmas = <&dmac0 0x39>, <&dmac0 0x3a>, 678 <&dmac1 0x39>, <&dmac1 0x3a>; 679 dma-names = "tx", "rx", "tx", "rx"; 680 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 681 resets = <&cpg 717>; 682 status = "disabled"; 683 }; 684 685 hscif1: serial@e62c8000 { 686 compatible = "renesas,hscif-r8a77470", 687 "renesas,rcar-gen2-hscif", "renesas,hscif"; 688 reg = <0 0xe62c8000 0 0x60>; 689 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 690 clocks = <&cpg CPG_MOD 716>, 691 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; 692 clock-names = "fck", "brg_int", "scif_clk"; 693 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, 694 <&dmac1 0x4d>, <&dmac1 0x4e>; 695 dma-names = "tx", "rx", "tx", "rx"; 696 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 697 resets = <&cpg 716>; 698 status = "disabled"; 699 }; 700 701 hscif2: serial@e62d0000 { 702 compatible = "renesas,hscif-r8a77470", 703 "renesas,rcar-gen2-hscif", "renesas,hscif"; 704 reg = <0 0xe62d0000 0 0x60>; 705 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 706 clocks = <&cpg CPG_MOD 713>, 707 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>; 708 clock-names = "fck", "brg_int", "scif_clk"; 709 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>, 710 <&dmac1 0x3b>, <&dmac1 0x3c>; 711 dma-names = "tx", "rx", "tx", "rx"; 712 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 713 resets = <&cpg 713>; 714 status = "disabled"; 715 }; 716 717 pwm0: pwm@e6e30000 { 718 compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar"; 719 reg = <0 0xe6e30000 0 0x8>; 720 clocks = <&cpg CPG_MOD 523>; 721 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 722 resets = <&cpg 523>; 723 #pwm-cells = <2>; 724 status = "disabled"; 725 }; 726 727 pwm1: pwm@e6e31000 { 728 compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar"; 729 reg = <0 0xe6e31000 0 0x8>; 730 clocks = <&cpg CPG_MOD 523>; 731 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 732 resets = <&cpg 523>; 733 #pwm-cells = <2>; 734 status = "disabled"; 735 }; 736 737 pwm2: pwm@e6e32000 { 738 compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar"; 739 reg = <0 0xe6e32000 0 0x8>; 740 clocks = <&cpg CPG_MOD 523>; 741 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 742 resets = <&cpg 523>; 743 #pwm-cells = <2>; 744 status = "disabled"; 745 }; 746 747 pwm3: pwm@e6e33000 { 748 compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar"; 749 reg = <0 0xe6e33000 0 0x8>; 750 clocks = <&cpg CPG_MOD 523>; 751 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 752 resets = <&cpg 523>; 753 #pwm-cells = <2>; 754 status = "disabled"; 755 }; 756 757 pwm4: pwm@e6e34000 { 758 compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar"; 759 reg = <0 0xe6e34000 0 0x8>; 760 clocks = <&cpg CPG_MOD 523>; 761 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 762 resets = <&cpg 523>; 763 #pwm-cells = <2>; 764 status = "disabled"; 765 }; 766 767 pwm5: pwm@e6e35000 { 768 compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar"; 769 reg = <0 0xe6e35000 0 0x8>; 770 clocks = <&cpg CPG_MOD 523>; 771 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 772 resets = <&cpg 523>; 773 #pwm-cells = <2>; 774 status = "disabled"; 775 }; 776 777 pwm6: pwm@e6e36000 { 778 compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar"; 779 reg = <0 0xe6e36000 0 0x8>; 780 clocks = <&cpg CPG_MOD 523>; 781 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 782 resets = <&cpg 523>; 783 #pwm-cells = <2>; 784 status = "disabled"; 785 }; 786 787 vin0: video@e6ef0000 { 788 compatible = "renesas,vin-r8a77470", 789 "renesas,rcar-gen2-vin"; 790 reg = <0 0xe6ef0000 0 0x1000>; 791 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 792 clocks = <&cpg CPG_MOD 811>; 793 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 794 resets = <&cpg 811>; 795 status = "disabled"; 796 }; 797 798 vin1: video@e6ef1000 { 799 compatible = "renesas,vin-r8a77470", 800 "renesas,rcar-gen2-vin"; 801 reg = <0 0xe6ef1000 0 0x1000>; 802 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 803 clocks = <&cpg CPG_MOD 810>; 804 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 805 resets = <&cpg 810>; 806 status = "disabled"; 807 }; 808 809 ohci0: usb@ee080000 { 810 compatible = "generic-ohci"; 811 reg = <0 0xee080000 0 0x100>; 812 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 813 clocks = <&cpg CPG_MOD 703>; 814 phys = <&usb0 0>, <&usb2_phy0>; 815 phy-names = "usb"; 816 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 817 resets = <&cpg 703>; 818 status = "disabled"; 819 }; 820 821 ehci0: usb@ee080100 { 822 compatible = "generic-ehci"; 823 reg = <0 0xee080100 0 0x100>; 824 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 825 clocks = <&cpg CPG_MOD 703>; 826 phys = <&usb0 0>, <&usb2_phy0>; 827 phy-names = "usb"; 828 companion = <&ohci0>; 829 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 830 resets = <&cpg 703>; 831 status = "disabled"; 832 }; 833 834 usb2_phy0: usb-phy@ee080200 { 835 compatible = "renesas,usb2-phy-r8a77470"; 836 reg = <0 0xee080200 0 0x700>; 837 clocks = <&cpg CPG_MOD 703>; 838 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 839 resets = <&cpg 703>; 840 #phy-cells = <0>; 841 status = "disabled"; 842 }; 843 844 ohci1: usb@ee0c0000 { 845 compatible = "generic-ohci"; 846 reg = <0 0xee0c0000 0 0x100>; 847 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 848 clocks = <&cpg CPG_MOD 705>; 849 phys = <&usb0 1>, <&usb2_phy1>, <&usb1 0>; 850 phy-names = "usb"; 851 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 852 resets = <&cpg 705>; 853 status = "disabled"; 854 }; 855 856 ehci1: usb@ee0c0100 { 857 compatible = "generic-ehci"; 858 reg = <0 0xee0c0100 0 0x100>; 859 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 860 clocks = <&cpg CPG_MOD 705>; 861 phys = <&usb0 1>, <&usb2_phy1>, <&usb1 0>; 862 phy-names = "usb"; 863 companion = <&ohci1>; 864 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 865 resets = <&cpg 705>; 866 status = "disabled"; 867 }; 868 869 usb2_phy1: usb-phy@ee0c0200 { 870 compatible = "renesas,usb2-phy-r8a77470"; 871 reg = <0 0xee0c0200 0 0x700>; 872 clocks = <&cpg CPG_MOD 705>; 873 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 874 resets = <&cpg 705>; 875 #phy-cells = <0>; 876 status = "disabled"; 877 }; 878 879 sdhi0: sd@ee100000 { 880 compatible = "renesas,sdhi-r8a77470", 881 "renesas,rcar-gen2-sdhi"; 882 reg = <0 0xee100000 0 0x328>; 883 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 884 clocks = <&cpg CPG_MOD 314>; 885 dmas = <&dmac0 0xcd>, <&dmac0 0xce>, 886 <&dmac1 0xcd>, <&dmac1 0xce>; 887 dma-names = "tx", "rx", "tx", "rx"; 888 max-frequency = <156000000>; 889 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 890 resets = <&cpg 314>; 891 status = "disabled"; 892 }; 893 894 sdhi1: sd@ee300000 { 895 compatible = "renesas,sdhi-mmc-r8a77470"; 896 reg = <0 0xee300000 0 0x2000>; 897 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 898 clocks = <&cpg CPG_MOD 313>; 899 max-frequency = <156000000>; 900 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 901 resets = <&cpg 313>; 902 status = "disabled"; 903 }; 904 905 sdhi2: sd@ee160000 { 906 compatible = "renesas,sdhi-r8a77470", 907 "renesas,rcar-gen2-sdhi"; 908 reg = <0 0xee160000 0 0x328>; 909 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 910 clocks = <&cpg CPG_MOD 312>; 911 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, 912 <&dmac1 0xd3>, <&dmac1 0xd4>; 913 dma-names = "tx", "rx", "tx", "rx"; 914 max-frequency = <78000000>; 915 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 916 resets = <&cpg 312>; 917 status = "disabled"; 918 }; 919 920 gic: interrupt-controller@f1001000 { 921 compatible = "arm,gic-400"; 922 #interrupt-cells = <3>; 923 #address-cells = <0>; 924 interrupt-controller; 925 reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>, 926 <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>; 927 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 928 clocks = <&cpg CPG_MOD 408>; 929 clock-names = "clk"; 930 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 931 resets = <&cpg 408>; 932 }; 933 934 du: display@feb00000 { 935 compatible = "renesas,du-r8a77470"; 936 reg = <0 0xfeb00000 0 0x40000>; 937 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 938 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 939 clocks = <&cpg CPG_MOD 724>, 940 <&cpg CPG_MOD 723>; 941 clock-names = "du.0", "du.1"; 942 status = "disabled"; 943 944 ports { 945 #address-cells = <1>; 946 #size-cells = <0>; 947 948 port@0 { 949 reg = <0>; 950 du_out_rgb0: endpoint { 951 }; 952 }; 953 port@1 { 954 reg = <1>; 955 du_out_rgb1: endpoint { 956 }; 957 }; 958 port@2 { 959 reg = <2>; 960 du_out_lvds0: endpoint { 961 }; 962 }; 963 }; 964 }; 965 966 prr: chipid@ff000044 { 967 compatible = "renesas,prr"; 968 reg = <0 0xff000044 0 4>; 969 }; 970 971 cmt0: timer@ffca0000 { 972 compatible = "renesas,r8a77470-cmt0", 973 "renesas,rcar-gen2-cmt0"; 974 reg = <0 0xffca0000 0 0x1004>; 975 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 976 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 977 clocks = <&cpg CPG_MOD 124>; 978 clock-names = "fck"; 979 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 980 resets = <&cpg 124>; 981 status = "disabled"; 982 }; 983 984 cmt1: timer@e6130000 { 985 compatible = "renesas,r8a77470-cmt1", 986 "renesas,rcar-gen2-cmt1"; 987 reg = <0 0xe6130000 0 0x1004>; 988 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 989 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 990 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 991 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 992 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 993 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 994 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 995 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 996 clocks = <&cpg CPG_MOD 329>; 997 clock-names = "fck"; 998 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; 999 resets = <&cpg 329>; 1000 status = "disabled"; 1001 }; 1002 }; 1003 1004 timer { 1005 compatible = "arm,armv7-timer"; 1006 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1007 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1008 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1009 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1010 }; 1011 1012 /* External USB clock - can be overridden by the board */ 1013 usb_extal_clk: usb_extal { 1014 compatible = "fixed-clock"; 1015 #clock-cells = <0>; 1016 clock-frequency = <48000000>; 1017 }; 1018}; 1019
