1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the SK-RZG1E board
4 *
5 * Copyright (C) 2016-2017 Cogent Embedded, Inc.
6 */
7
8/dts-v1/;
9#include "r8a7745.dtsi"
10
11/ {
12	model = "SK-RZG1E";
13	compatible = "renesas,sk-rzg1e", "renesas,r8a7745";
14
15	aliases {
16		serial0 = &scif2;
17	};
18
19	chosen {
20		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
21		stdout-path = "serial0:115200n8";
22	};
23
24	memory@40000000 {
25		device_type = "memory";
26		reg = <0 0x40000000 0 0x40000000>;
27	};
28};
29
30&extal_clk {
31	clock-frequency = <20000000>;
32};
33
34&pfc {
35	scif2_pins: scif2 {
36		groups = "scif2_data";
37		function = "scif2";
38	};
39
40	ether_pins: ether {
41		groups = "eth_link", "eth_mdio", "eth_rmii";
42		function = "eth";
43	};
44
45	phy1_pins: phy1 {
46		groups = "intc_irq8";
47		function = "intc";
48	};
49};
50
51&scif2 {
52	pinctrl-0 = <&scif2_pins>;
53	pinctrl-names = "default";
54
55	status = "okay";
56};
57
58&ether {
59	pinctrl-0 = <&ether_pins &phy1_pins>;
60	pinctrl-names = "default";
61
62	phy-handle = <&phy1>;
63	renesas,ether-link-active-low;
64	status = "okay";
65
66	phy1: ethernet-phy@1 {
67		reg = <1>;
68		interrupt-parent = <&irqc>;
69		interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
70		micrel,led-mode = <1>;
71	};
72};
73