1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (c) 2017-2018 MediaTek Inc.
4 * Author: Sean Wang <sean.wang@mediatek.com>
5 *
6 */
7
8/dts-v1/;
9#include <dt-bindings/input/input.h>
10#include "mt7623.dtsi"
11#include "mt6323.dtsi"
12
13/ {
14	model = "MediaTek MT7623N with eMMC reference board";
15	compatible = "mediatek,mt7623n-rfb-emmc", "mediatek,mt7623";
16
17	aliases {
18		serial0 = &uart0;
19		serial1 = &uart1;
20		serial2 = &uart2;
21	};
22
23	chosen {
24		stdout-path = "serial2:115200n8";
25	};
26
27	cpus {
28		cpu@0 {
29			proc-supply = <&mt6323_vproc_reg>;
30		};
31
32		cpu@1 {
33			proc-supply = <&mt6323_vproc_reg>;
34		};
35
36		cpu@2 {
37			proc-supply = <&mt6323_vproc_reg>;
38		};
39
40		cpu@3 {
41			proc-supply = <&mt6323_vproc_reg>;
42		};
43	};
44
45	gpio-keys {
46		compatible = "gpio-keys";
47		pinctrl-names = "default";
48		pinctrl-0 = <&key_pins_a>;
49
50		factory {
51			label = "factory";
52			linux,code = <BTN_0>;
53			gpios = <&pio 256 GPIO_ACTIVE_LOW>;
54		};
55
56		wps {
57			label = "wps";
58			linux,code = <KEY_WPS_BUTTON>;
59			gpios = <&pio 257 GPIO_ACTIVE_HIGH>;
60		};
61	};
62
63	memory@80000000 {
64		device_type = "memory";
65		reg = <0 0x80000000 0 0x40000000>;
66	};
67
68	reg_1p8v: regulator-1p8v {
69		compatible = "regulator-fixed";
70		regulator-name = "fixed-1.8V";
71		regulator-min-microvolt = <1800000>;
72		regulator-max-microvolt = <1800000>;
73		regulator-boot-on;
74		regulator-always-on;
75	};
76
77	reg_3p3v: regulator-3p3v {
78		compatible = "regulator-fixed";
79		regulator-name = "fixed-3.3V";
80		regulator-min-microvolt = <3300000>;
81		regulator-max-microvolt = <3300000>;
82		regulator-boot-on;
83		regulator-always-on;
84	};
85
86	reg_5v: regulator-5v {
87		compatible = "regulator-fixed";
88		regulator-name = "fixed-5V";
89		regulator-min-microvolt = <5000000>;
90		regulator-max-microvolt = <5000000>;
91		regulator-boot-on;
92		regulator-always-on;
93	};
94
95	sound {
96		compatible = "mediatek,mt2701-wm8960-machine";
97		mediatek,platform = <&afe>;
98		audio-routing =
99			"Headphone", "HP_L",
100			"Headphone", "HP_R",
101			"LINPUT1", "AMIC",
102			"RINPUT1", "AMIC";
103		mediatek,audio-codec = <&wm8960>;
104		pinctrl-names = "default";
105		pinctrl-0 = <&i2s0_pins_a>;
106	};
107};
108
109&btif {
110	status = "okay";
111};
112
113&cir {
114	pinctrl-names = "default";
115	pinctrl-0 = <&cir_pins_a>;
116	status = "okay";
117};
118
119&crypto {
120	status = "okay";
121};
122
123&eth {
124	status = "okay";
125
126	gmac0: mac@0 {
127		compatible = "mediatek,eth-mac";
128		reg = <0>;
129		phy-mode = "trgmii";
130
131		fixed-link {
132			speed = <1000>;
133			full-duplex;
134			pause;
135		};
136	};
137
138	mac@1 {
139		compatible = "mediatek,eth-mac";
140		reg = <1>;
141		phy-handle = <&phy5>;
142	};
143
144	mdio-bus {
145		#address-cells = <1>;
146		#size-cells = <0>;
147
148		phy5: ethernet-phy@5 {
149			reg = <5>;
150			phy-mode = "rgmii-rxid";
151		};
152
153		switch@0 {
154			compatible = "mediatek,mt7530";
155			reg = <0>;
156			reset-gpios = <&pio 33 0>;
157			core-supply = <&mt6323_vpa_reg>;
158			io-supply = <&mt6323_vemc3v3_reg>;
159
160			ports {
161				#address-cells = <1>;
162				#size-cells = <0>;
163
164				port@0 {
165					reg = <0>;
166					label = "lan0";
167				};
168
169				port@1 {
170					reg = <1>;
171					label = "lan1";
172				};
173
174				port@2 {
175					reg = <2>;
176					label = "lan2";
177				};
178
179				port@3 {
180					reg = <3>;
181					label = "lan3";
182				};
183
184				port@4 {
185					reg = <4>;
186					label = "wan";
187				};
188
189				port@6 {
190					reg = <6>;
191					label = "cpu";
192					ethernet = <&gmac0>;
193					phy-mode = "trgmii";
194
195					fixed-link {
196						speed = <1000>;
197						full-duplex;
198					};
199				};
200			};
201		};
202	};
203};
204
205&i2c0 {
206	pinctrl-names = "default";
207	pinctrl-0 = <&i2c0_pins_a>;
208	status = "okay";
209};
210
211&i2c1 {
212	pinctrl-names = "default";
213	pinctrl-0 = <&i2c1_pins_b>;
214	status = "okay";
215
216	wm8960: wm8960@1a {
217		compatible = "wlf,wm8960";
218		reg = <0x1a>;
219	};
220};
221
222&i2c2 {
223	pinctrl-names = "default";
224	pinctrl-0 = <&i2c2_pins_a>;
225	status = "okay";
226};
227
228&mmc0 {
229	pinctrl-names = "default", "state_uhs";
230	pinctrl-0 = <&mmc0_pins_default>;
231	pinctrl-1 = <&mmc0_pins_uhs>;
232	status = "okay";
233	bus-width = <8>;
234	max-frequency = <50000000>;
235	cap-mmc-highspeed;
236	vmmc-supply = <&reg_3p3v>;
237	vqmmc-supply = <&reg_1p8v>;
238	non-removable;
239};
240
241&mmc1 {
242	pinctrl-names = "default", "state_uhs";
243	pinctrl-0 = <&mmc1_pins_default>;
244	pinctrl-1 = <&mmc1_pins_uhs>;
245	status = "okay";
246	bus-width = <4>;
247	max-frequency = <50000000>;
248	cap-sd-highspeed;
249	cd-gpios = <&pio 261 GPIO_ACTIVE_LOW>;
250	vmmc-supply = <&reg_3p3v>;
251	vqmmc-supply = <&reg_3p3v>;
252};
253
254&pcie {
255	pinctrl-names = "default";
256	pinctrl-0 = <&pcie_default>;
257	status = "okay";
258
259	pcie@0,0 {
260		status = "okay";
261	};
262
263	pcie@1,0 {
264		status = "okay";
265	};
266};
267
268&pcie0_phy {
269	status = "okay";
270};
271
272&pcie1_phy {
273	status = "okay";
274};
275
276&pwm {
277	pinctrl-names = "default";
278	pinctrl-0 = <&pwm_pins_a>;
279	status = "okay";
280};
281
282&spi0 {
283	pinctrl-names = "default";
284	pinctrl-0 = <&spi0_pins_a>;
285	status = "okay";
286};
287
288&spi1 {
289	pinctrl-names = "default";
290	pinctrl-0 = <&spi1_pins_a>;
291	status = "okay";
292};
293
294&spi2 {
295	pinctrl-names = "default";
296	pinctrl-0 = <&spi2_pins_a>;
297	status = "okay";
298};
299
300&uart0 {
301	pinctrl-names = "default";
302	pinctrl-0 = <&uart0_pins_a>;
303	status = "okay";
304};
305
306&uart1 {
307	pinctrl-names = "default";
308	pinctrl-0 = <&uart1_pins_a>;
309	status = "okay";
310};
311
312&uart2 {
313	pinctrl-names = "default";
314	pinctrl-0 = <&uart2_pins_a>;
315	status = "okay";
316};
317
318&usb1 {
319	vusb33-supply = <&reg_3p3v>;
320	vbus-supply = <&reg_5v>;
321	status = "okay";
322};
323
324&u3phy1 {
325	status = "okay";
326};
327