1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for K2G SOC 4 * 5 * Copyright (C) 2016-2017 Texas Instruments Incorporated - http://www.ti.com/ 6 */ 7 8#include <dt-bindings/interrupt-controller/arm-gic.h> 9#include <dt-bindings/pinctrl/keystone.h> 10#include <dt-bindings/gpio/gpio.h> 11 12/ { 13 compatible = "ti,k2g","ti,keystone"; 14 model = "Texas Instruments K2G SoC"; 15 #address-cells = <2>; 16 #size-cells = <2>; 17 interrupt-parent = <&gic>; 18 19 chosen { }; 20 21 aliases { 22 serial0 = &uart0; 23 serial1 = &uart1; 24 serial2 = &uart2; 25 i2c0 = &i2c0; 26 i2c1 = &i2c1; 27 i2c2 = &i2c2; 28 rproc0 = &dsp0; 29 }; 30 31 cpus { 32 #address-cells = <1>; 33 #size-cells = <0>; 34 35 cpu@0 { 36 compatible = "arm,cortex-a15"; 37 device_type = "cpu"; 38 reg = <0>; 39 }; 40 }; 41 42 gic: interrupt-controller@2561000 { 43 compatible = "arm,gic-400", "arm,cortex-a15-gic"; 44 #interrupt-cells = <3>; 45 interrupt-controller; 46 reg = <0x0 0x02561000 0x0 0x1000>, 47 <0x0 0x02562000 0x0 0x2000>, 48 <0x0 0x02564000 0x0 0x2000>, 49 <0x0 0x02566000 0x0 0x2000>; 50 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | 51 IRQ_TYPE_LEVEL_HIGH)>; 52 }; 53 54 timer { 55 compatible = "arm,armv7-timer"; 56 interrupts = 57 <GIC_PPI 13 58 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 59 <GIC_PPI 14 60 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 61 <GIC_PPI 11 62 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 63 <GIC_PPI 10 64 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 65 }; 66 67 pmu { 68 compatible = "arm,cortex-a15-pmu"; 69 interrupts = <GIC_SPI 4 IRQ_TYPE_EDGE_RISING>; 70 }; 71 72 usbphy { 73 #address-cells = <1>; 74 #size-cells = <0>; 75 compatible = "simple-bus"; 76 77 usb0_phy: usb-phy@0 { 78 compatible = "usb-nop-xceiv"; 79 reg = <0>; 80 status = "disabled"; 81 }; 82 83 usb1_phy: usb-phy@1 { 84 compatible = "usb-nop-xceiv"; 85 reg = <1>; 86 status = "disabled"; 87 }; 88 }; 89 90 soc0: soc@0 { 91 #address-cells = <1>; 92 #size-cells = <1>; 93 #pinctrl-cells = <1>; 94 compatible = "ti,keystone","simple-bus"; 95 ranges = <0x0 0x0 0x0 0xc0000000>; 96 dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>; 97 98 msm_ram: msmram@c000000 { 99 compatible = "mmio-sram"; 100 reg = <0x0c000000 0x100000>; 101 ranges = <0x0 0x0c000000 0x100000>; 102 #address-cells = <1>; 103 #size-cells = <1>; 104 105 sram-bm@f7000 { 106 reg = <0x000f7000 0x8000>; 107 }; 108 }; 109 110 k2g_pinctrl: pinmux@2621000 { 111 compatible = "pinctrl-single"; 112 reg = <0x02621000 0x410>; 113 pinctrl-single,register-width = <32>; 114 pinctrl-single,function-mask = <0x001b0007>; 115 }; 116 117 devctrl: device-state-control@2620000 { 118 compatible = "ti,keystone-devctrl", "syscon", "simple-mfd"; 119 reg = <0x02620000 0x1000>; 120 #address-cells = <1>; 121 #size-cells = <1>; 122 ranges = <0x0 0x02620000 0x1000>; 123 124 kirq0: keystone_irq@2a0 { 125 compatible = "ti,keystone-irq"; 126 reg = <0x2a0 0x10>; 127 interrupts = <GIC_SPI 1 IRQ_TYPE_EDGE_RISING>; 128 interrupt-controller; 129 #interrupt-cells = <1>; 130 ti,syscon-dev = <&devctrl 0x2a0>; 131 }; 132 133 dspgpio0: keystone_dsp_gpio@240 { 134 compatible = "ti,keystone-dsp-gpio"; 135 reg = <0x240 0x4>; 136 gpio-controller; 137 #gpio-cells = <2>; 138 gpio,syscon-dev = <&devctrl 0x240>; 139 }; 140 }; 141 142 uart0: serial@2530c00 { 143 compatible = "ti,da830-uart", "ns16550a"; 144 current-speed = <115200>; 145 reg-shift = <2>; 146 reg-io-width = <4>; 147 reg = <0x02530c00 0x100>; 148 interrupts = <GIC_SPI 164 IRQ_TYPE_EDGE_RISING>; 149 clocks = <&k2g_clks 0x2c 0>; 150 power-domains = <&k2g_pds 0x2c>; 151 status = "disabled"; 152 }; 153 154 uart1: serial@2531000 { 155 compatible = "ti,da830-uart", "ns16550a"; 156 current-speed = <115200>; 157 reg-shift = <2>; 158 reg-io-width = <4>; 159 reg = <0x02531000 0x100>; 160 interrupts = <GIC_SPI 165 IRQ_TYPE_EDGE_RISING>; 161 clocks = <&k2g_clks 0x2d 0>; 162 power-domains = <&k2g_pds 0x2d>; 163 status = "disabled"; 164 }; 165 166 uart2: serial@2531400 { 167 compatible = "ti,da830-uart", "ns16550a"; 168 current-speed = <115200>; 169 reg-shift = <2>; 170 reg-io-width = <4>; 171 reg = <0x02531400 0x100>; 172 interrupts = <GIC_SPI 166 IRQ_TYPE_EDGE_RISING>; 173 clocks = <&k2g_clks 0x2e 0>; 174 power-domains = <&k2g_pds 0x2e>; 175 status = "disabled"; 176 }; 177 178 dcan0: can@260b200 { 179 compatible = "ti,am4372-d_can", "ti,am3352-d_can"; 180 reg = <0x0260B200 0x200>; 181 interrupts = <GIC_SPI 190 IRQ_TYPE_EDGE_RISING>; 182 status = "disabled"; 183 power-domains = <&k2g_pds 0x0008>; 184 clocks = <&k2g_clks 0x0008 1>; 185 }; 186 187 dcan1: can@260b400 { 188 compatible = "ti,am4372-d_can", "ti,am3352-d_can"; 189 reg = <0x0260B400 0x200>; 190 interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>; 191 status = "disabled"; 192 power-domains = <&k2g_pds 0x0009>; 193 clocks = <&k2g_clks 0x0009 1>; 194 }; 195 196 i2c0: i2c@2530000 { 197 compatible = "ti,keystone-i2c"; 198 reg = <0x02530000 0x400>; 199 clocks = <&k2g_clks 0x003a 0>; 200 power-domains = <&k2g_pds 0x003a>; 201 interrupts = <GIC_SPI 88 IRQ_TYPE_EDGE_RISING>; 202 #address-cells = <1>; 203 #size-cells = <0>; 204 status = "disabled"; 205 }; 206 207 i2c1: i2c@2530400 { 208 compatible = "ti,keystone-i2c"; 209 reg = <0x02530400 0x400>; 210 clocks = <&k2g_clks 0x003b 0>; 211 power-domains = <&k2g_pds 0x003b>; 212 interrupts = <GIC_SPI 89 IRQ_TYPE_EDGE_RISING>; 213 #address-cells = <1>; 214 #size-cells = <0>; 215 status = "disabled"; 216 }; 217 218 i2c2: i2c@2530800 { 219 compatible = "ti,keystone-i2c"; 220 reg = <0x02530800 0x400>; 221 clocks = <&k2g_clks 0x003c 0>; 222 power-domains = <&k2g_pds 0x003c>; 223 interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>; 224 #address-cells = <1>; 225 #size-cells = <0>; 226 status = "disabled"; 227 }; 228 229 dsp0: dsp@10800000 { 230 compatible = "ti,k2g-dsp"; 231 reg = <0x10800000 0x00100000>, 232 <0x10e00000 0x00008000>, 233 <0x10f00000 0x00008000>; 234 reg-names = "l2sram", "l1pram", "l1dram"; 235 power-domains = <&k2g_pds 0x0046>; 236 ti,syscon-dev = <&devctrl 0x844>; 237 resets = <&k2g_reset 0x0046 0x1>; 238 interrupt-parent = <&kirq0>; 239 interrupts = <0 8>; 240 interrupt-names = "vring", "exception"; 241 kick-gpios = <&dspgpio0 27 0>; 242 status = "disabled"; 243 }; 244 245 msgmgr: msgmgr@2a00000 { 246 compatible = "ti,k2g-message-manager"; 247 #mbox-cells = <2>; 248 reg-names = "queue_proxy_region", 249 "queue_state_debug_region"; 250 reg = <0x02a00000 0x400000>, <0x028c3400 0x400>; 251 interrupt-names = "rx_005", 252 "rx_057"; 253 interrupts = <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 254 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>; 255 }; 256 257 pmmc: pmmc@2921c00 { 258 compatible = "ti,k2g-sci"; 259 /* 260 * In case of rare platforms that does not use k2g as 261 * system master, use /delete-property/ 262 */ 263 ti,system-reboot-controller; 264 mbox-names = "rx", "tx"; 265 mboxes= <&msgmgr 5 2>, 266 <&msgmgr 0 0>; 267 reg-names = "debug_messages"; 268 reg = <0x02921c00 0x400>; 269 270 k2g_pds: power-controller { 271 compatible = "ti,sci-pm-domain"; 272 #power-domain-cells = <1>; 273 }; 274 275 k2g_clks: clocks { 276 compatible = "ti,k2g-sci-clk"; 277 #clock-cells = <2>; 278 }; 279 280 k2g_reset: reset-controller { 281 compatible = "ti,sci-reset"; 282 #reset-cells = <2>; 283 }; 284 }; 285 286 gpio0: gpio@2603000 { 287 compatible = "ti,k2g-gpio", "ti,keystone-gpio"; 288 reg = <0x02603000 0x100>; 289 gpio-controller; 290 #gpio-cells = <2>; 291 292 interrupts = <GIC_SPI 432 IRQ_TYPE_EDGE_RISING>, 293 <GIC_SPI 433 IRQ_TYPE_EDGE_RISING>, 294 <GIC_SPI 434 IRQ_TYPE_EDGE_RISING>, 295 <GIC_SPI 435 IRQ_TYPE_EDGE_RISING>, 296 <GIC_SPI 436 IRQ_TYPE_EDGE_RISING>, 297 <GIC_SPI 437 IRQ_TYPE_EDGE_RISING>, 298 <GIC_SPI 438 IRQ_TYPE_EDGE_RISING>, 299 <GIC_SPI 439 IRQ_TYPE_EDGE_RISING>, 300 <GIC_SPI 440 IRQ_TYPE_EDGE_RISING>; 301 interrupt-controller; 302 #interrupt-cells = <2>; 303 ti,ngpio = <144>; 304 ti,davinci-gpio-unbanked = <0>; 305 clocks = <&k2g_clks 0x001b 0x0>; 306 clock-names = "gpio"; 307 }; 308 309 gpio1: gpio@260a000 { 310 compatible = "ti,k2g-gpio", "ti,keystone-gpio"; 311 reg = <0x0260a000 0x100>; 312 gpio-controller; 313 #gpio-cells = <2>; 314 interrupts = <GIC_SPI 442 IRQ_TYPE_EDGE_RISING>, 315 <GIC_SPI 443 IRQ_TYPE_EDGE_RISING>, 316 <GIC_SPI 444 IRQ_TYPE_EDGE_RISING>, 317 <GIC_SPI 445 IRQ_TYPE_EDGE_RISING>, 318 <GIC_SPI 446 IRQ_TYPE_EDGE_RISING>; 319 interrupt-controller; 320 #interrupt-cells = <2>; 321 ti,ngpio = <68>; 322 ti,davinci-gpio-unbanked = <0>; 323 clocks = <&k2g_clks 0x001c 0x0>; 324 clock-names = "gpio"; 325 }; 326 327 edma0: edma@2700000 { 328 compatible = "ti,k2g-edma3-tpcc", "ti,edma3-tpcc"; 329 reg = <0x02700000 0x8000>; 330 reg-names = "edma3_cc"; 331 interrupts = <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>, 332 <GIC_SPI 216 IRQ_TYPE_EDGE_RISING>, 333 <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>; 334 interrupt-names = "edma3_ccint", "emda3_mperr", 335 "edma3_ccerrint"; 336 dma-requests = <64>; 337 #dma-cells = <2>; 338 339 ti,tptcs = <&edma0_tptc0 7>, <&edma0_tptc1 0>; 340 341 ti,edma-memcpy-channels = <32 33 34 35>; 342 343 power-domains = <&k2g_pds 0x3f>; 344 }; 345 346 edma0_tptc0: tptc@2760000 { 347 compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc"; 348 reg = <0x02760000 0x400>; 349 power-domains = <&k2g_pds 0x3f>; 350 }; 351 352 edma0_tptc1: tptc@2768000 { 353 compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc"; 354 reg = <0x02768000 0x400>; 355 power-domains = <&k2g_pds 0x3f>; 356 }; 357 358 edma1: edma@2728000 { 359 compatible = "ti,k2g-edma3-tpcc", "ti,edma3-tpcc"; 360 reg = <0x02728000 0x8000>; 361 reg-names = "edma3_cc"; 362 interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>, 363 <GIC_SPI 219 IRQ_TYPE_EDGE_RISING>, 364 <GIC_SPI 220 IRQ_TYPE_EDGE_RISING>; 365 interrupt-names = "edma3_ccint", "emda3_mperr", 366 "edma3_ccerrint"; 367 dma-requests = <64>; 368 #dma-cells = <2>; 369 370 ti,tptcs = <&edma1_tptc0 7>, <&edma1_tptc1 0>; 371 372 /* 373 * memcpy is disabled, can be enabled with: 374 * ti,edma-memcpy-channels = <12 13 14 15>; 375 * for example. 376 */ 377 378 power-domains = <&k2g_pds 0x4f>; 379 }; 380 381 edma1_tptc0: tptc@27b0000 { 382 compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc"; 383 reg = <0x027b0000 0x400>; 384 power-domains = <&k2g_pds 0x4f>; 385 }; 386 387 edma1_tptc1: tptc@27b8000 { 388 compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc"; 389 reg = <0x027b8000 0x400>; 390 power-domains = <&k2g_pds 0x4f>; 391 }; 392 393 mmc0: mmc@23000000 { 394 compatible = "ti,k2g-sdhci"; 395 reg = <0x23000000 0x400>; 396 interrupts = <GIC_SPI 96 IRQ_TYPE_EDGE_RISING>; 397 bus-width = <4>; 398 no-1-8-v; 399 max-frequency = <96000000>; 400 power-domains = <&k2g_pds 0xb>; 401 clocks = <&k2g_clks 0xb 1>, <&k2g_clks 0xb 2>; 402 clock-names = "fck", "mmchsdb_fck"; 403 status = "disabled"; 404 }; 405 406 mmc1: mmc@23100000 { 407 compatible = "ti,k2g-sdhci"; 408 reg = <0x23100000 0x400>; 409 interrupts = <GIC_SPI 97 IRQ_TYPE_EDGE_RISING>; 410 bus-width = <8>; 411 no-1-8-v; 412 non-removable; 413 max-frequency = <96000000>; 414 power-domains = <&k2g_pds 0xc>; 415 clocks = <&k2g_clks 0xc 1>, <&k2g_clks 0xc 2>; 416 clock-names = "fck", "mmchsdb_fck"; 417 }; 418 419 qspi: spi@2940000 { 420 compatible = "ti,k2g-qspi", "cdns,qspi-nor"; 421 #address-cells = <1>; 422 #size-cells = <0>; 423 reg = <0x02940000 0x1000>, 424 <0x24000000 0x4000000>; 425 interrupts = <GIC_SPI 198 IRQ_TYPE_EDGE_RISING>; 426 cdns,fifo-depth = <256>; 427 cdns,fifo-width = <4>; 428 cdns,trigger-address = <0x24000000>; 429 clocks = <&k2g_clks 0x43 0x0>; 430 power-domains = <&k2g_pds 0x43>; 431 status = "disabled"; 432 }; 433 434 mcasp0: mcasp@2340000 { 435 compatible = "ti,am33xx-mcasp-audio"; 436 reg = <0x02340000 0x2000>, 437 <0x21804000 0x1000>; 438 reg-names = "mpu","dat"; 439 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, 440 <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 441 interrupt-names = "tx", "rx"; 442 dmas = <&edma0 24 1>, <&edma0 25 1>; 443 dma-names = "tx", "rx"; 444 power-domains = <&k2g_pds 0x4>; 445 clocks = <&k2g_clks 0x4 0>; 446 clock-names = "fck"; 447 status = "disabled"; 448 }; 449 450 mcasp1: mcasp@2342000 { 451 compatible = "ti,am33xx-mcasp-audio"; 452 reg = <0x02342000 0x2000>, 453 <0x21804400 0x1000>; 454 reg-names = "mpu","dat"; 455 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 456 <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 457 interrupt-names = "tx", "rx"; 458 dmas = <&edma1 48 1>, <&edma1 49 1>; 459 dma-names = "tx", "rx"; 460 power-domains = <&k2g_pds 0x5>; 461 clocks = <&k2g_clks 0x5 0>; 462 clock-names = "fck"; 463 status = "disabled"; 464 }; 465 466 mcasp2: mcasp@2344000 { 467 compatible = "ti,am33xx-mcasp-audio"; 468 reg = <0x02344000 0x2000>, 469 <0x21804800 0x1000>; 470 reg-names = "mpu","dat"; 471 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 472 <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 473 interrupt-names = "tx", "rx"; 474 dmas = <&edma1 50 1>, <&edma1 51 1>; 475 dma-names = "tx", "rx"; 476 power-domains = <&k2g_pds 0x6>; 477 clocks = <&k2g_clks 0x6 0>; 478 clock-names = "fck"; 479 status = "disabled"; 480 }; 481 482 keystone_usb0: keystone-dwc3@2680000 { 483 compatible = "ti,keystone-dwc3"; 484 #address-cells = <1>; 485 #size-cells = <1>; 486 reg = <0x2680000 0x10000>; 487 interrupts = <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>; 488 ranges; 489 dma-coherent; 490 dma-ranges; 491 status = "disabled"; 492 power-domains = <&k2g_pds 0x0016>; 493 494 usb0: usb@2690000 { 495 compatible = "snps,dwc3"; 496 reg = <0x2690000 0x10000>; 497 interrupts = <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>; 498 maximum-speed = "high-speed"; 499 dr_mode = "otg"; 500 usb-phy = <&usb0_phy>; 501 status = "disabled"; 502 }; 503 }; 504 505 keystone_usb1: keystone-dwc3@2580000 { 506 compatible = "ti,keystone-dwc3"; 507 #address-cells = <1>; 508 #size-cells = <1>; 509 reg = <0x2580000 0x10000>; 510 interrupts = <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>; 511 ranges; 512 dma-coherent; 513 dma-ranges; 514 status = "disabled"; 515 power-domains = <&k2g_pds 0x0017>; 516 517 usb1: usb@2590000 { 518 compatible = "snps,dwc3"; 519 reg = <0x2590000 0x10000>; 520 interrupts = <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>; 521 maximum-speed = "high-speed"; 522 dr_mode = "otg"; 523 usb-phy = <&usb1_phy>; 524 status = "disabled"; 525 }; 526 }; 527 528 ecap0: pwm@21d1800 { 529 compatible = "ti,k2g-ecap", "ti,am3352-ecap"; 530 #pwm-cells = <3>; 531 reg = <0x021d1800 0x60>; 532 power-domains = <&k2g_pds 0x38>; 533 clocks = <&k2g_clks 0x38 0>; 534 clock-names = "fck"; 535 status = "disabled"; 536 }; 537 538 ecap1: pwm@21d1c00 { 539 compatible = "ti,k2g-ecap", "ti,am3352-ecap"; 540 #pwm-cells = <3>; 541 reg = <0x021d1c00 0x60>; 542 power-domains = <&k2g_pds 0x39>; 543 clocks = <&k2g_clks 0x39 0x0>; 544 clock-names = "fck"; 545 status = "disabled"; 546 }; 547 548 spi0: spi@21805400 { 549 compatible = "ti,keystone-spi"; 550 reg = <0x21805400 0x200>; 551 num-cs = <4>; 552 ti,davinci-spi-intr-line = <0>; 553 interrupts = <GIC_SPI 64 IRQ_TYPE_EDGE_RISING>; 554 #address-cells = <1>; 555 #size-cells = <0>; 556 power-domains = <&k2g_pds 0x0010>; 557 clocks = <&k2g_clks 0x0010 0>; 558 }; 559 560 spi1: spi@21805800 { 561 compatible = "ti,keystone-spi"; 562 reg = <0x21805800 0x200>; 563 num-cs = <4>; 564 ti,davinci-spi-intr-line = <0>; 565 interrupts = <GIC_SPI 66 IRQ_TYPE_EDGE_RISING>; 566 #address-cells = <1>; 567 #size-cells = <0>; 568 power-domains = <&k2g_pds 0x0011>; 569 clocks = <&k2g_clks 0x0011 0>; 570 }; 571 572 spi2: spi@21805c00 { 573 compatible = "ti,keystone-spi"; 574 reg = <0x21805C00 0x200>; 575 num-cs = <4>; 576 ti,davinci-spi-intr-line = <0>; 577 interrupts = <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>; 578 #address-cells = <1>; 579 #size-cells = <0>; 580 power-domains = <&k2g_pds 0x0012>; 581 clocks = <&k2g_clks 0x0012 0>; 582 }; 583 584 spi3: spi@21806000 { 585 compatible = "ti,keystone-spi"; 586 reg = <0x21806000 0x200>; 587 num-cs = <4>; 588 ti,davinci-spi-intr-line = <0>; 589 interrupts = <GIC_SPI 70 IRQ_TYPE_EDGE_RISING>; 590 #address-cells = <1>; 591 #size-cells = <0>; 592 power-domains = <&k2g_pds 0x0013>; 593 clocks = <&k2g_clks 0x0013 0>; 594 }; 595 596 wdt: wdt@02250000 { 597 compatible = "ti,keystone-wdt", "ti,davinci-wdt"; 598 reg = <0x02250000 0x80>; 599 power-domains = <&k2g_pds 0x22>; 600 clocks = <&k2g_clks 0x22 0>; 601 }; 602 603 emif: emif@21010000 { 604 compatible = "ti,emif-keystone"; 605 reg = <0x21010000 0x200>; 606 interrupts = <GIC_SPI 123 IRQ_TYPE_EDGE_RISING>; 607 }; 608 609 mdio: mdio@4200f00 { 610 compatible = "ti,keystone_mdio", "ti,davinci_mdio"; 611 reg = <0x04200f00 0x100>; 612 #address-cells = <1>; 613 #size-cells = <0>; 614 clocks = <&k2g_clks 0x0018 3>; 615 clock-names = "fck"; 616 power-domains = <&k2g_pds 0x0018>; 617 status = "disabled"; 618 bus_freq = <2500000>; 619 }; 620 #include "keystone-k2g-netcp.dtsi" 621 }; 622}; 623
