1/* 2 * Copyright 2017 Gateworks Corporation 3 * 4 * This file is dual-licensed: you can use it either under the terms 5 * of the GPL or the X11 license, at your option. Note that this dual 6 * licensing only applies to this file, and not this project as a 7 * whole. 8 * 9 * a) This file is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This file is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public 20 * License along with this file; if not, write to the Free 21 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, 22 * MA 02110-1301 USA 23 * 24 * Or, alternatively, 25 * 26 * b) Permission is hereby granted, free of charge, to any person 27 * obtaining a copy of this software and associated documentation 28 * files (the "Software"), to deal in the Software without 29 * restriction, including without limitation the rights to use, 30 * copy, modify, merge, publish, distribute, sublicense, and/or 31 * sell copies of the Software, and to permit persons to whom the 32 * Software is furnished to do so, subject to the following 33 * conditions: 34 * 35 * The above copyright notice and this permission notice shall be 36 * included in all copies or substantial portions of the Software. 37 * 38 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 39 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 40 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 41 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 42 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 43 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 44 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 45 * OTHER DEALINGS IN THE SOFTWARE. 46 */ 47 48#include <dt-bindings/gpio/gpio.h> 49#include <dt-bindings/input/input.h> 50 51/ { 52 /* these are used by bootloader for disabling nodes */ 53 aliases { 54 led0 = &led0; 55 led1 = &led1; 56 led2 = &led2; 57 ssi0 = &ssi1; 58 usb0 = &usbh1; 59 usb1 = &usbotg; 60 }; 61 62 chosen { 63 stdout-path = &uart2; 64 }; 65 66 backlight-display { 67 compatible = "pwm-backlight"; 68 pwms = <&pwm4 0 5000000>; 69 brightness-levels = < 70 0 1 2 3 4 5 6 7 8 9 71 10 11 12 13 14 15 16 17 18 19 72 20 21 22 23 24 25 26 27 28 29 73 30 31 32 33 34 35 36 37 38 39 74 40 41 42 43 44 45 46 47 48 49 75 50 51 52 53 54 55 56 57 58 59 76 60 61 62 63 64 65 66 67 68 69 77 70 71 72 73 74 75 76 77 78 79 78 80 81 82 83 84 85 86 87 88 89 79 90 91 92 93 94 95 96 97 98 99 80 100 81 >; 82 default-brightness-level = <100>; 83 }; 84 85 backlight-keypad { 86 compatible = "gpio-backlight"; 87 gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>; 88 default-on; 89 }; 90 91 leds { 92 compatible = "gpio-leds"; 93 pinctrl-names = "default"; 94 pinctrl-0 = <&pinctrl_gpio_leds>; 95 96 led0: user1 { 97 label = "user1"; 98 gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ 99 default-state = "on"; 100 linux,default-trigger = "heartbeat"; 101 }; 102 103 led1: user2 { 104 label = "user2"; 105 gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ 106 default-state = "off"; 107 }; 108 109 led2: user3 { 110 label = "user3"; 111 gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */ 112 default-state = "off"; 113 }; 114 }; 115 116 memory@10000000 { 117 device_type = "memory"; 118 reg = <0x10000000 0x40000000>; 119 }; 120 121 pps { 122 compatible = "pps-gpio"; 123 pinctrl-names = "default"; 124 pinctrl-0 = <&pinctrl_pps>; 125 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; 126 }; 127 128 reg_2p5v: regulator-2p5v { 129 compatible = "regulator-fixed"; 130 regulator-name = "2P5V"; 131 regulator-min-microvolt = <2500000>; 132 regulator-max-microvolt = <2500000>; 133 regulator-always-on; 134 }; 135 136 reg_3p3v: regulator-3p3v { 137 compatible = "regulator-fixed"; 138 regulator-name = "3P3V"; 139 regulator-min-microvolt = <3300000>; 140 regulator-max-microvolt = <3300000>; 141 regulator-always-on; 142 }; 143 144 reg_5p0v: regulator-5p0v { 145 compatible = "regulator-fixed"; 146 regulator-name = "5P0V"; 147 regulator-min-microvolt = <5000000>; 148 regulator-max-microvolt = <5000000>; 149 regulator-always-on; 150 }; 151 152 reg_12p0v: regulator-12p0v { 153 compatible = "regulator-fixed"; 154 regulator-name = "12P0V"; 155 regulator-min-microvolt = <12000000>; 156 regulator-max-microvolt = <12000000>; 157 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>; 158 enable-active-high; 159 }; 160 161 reg_1p4v: regulator-vddsoc { 162 compatible = "regulator-fixed"; 163 regulator-name = "vdd_soc"; 164 regulator-min-microvolt = <1400000>; 165 regulator-max-microvolt = <1400000>; 166 regulator-always-on; 167 }; 168 169 reg_usb_h1_vbus: regulator-usb-h1-vbus { 170 compatible = "regulator-fixed"; 171 regulator-name = "usb_h1_vbus"; 172 regulator-min-microvolt = <5000000>; 173 regulator-max-microvolt = <5000000>; 174 regulator-always-on; 175 }; 176 177 reg_usb_otg_vbus: regulator-usb-otg-vbus { 178 compatible = "regulator-fixed"; 179 regulator-name = "usb_otg_vbus"; 180 regulator-min-microvolt = <5000000>; 181 regulator-max-microvolt = <5000000>; 182 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; 183 enable-active-high; 184 }; 185 186 sound { 187 compatible = "fsl,imx6q-ventana-sgtl5000", 188 "fsl,imx-audio-sgtl5000"; 189 model = "sgtl5000-audio"; 190 ssi-controller = <&ssi1>; 191 audio-codec = <&sgtl5000>; 192 audio-routing = 193 "MIC_IN", "Mic Jack", 194 "Mic Jack", "Mic Bias", 195 "Headphone Jack", "HP_OUT"; 196 mux-int-port = <1>; 197 mux-ext-port = <4>; 198 }; 199}; 200 201&audmux { 202 pinctrl-names = "default"; 203 pinctrl-0 = <&pinctrl_audmux>; 204 status = "okay"; 205}; 206 207&ecspi3 { 208 cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>; 209 pinctrl-names = "default"; 210 pinctrl-0 = <&pinctrl_ecspi3>; 211 status = "okay"; 212}; 213 214&can1 { 215 pinctrl-names = "default"; 216 pinctrl-0 = <&pinctrl_flexcan>; 217 status = "okay"; 218}; 219 220&clks { 221 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, 222 <&clks IMX6QDL_CLK_LDB_DI1_SEL>; 223 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>, 224 <&clks IMX6QDL_CLK_PLL3_USB_OTG>; 225}; 226 227&fec { 228 pinctrl-names = "default"; 229 pinctrl-0 = <&pinctrl_enet>; 230 phy-mode = "rgmii-id"; 231 phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; 232 status = "okay"; 233}; 234 235&hdmi { 236 ddc-i2c-bus = <&i2c3>; 237 status = "okay"; 238}; 239 240&i2c1 { 241 clock-frequency = <100000>; 242 pinctrl-names = "default"; 243 pinctrl-0 = <&pinctrl_i2c1>; 244 status = "okay"; 245 246 eeprom1: eeprom@50 { 247 compatible = "atmel,24c02"; 248 reg = <0x50>; 249 pagesize = <16>; 250 }; 251 252 eeprom2: eeprom@51 { 253 compatible = "atmel,24c02"; 254 reg = <0x51>; 255 pagesize = <16>; 256 }; 257 258 eeprom3: eeprom@52 { 259 compatible = "atmel,24c02"; 260 reg = <0x52>; 261 pagesize = <16>; 262 }; 263 264 eeprom4: eeprom@53 { 265 compatible = "atmel,24c02"; 266 reg = <0x53>; 267 pagesize = <16>; 268 }; 269 270 pca9555: gpio@23 { 271 compatible = "nxp,pca9555"; 272 reg = <0x23>; 273 gpio-controller; 274 #gpio-cells = <2>; 275 }; 276 277 ds1672: rtc@68 { 278 compatible = "dallas,ds1672"; 279 reg = <0x68>; 280 }; 281}; 282 283&i2c2 { 284 clock-frequency = <100000>; 285 pinctrl-names = "default"; 286 pinctrl-0 = <&pinctrl_i2c2>; 287 status = "okay"; 288 289 sgtl5000: codec@a { 290 compatible = "fsl,sgtl5000"; 291 reg = <0x0a>; 292 #sound-dai-cells = <0>; 293 clocks = <&clks IMX6QDL_CLK_CKO>; 294 VDDA-supply = <®_1p8v>; 295 VDDIO-supply = <®_3p3v>; 296 }; 297 298 tca8418: keypad@34 { 299 compatible = "ti,tca8418"; 300 pinctrl-names = "default"; 301 pinctrl-0 = <&pinctrl_keypad>; 302 reg = <0x34>; 303 interrupt-parent = <&gpio5>; 304 interrupts = <11 IRQ_TYPE_EDGE_FALLING>; 305 linux,keymap = < MATRIX_KEY(0x00, 0x01, BTN_0) 306 MATRIX_KEY(0x00, 0x00, BTN_1) 307 MATRIX_KEY(0x01, 0x01, BTN_2) 308 MATRIX_KEY(0x01, 0x00, BTN_3) 309 MATRIX_KEY(0x02, 0x00, BTN_4) 310 MATRIX_KEY(0x00, 0x03, BTN_5) 311 MATRIX_KEY(0x00, 0x02, BTN_6) 312 MATRIX_KEY(0x01, 0x03, BTN_7) 313 MATRIX_KEY(0x01, 0x02, BTN_8) 314 MATRIX_KEY(0x02, 0x02, BTN_9) 315 >; 316 keypad,num-rows = <4>; 317 keypad,num-columns = <4>; 318 }; 319 320 ltc3676: pmic@3c { 321 compatible = "lltc,ltc3676"; 322 pinctrl-names = "default"; 323 pinctrl-0 = <&pinctrl_pmic>; 324 reg = <0x3c>; 325 interrupt-parent = <&gpio1>; 326 interrupts = <8 IRQ_TYPE_EDGE_FALLING>; 327 328 regulators { 329 /* VDD_DDR (1+R1/R2 = 2.105) */ 330 reg_vdd_ddr: sw2 { 331 regulator-name = "vddddr"; 332 regulator-min-microvolt = <868310>; 333 regulator-max-microvolt = <1684000>; 334 lltc,fb-voltage-divider = <221000 200000>; 335 regulator-ramp-delay = <7000>; 336 regulator-boot-on; 337 regulator-always-on; 338 }; 339 340 /* VDD_ARM (1+R1/R2 = 1.931) */ 341 reg_vdd_arm: sw3 { 342 regulator-name = "vddarm"; 343 regulator-min-microvolt = <796551>; 344 regulator-max-microvolt = <1544827>; 345 lltc,fb-voltage-divider = <243000 261000>; 346 regulator-ramp-delay = <7000>; 347 regulator-boot-on; 348 regulator-always-on; 349 linux,phandle = <®_vdd_arm>; 350 }; 351 352 /* VDD_1P8 (1+R1/R2 = 2.505): GPS/VideoIn/ENET-PHY */ 353 reg_1p8v: sw4 { 354 regulator-name = "vdd1p8"; 355 regulator-min-microvolt = <1033310>; 356 regulator-max-microvolt = <2004000>; 357 lltc,fb-voltage-divider = <301000 200000>; 358 regulator-ramp-delay = <7000>; 359 regulator-boot-on; 360 regulator-always-on; 361 }; 362 363 /* VDD_1P0 (1+R1/R2 = 1.39): PCIe/ENET-PHY */ 364 reg_1p0v: ldo2 { 365 regulator-name = "vdd1p0"; 366 regulator-min-microvolt = <950000>; 367 regulator-max-microvolt = <1050000>; 368 lltc,fb-voltage-divider = <78700 200000>; 369 regulator-boot-on; 370 regulator-always-on; 371 }; 372 373 /* VDD_AUD_1P8: Audio codec */ 374 reg_aud_1p8v: ldo3 { 375 regulator-name = "vdd1p8a"; 376 regulator-min-microvolt = <1800000>; 377 regulator-max-microvolt = <1800000>; 378 regulator-boot-on; 379 }; 380 381 /* VDD_HIGH (1+R1/R2 = 4.17) */ 382 reg_3p0v: ldo4 { 383 regulator-name = "vdd3p0"; 384 regulator-min-microvolt = <3023250>; 385 regulator-max-microvolt = <3023250>; 386 lltc,fb-voltage-divider = <634000 200000>; 387 regulator-boot-on; 388 regulator-always-on; 389 }; 390 }; 391 }; 392}; 393 394&i2c3 { 395 clock-frequency = <100000>; 396 pinctrl-names = "default"; 397 pinctrl-0 = <&pinctrl_i2c3>; 398 status = "okay"; 399 400 egalax_ts: touchscreen@4 { 401 compatible = "eeti,egalax_ts"; 402 reg = <0x04>; 403 interrupt-parent = <&gpio5>; 404 interrupts = <12 IRQ_TYPE_EDGE_FALLING>; 405 wakeup-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; 406 }; 407}; 408 409&ldb { 410 fsl,dual-channel; 411 status = "okay"; 412 413 lvds-channel@0 { 414 fsl,data-mapping = "spwg"; 415 fsl,data-width = <18>; 416 status = "okay"; 417 418 display-timings { 419 native-mode = <&timing0>; 420 timing0: hsd100pxn1 { 421 clock-frequency = <65000000>; 422 hactive = <1024>; 423 vactive = <768>; 424 hback-porch = <220>; 425 hfront-porch = <40>; 426 vback-porch = <21>; 427 vfront-porch = <7>; 428 hsync-len = <60>; 429 vsync-len = <10>; 430 }; 431 }; 432 }; 433}; 434 435&pcie { 436 pinctrl-names = "default"; 437 pinctrl-0 = <&pinctrl_pcie>; 438 reset-gpio = <&gpio4 31 GPIO_ACTIVE_LOW>; 439 status = "okay"; 440}; 441 442&pwm2 { 443 pinctrl-names = "default"; 444 pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */ 445 status = "disabled"; 446}; 447 448&pwm3 { 449 pinctrl-names = "default"; 450 pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */ 451 status = "disabled"; 452}; 453 454&pwm4 { 455 pinctrl-names = "default"; 456 pinctrl-0 = <&pinctrl_pwm4>; 457 status = "okay"; 458}; 459 460&ssi1 { 461 status = "okay"; 462}; 463 464&uart1 { 465 pinctrl-names = "default"; 466 pinctrl-0 = <&pinctrl_uart1>; 467 uart-has-rtscts; 468 rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>; 469 status = "okay"; 470}; 471 472&uart2 { 473 pinctrl-names = "default"; 474 pinctrl-0 = <&pinctrl_uart2>; 475 status = "okay"; 476}; 477 478&uart5 { 479 pinctrl-names = "default"; 480 pinctrl-0 = <&pinctrl_uart5>; 481 status = "okay"; 482}; 483 484&usbotg { 485 vbus-supply = <®_usb_otg_vbus>; 486 pinctrl-names = "default"; 487 pinctrl-0 = <&pinctrl_usbotg>; 488 disable-over-current; 489 status = "okay"; 490}; 491 492&usbh1 { 493 vbus-supply = <®_usb_h1_vbus>; 494 pinctrl-names = "default"; 495 pinctrl-0 = <&pinctrl_usbh1>; 496 status = "okay"; 497}; 498 499&usdhc2 { 500 pinctrl-names = "default"; 501 pinctrl-0 = <&pinctrl_usdhc2>; 502 bus-width = <8>; 503 vmmc-supply = <®_3p3v>; 504 non-removable; 505 status = "okay"; 506}; 507 508&usdhc3 { 509 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 510 pinctrl-0 = <&pinctrl_usdhc3>; 511 pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 512 pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 513 cd-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; 514 vmmc-supply = <®_3p3v>; 515 status = "okay"; 516}; 517 518&wdog1 { 519 pinctrl-names = "default"; 520 pinctrl-0 = <&pinctrl_wdog>; 521 fsl,ext-reset-output; 522}; 523 524&iomuxc { 525 pinctrl_audmux: audmuxgrp { 526 fsl,pins = < 527 /* AUD4 */ 528 MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0 529 MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0 530 MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0 531 MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0 532 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* AUD4_MCK */ 533 /* AUD6 */ 534 MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x130b0 535 MX6QDL_PAD_DI0_PIN3__AUD6_TXFS 0x130b0 536 MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x130b0 537 MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x130b0 538 >; 539 }; 540 541 pinctrl_ecspi3: escpi3grp { 542 fsl,pins = < 543 MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 544 MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 545 MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1 546 MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x100b1 547 >; 548 }; 549 550 pinctrl_enet: enetgrp { 551 fsl,pins = < 552 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 553 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 554 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 555 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 556 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 557 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 558 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 559 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 560 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 561 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 562 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 563 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 564 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 565 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 566 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 567 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 568 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x4001b0b0 /* PHY_RST# */ 569 >; 570 }; 571 572 pinctrl_flexcan: flexcangrp { 573 fsl,pins = < 574 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1 575 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1 576 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0 /* CAN_STBY */ 577 >; 578 }; 579 580 pinctrl_gpio_leds: gpioledsgrp { 581 fsl,pins = < 582 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 583 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0 584 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0 585 >; 586 }; 587 588 pinctrl_i2c1: i2c1grp { 589 fsl,pins = < 590 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 591 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 592 >; 593 }; 594 595 pinctrl_i2c2: i2c2grp { 596 fsl,pins = < 597 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 598 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 599 >; 600 }; 601 602 pinctrl_i2c3: i2c3grp { 603 fsl,pins = < 604 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 605 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 606 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x4001b0b0 /* DIOI2C_DIS# */ 607 MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x0001b0b0 /* LVDS_TOUCH_IRQ# */ 608 MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x0001b0b0 /* LVDS_BACKEN */ 609 >; 610 }; 611 612 pinctrl_keypad: keypadgrp { 613 fsl,pins = < 614 MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11 0x0001b0b0 /* KEYPAD_IRQ# */ 615 MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x0001b0b0 /* KEYPAD_LED_EN */ 616 >; 617 }; 618 619 pinctrl_pcie: pciegrp { 620 fsl,pins = < 621 MX6QDL_PAD_DISP0_DAT10__GPIO4_IO31 0x1b0b0 /* PCI_RST# */ 622 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x4001b0b0 /* PCIESKT_WDIS# */ 623 >; 624 }; 625 626 pinctrl_pmic: pmicgrp { 627 fsl,pins = < 628 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */ 629 >; 630 }; 631 632 pinctrl_pps: ppsgrp { 633 fsl,pins = < 634 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1 635 >; 636 }; 637 638 pinctrl_pwm2: pwm2grp { 639 fsl,pins = < 640 MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 641 >; 642 }; 643 644 pinctrl_pwm3: pwm3grp { 645 fsl,pins = < 646 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 647 >; 648 }; 649 650 pinctrl_pwm4: pwm4grp { 651 fsl,pins = < 652 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 653 >; 654 }; 655 656 pinctrl_uart1: uart1grp { 657 fsl,pins = < 658 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 659 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 660 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x4001b0b1 /* TEN */ 661 >; 662 }; 663 664 pinctrl_uart2: uart2grp { 665 fsl,pins = < 666 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 667 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 668 >; 669 }; 670 671 pinctrl_uart5: uart5grp { 672 fsl,pins = < 673 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 674 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 675 >; 676 }; 677 678 pinctrl_usbh1: usbh1grp { 679 fsl,pins = < 680 MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x4001b0b0 /* USBHUB_RST# */ 681 >; 682 }; 683 684 pinctrl_usbotg: usbotggrp { 685 fsl,pins = < 686 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 687 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* PWR_EN */ 688 MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0 /* OC */ 689 >; 690 }; 691 692 pinctrl_usdhc2: usdhc2grp { 693 fsl,pins = < 694 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170f9 695 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100f9 696 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170f9 697 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170f9 698 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170f9 699 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170f9 700 MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x170f9 701 MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x170f9 702 MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x170f9 703 MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x170f9 704 >; 705 }; 706 707 pinctrl_usdhc3: usdhc3grp { 708 fsl,pins = < 709 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 710 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 711 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 712 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 713 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 714 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 715 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */ 716 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059 717 >; 718 }; 719 720 pinctrl_usdhc3_100mhz: usdhc3grp100mhz { 721 fsl,pins = < 722 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9 723 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9 724 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9 725 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9 726 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9 727 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9 728 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */ 729 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9 730 >; 731 }; 732 733 pinctrl_usdhc3_200mhz: usdhc3grp200mhz { 734 fsl,pins = < 735 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9 736 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9 737 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9 738 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9 739 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9 740 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9 741 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */ 742 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9 743 >; 744 }; 745 746 pinctrl_wdog: wdoggrp { 747 fsl,pins = < 748 MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0 749 >; 750 }; 751}; 752
