1/* 2 * Support for imx6 based Advantech DMS-BA16 Qseven module 3 * 4 * Copyright 2015 Timesys Corporation. 5 * Copyright 2015 General Electric Company 6 * 7 * This file is dual-licensed: you can use it either under the terms 8 * of the GPL or the X11 license, at your option. Note that this dual 9 * licensing only applies to this file, and not this project as a 10 * whole. 11 * 12 * a) This file is free software; you can redistribute it and/or 13 * modify it under the terms of the GNU General Public License 14 * version 2 as published by the Free Software Foundation. 15 * 16 * This file is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 * Or, alternatively, 22 * 23 * b) Permission is hereby granted, free of charge, to any person 24 * obtaining a copy of this software and associated documentation 25 * files (the "Software"), to deal in the Software without 26 * restriction, including without limitation the rights to use, 27 * copy, modify, merge, publish, distribute, sublicense, and/or 28 * sell copies of the Software, and to permit persons to whom the 29 * Software is furnished to do so, subject to the following 30 * conditions: 31 * 32 * The above copyright notice and this permission notice shall be 33 * included in all copies or substantial portions of the Software. 34 * 35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 40 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 42 * OTHER DEALINGS IN THE SOFTWARE. 43 */ 44 45#include "imx6q.dtsi" 46#include <dt-bindings/gpio/gpio.h> 47 48/ { 49 memory@10000000 { 50 device_type = "memory"; 51 reg = <0x10000000 0x40000000>; 52 }; 53 54 backlight_lvds: backlight { 55 compatible = "pwm-backlight"; 56 pinctrl-names = "default"; 57 pinctrl-0 = <&pinctrl_display>; 58 pwms = <&pwm1 0 5000000>; 59 brightness-levels = < 0 1 2 3 4 5 6 7 8 9 60 10 11 12 13 14 15 16 17 18 19 61 20 21 22 23 24 25 26 27 28 29 62 30 31 32 33 34 35 36 37 38 39 63 40 41 42 43 44 45 46 47 48 49 64 50 51 52 53 54 55 56 57 58 59 65 60 61 62 63 64 65 66 67 68 69 66 70 71 72 73 74 75 76 77 78 79 67 80 81 82 83 84 85 86 87 88 89 68 90 91 92 93 94 95 96 97 98 99 69 100 101 102 103 104 105 106 107 108 109 70 110 111 112 113 114 115 116 117 118 119 71 120 121 122 123 124 125 126 127 128 129 72 130 131 132 133 134 135 136 137 138 139 73 140 141 142 143 144 145 146 147 148 149 74 150 151 152 153 154 155 156 157 158 159 75 160 161 162 163 164 165 166 167 168 169 76 170 171 172 173 174 175 176 177 178 179 77 180 181 182 183 184 185 186 187 188 189 78 190 191 192 193 194 195 196 197 198 199 79 200 201 202 203 204 205 206 207 208 209 80 210 211 212 213 214 215 216 217 218 219 81 220 221 222 223 224 225 226 227 228 229 82 230 231 232 233 234 235 236 237 238 239 83 240 241 242 243 244 245 246 247 248 249 84 250 251 252 253 254 255>; 85 default-brightness-level = <255>; 86 enable-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>; 87 }; 88 89 reg_1p8v: regulator-1p8v { 90 compatible = "regulator-fixed"; 91 regulator-name = "1P8V"; 92 regulator-min-microvolt = <1800000>; 93 regulator-max-microvolt = <1800000>; 94 regulator-always-on; 95 }; 96 97 reg_3p3v: regulator-3p3v { 98 compatible = "regulator-fixed"; 99 regulator-name = "3P3V"; 100 regulator-min-microvolt = <3300000>; 101 regulator-max-microvolt = <3300000>; 102 regulator-always-on; 103 }; 104 105 reg_lvds: regulator-lvds { 106 compatible = "regulator-fixed"; 107 regulator-name = "lvds_ppen"; 108 regulator-min-microvolt = <3300000>; 109 regulator-max-microvolt = <3300000>; 110 regulator-boot-on; 111 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; 112 enable-active-high; 113 }; 114 115 reg_usb_h1_vbus: regulator-usbh1vbus { 116 compatible = "regulator-fixed"; 117 regulator-name = "usb_h1_vbus"; 118 regulator-min-microvolt = <5000000>; 119 regulator-max-microvolt = <5000000>; 120 }; 121 122 reg_usb_otg_vbus: regulator-usbotgvbus { 123 compatible = "regulator-fixed"; 124 regulator-name = "usb_otg_vbus"; 125 regulator-min-microvolt = <5000000>; 126 regulator-max-microvolt = <5000000>; 127 }; 128}; 129 130&audmux { 131 pinctrl-names = "default"; 132 pinctrl-0 = <&pinctrl_audmux>; 133 status = "okay"; 134}; 135 136&ecspi1 { 137 cs-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>; 138 pinctrl-names = "default"; 139 pinctrl-0 = <&pinctrl_ecspi1>; 140 status = "okay"; 141 142 flash: n25q032@0 { 143 compatible = "jedec,spi-nor"; 144 #address-cells = <1>; 145 #size-cells = <1>; 146 spi-max-frequency = <20000000>; 147 reg = <0>; 148 149 partition@0 { 150 label = "U-Boot"; 151 reg = <0x0 0xc0000>; 152 }; 153 154 partition@c0000 { 155 label = "env"; 156 reg = <0xc0000 0x10000>; 157 }; 158 159 partition@d0000 { 160 label = "spare"; 161 reg = <0xd0000 0x320000>; 162 }; 163 164 partition@3f0000 { 165 label = "mfg"; 166 reg = <0x3f0000 0x10000>; 167 }; 168 }; 169}; 170 171&fec { 172 pinctrl-names = "default"; 173 pinctrl-0 = <&pinctrl_enet>; 174 phy-mode = "rgmii-id"; 175 status = "okay"; 176}; 177 178&hdmi { 179 ddc-i2c-bus = <&i2c2>; 180 status = "okay"; 181}; 182 183&i2c1 { 184 clock-frequency = <100000>; 185 pinctrl-names = "default"; 186 pinctrl-0 = <&pinctrl_i2c1>; 187 status = "okay"; 188}; 189 190&i2c2 { 191 clock-frequency = <100000>; 192 pinctrl-names = "default"; 193 pinctrl-0 = <&pinctrl_i2c2>; 194 status = "okay"; 195}; 196 197&i2c3 { 198 clock-frequency = <100000>; 199 pinctrl-names = "default"; 200 pinctrl-0 = <&pinctrl_i2c3>; 201 status = "okay"; 202 203 pmic@58 { 204 compatible = "dlg,da9063"; 205 reg = <0x58>; 206 pinctrl-names = "default"; 207 pinctrl-0 = <&pinctrl_pmic>; 208 interrupt-parent = <&gpio7>; 209 interrupts = <13 IRQ_TYPE_LEVEL_LOW>; 210 211 onkey { 212 compatible = "dlg,da9063-onkey"; 213 }; 214 215 regulators { 216 vdd_bcore1: bcore1 { 217 regulator-min-microvolt = <1420000>; 218 regulator-max-microvolt = <1420000>; 219 regulator-always-on; 220 regulator-boot-on; 221 }; 222 223 vdd_bcore2: bcore2 { 224 regulator-min-microvolt = <1420000>; 225 regulator-max-microvolt = <1420000>; 226 regulator-always-on; 227 regulator-boot-on; 228 }; 229 230 vdd_bpro: bpro { 231 regulator-min-microvolt = <1500000>; 232 regulator-max-microvolt = <1500000>; 233 regulator-always-on; 234 regulator-boot-on; 235 }; 236 237 vdd_bmem: bmem { 238 regulator-min-microvolt = <1800000>; 239 regulator-max-microvolt = <1800000>; 240 regulator-always-on; 241 regulator-boot-on; 242 }; 243 244 vdd_bio: bio { 245 regulator-min-microvolt = <1800000>; 246 regulator-max-microvolt = <1800000>; 247 regulator-always-on; 248 regulator-boot-on; 249 }; 250 251 vdd_bperi: bperi { 252 regulator-min-microvolt = <3300000>; 253 regulator-max-microvolt = <3300000>; 254 regulator-always-on; 255 regulator-boot-on; 256 }; 257 258 vdd_ldo1: ldo1 { 259 regulator-min-microvolt = <600000>; 260 regulator-max-microvolt = <1860000>; 261 }; 262 263 vdd_ldo2: ldo2 { 264 regulator-min-microvolt = <600000>; 265 regulator-max-microvolt = <1860000>; 266 }; 267 268 vdd_ldo3: ldo3 { 269 regulator-min-microvolt = <900000>; 270 regulator-max-microvolt = <3440000>; 271 }; 272 273 vdd_ldo4: ldo4 { 274 regulator-min-microvolt = <900000>; 275 regulator-max-microvolt = <3440000>; 276 }; 277 278 vdd_ldo5: ldo5 { 279 regulator-min-microvolt = <900000>; 280 regulator-max-microvolt = <3600000>; 281 }; 282 283 vdd_ldo6: ldo6 { 284 regulator-min-microvolt = <900000>; 285 regulator-max-microvolt = <3600000>; 286 }; 287 288 vdd_ldo7: ldo7 { 289 regulator-min-microvolt = <900000>; 290 regulator-max-microvolt = <3600000>; 291 }; 292 293 vdd_ldo8: ldo8 { 294 regulator-min-microvolt = <900000>; 295 regulator-max-microvolt = <3600000>; 296 }; 297 298 vdd_ldo9: ldo9 { 299 regulator-min-microvolt = <950000>; 300 regulator-max-microvolt = <3600000>; 301 }; 302 303 vdd_ldo10: ldo10 { 304 regulator-min-microvolt = <900000>; 305 regulator-max-microvolt = <3600000>; 306 }; 307 308 vdd_ldo11: ldo11 { 309 regulator-min-microvolt = <900000>; 310 regulator-max-microvolt = <3600000>; 311 regulator-always-on; 312 regulator-boot-on; 313 }; 314 }; 315 }; 316 317 rtc@32 { 318 compatible = "epson,rx8010"; 319 pinctrl-names = "default"; 320 pinctrl-0 = <&pinctrl_rtc>; 321 reg = <0x32>; 322 interrupt-parent = <&gpio4>; 323 interrupts = <10 IRQ_TYPE_LEVEL_HIGH>; 324 }; 325}; 326 327&pcie { 328 pinctrl-names = "default"; 329 pinctrl-0 = <&pinctrl_pcie>; 330 reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>; 331 fsl,tx-swing-full = <103>; 332 fsl,tx-swing-low = <103>; 333 status = "okay"; 334}; 335 336&pwm1 { 337 pinctrl-names = "default"; 338 pinctrl-0 = <&pinctrl_pwm1>; 339 status = "okay"; 340}; 341 342&pwm2 { 343 pinctrl-names = "default"; 344 pinctrl-0 = <&pinctrl_pwm2>; 345 status = "disabled"; 346}; 347 348&sata { 349 status = "okay"; 350}; 351 352&ssi1 { 353 status = "okay"; 354}; 355 356&uart3 { 357 pinctrl-names = "default"; 358 pinctrl-0 = <&pinctrl_uart3>; 359 uart-has-rtscts; 360 status = "okay"; 361}; 362 363&uart4 { 364 pinctrl-names = "default"; 365 pinctrl-0 = <&pinctrl_uart4>; 366 status = "okay"; 367}; 368 369&usbh1 { 370 pinctrl-names = "default"; 371 pinctrl-0 = <&pinctrl_usbhub>; 372 vbus-supply = <®_usb_h1_vbus>; 373 reset-gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>; 374 status = "okay"; 375}; 376 377&usbotg { 378 vbus-supply = <®_usb_otg_vbus>; 379 pinctrl-names = "default"; 380 pinctrl-0 = <&pinctrl_usbotg>; 381 disable-over-current; 382 status = "okay"; 383}; 384 385&usdhc2 { 386 pinctrl-names = "default"; 387 pinctrl-0 = <&pinctrl_usdhc2>; 388 cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; 389 no-1-8-v; 390 keep-power-in-suspend; 391 wakeup-source; 392 status = "okay"; 393}; 394 395&usdhc3 { 396 pinctrl-names = "default"; 397 pinctrl-0 = <&pinctrl_usdhc3 &pinctrl_usdhc3_reset>; 398 bus-width = <8>; 399 vmmc-supply = <&vdd_bperi>; 400 non-removable; 401 keep-power-in-suspend; 402 status = "okay"; 403}; 404 405&wdog1 { 406 pinctrl-names = "default"; 407 pinctrl-0 = <&pinctrl_wdog>; 408 fsl,ext-reset-output; 409}; 410 411&iomuxc { 412 pinctrl-names = "default"; 413 pinctrl-0 = <&pinctrl_hog>; 414 415 pinctrl_audmux: audmuxgrp { 416 fsl,pins = < 417 MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0 418 MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x130b0 419 MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0 420 MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0 421 >; 422 }; 423 424 pinctrl_display: dispgrp { 425 fsl,pins = < 426 /* BLEN_OUT */ 427 MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 428 /* LVDS_PPEN_OUT */ 429 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 430 >; 431 }; 432 433 pinctrl_ecspi1: ecspi1grp { 434 fsl,pins = < 435 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 436 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 437 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 438 /* SPI1 CS */ 439 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0 440 >; 441 }; 442 443 pinctrl_ecspi5: ecspi5grp { 444 fsl,pins = < 445 MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO 0x1b0b0 446 MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI 0x1b0b0 447 MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK 0x1b0b0 448 MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b0 449 >; 450 }; 451 452 pinctrl_enet: enetgrp { 453 fsl,pins = < 454 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0 455 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0 456 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030 457 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030 458 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030 459 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030 460 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030 461 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030 462 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 463 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 464 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 465 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 466 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 467 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 468 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 469 /* FEC Reset */ 470 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 471 /* AR8033 Interrupt */ 472 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0 473 >; 474 }; 475 476 pinctrl_hog: hoggrp { 477 fsl,pins = < 478 /* GPIO 0-7 */ 479 MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0 480 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0 481 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0 482 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0 483 MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0 484 MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x1b0b0 485 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 486 MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x1b0b0 487 /* SUS_S3_OUT to CPLD */ 488 MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0 489 >; 490 }; 491 492 pinctrl_i2c1: i2c1grp { 493 fsl,pins = < 494 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 495 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 496 >; 497 }; 498 499 pinctrl_i2c2: i2c2grp { 500 fsl,pins = < 501 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 502 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 503 >; 504 }; 505 506 pinctrl_i2c3: i2c3grp { 507 fsl,pins = < 508 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 509 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 510 >; 511 }; 512 513 pinctrl_pcie: pciegrp { 514 fsl,pins = < 515 /* PCIe Reset */ 516 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0 517 /* PCIe Wake */ 518 MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0 519 >; 520 }; 521 522 pinctrl_pmic: pmicgrp { 523 fsl,pins = < 524 /* PMIC Interrupt */ 525 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0 526 >; 527 }; 528 529 pinctrl_pwm1: pwm1grp { 530 fsl,pins = < 531 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1 532 >; 533 }; 534 535 pinctrl_pwm2: pwm2grp { 536 fsl,pins = < 537 MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1 538 >; 539 }; 540 541 pinctrl_rtc: rtcgrp { 542 fsl,pins = < 543 /* RTC_INT */ 544 MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0 545 >; 546 }; 547 548 pinctrl_uart3: uart3grp { 549 fsl,pins = < 550 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 551 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 552 MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1 553 MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1 554 >; 555 }; 556 557 pinctrl_uart4: uart4grp { 558 fsl,pins = < 559 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 560 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 561 >; 562 }; 563 564 pinctrl_usbhub: usbhubgrp { 565 fsl,pins = < 566 /* HUB_RESET */ 567 MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x1b0b0 568 >; 569 }; 570 571 pinctrl_usbotg: usbotggrp { 572 fsl,pins = < 573 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 574 >; 575 }; 576 577 pinctrl_usdhc2: usdhc2grp { 578 fsl,pins = < 579 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 580 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 581 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 582 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 583 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 584 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 585 /* uSDHC2 CD */ 586 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 587 >; 588 }; 589 590 pinctrl_usdhc3: usdhc3grp { 591 fsl,pins = < 592 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 593 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 594 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 595 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 596 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 597 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 598 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 599 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 600 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 601 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 602 >; 603 }; 604 605 pinctrl_usdhc3_reset: usdhc3grp-reset { 606 fsl,pins = < 607 MX6QDL_PAD_SD3_RST__SD3_RESET 0x170F9 608 >; 609 }; 610 611 pinctrl_usdhc4: usdhc4grp { 612 fsl,pins = < 613 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 614 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x17059 615 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 616 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 617 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 618 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 619 MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 620 MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 621 MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 622 MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 623 /* uSDHC4 CD */ 624 MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x1b0b0 625 /* uSDHC4 SDIO PWR */ 626 MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0 627 /* uSDHC4 SDIO WP */ 628 MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0 629 /* uSDHC4 SDIO LED */ 630 MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0 631 >; 632 }; 633 634 pinctrl_wdog: wdoggrp { 635 fsl,pins = < 636 MX6QDL_PAD_GPIO_9__WDOG1_B 0x1b0b0 637 >; 638 }; 639}; 640
