1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Samsung's Exynos5420 based Arndale Octa board device tree source
4 *
5 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
6 *		http://www.samsung.com
7 */
8
9/dts-v1/;
10#include "exynos5420.dtsi"
11#include "exynos5420-cpus.dtsi"
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/interrupt-controller/irq.h>
14#include <dt-bindings/input/input.h>
15#include <dt-bindings/clock/samsung,s2mps11.h>
16
17/ {
18	model = "Insignal Arndale Octa evaluation board based on EXYNOS5420";
19	compatible = "insignal,arndale-octa", "samsung,exynos5420", "samsung,exynos5";
20
21	memory@20000000 {
22		device_type = "memory";
23		reg = <0x20000000 0x80000000>;
24	};
25
26	chosen {
27		stdout-path = "serial3:115200n8";
28	};
29
30	firmware@2073000 {
31		compatible = "samsung,secure-firmware";
32		reg = <0x02073000 0x1000>;
33	};
34
35	fixed-rate-clocks {
36		oscclk {
37			compatible = "samsung,exynos5420-oscclk";
38			clock-frequency = <24000000>;
39		};
40	};
41
42	gpio_keys {
43		compatible = "gpio-keys";
44
45		wakeup {
46			label = "SW-TACT1";
47			gpios = <&gpx2 7 GPIO_ACTIVE_LOW>;
48			linux,code = <KEY_WAKEUP>;
49			wakeup-source;
50		};
51	};
52};
53
54&adc {
55	vdd-supply = <&ldo4_reg>;
56	status = "okay";
57};
58
59&cci {
60	status = "disabled";
61};
62
63&cpu0 {
64	cpu-supply = <&buck2_reg>;
65};
66
67&cpu4 {
68	cpu-supply = <&buck6_reg>;
69};
70
71&cpu0_thermal {
72	trips {
73		cpu0_alert0: cpu-alert-0 {
74			temperature = <60000>; /* millicelsius */
75			hysteresis = <5000>; /* millicelsius */
76			type = "passive";
77		};
78		cpu0_alert1: cpu-alert-1 {
79			temperature = <80000>; /* millicelsius */
80			hysteresis = <10000>; /* millicelsius */
81			type = "passive";
82		};
83		cpu0_alert2: cpu-alert-2 {
84			temperature = <110000>; /* millicelsius */
85			hysteresis = <10000>; /* millicelsius */
86			type = "passive";
87		};
88		cpu0_crit0: cpu-crit-0 {
89			temperature = <120000>; /* millicelsius */
90			hysteresis = <0>; /* millicelsius */
91			type = "critical";
92		};
93	};
94
95	cooling-maps {
96		/*
97		 * Reduce the CPU speed by 2 steps, down to: 1600 MHz
98		 * and 1100 MHz.
99		 */
100		map0 {
101			trip = <&cpu0_alert0>;
102			cooling-device = <&cpu0 0 2>,
103					 <&cpu1 0 2>,
104					 <&cpu2 0 2>,
105					 <&cpu3 0 2>,
106					 <&cpu4 0 2>,
107					 <&cpu5 0 2>,
108					 <&cpu6 0 2>,
109					 <&cpu7 0 2>;
110		};
111
112		/*
113		 * Reduce the CPU speed down to 1200 MHz big (6 steps)
114		 * and 800 MHz LITTLE (5 steps).
115		 */
116		map1 {
117			trip = <&cpu0_alert1>;
118			cooling-device = <&cpu0 3 6>,
119					 <&cpu1 3 6>,
120					 <&cpu2 3 6>,
121					 <&cpu3 3 6>,
122					 <&cpu4 3 5>,
123					 <&cpu5 3 5>,
124					 <&cpu6 3 5>,
125					 <&cpu7 3 5>;
126		};
127
128		/*
129		 * Reduce the CPU speed as much as possible, down to 700 MHz
130		 * big (11 steps) and 600 MHz LITTLE (7 steps).
131		 */
132		map2 {
133			trip = <&cpu0_alert2>;
134			cooling-device = <&cpu0 6 11>,
135					 <&cpu1 6 11>,
136					 <&cpu2 6 11>,
137					 <&cpu3 6 11>,
138					 <&cpu4 5 7>,
139					 <&cpu5 5 7>,
140					 <&cpu6 5 7>,
141					 <&cpu7 5 7>;
142		};
143	};
144};
145
146&cpu1_thermal {
147	trips {
148		cpu1_alert0: cpu-alert-0 {
149			temperature = <60000>; /* millicelsius */
150			hysteresis = <5000>; /* millicelsius */
151			type = "passive";
152		};
153		cpu1_alert1: cpu-alert-1 {
154			temperature = <80000>; /* millicelsius */
155			hysteresis = <10000>; /* millicelsius */
156			type = "passive";
157		};
158		cpu1_alert2: cpu-alert-2 {
159			temperature = <110000>; /* millicelsius */
160			hysteresis = <10000>; /* millicelsius */
161			type = "passive";
162		};
163		cpu1_crit0: cpu-crit-0 {
164			temperature = <120000>; /* millicelsius */
165			hysteresis = <0>; /* millicelsius */
166			type = "critical";
167		};
168	};
169
170	cooling-maps {
171		map0 {
172			trip = <&cpu1_alert0>;
173			cooling-device = <&cpu0 0 2>,
174					 <&cpu1 0 2>,
175					 <&cpu2 0 2>,
176					 <&cpu3 0 2>,
177					 <&cpu4 0 2>,
178					 <&cpu5 0 2>,
179					 <&cpu6 0 2>,
180					 <&cpu7 0 2>;
181		};
182
183		map1 {
184			trip = <&cpu1_alert1>;
185			cooling-device = <&cpu0 3 6>,
186					 <&cpu1 3 6>,
187					 <&cpu2 3 6>,
188					 <&cpu3 3 6>,
189					 <&cpu4 3 5>,
190					 <&cpu5 3 5>,
191					 <&cpu6 3 5>,
192					 <&cpu7 3 5>;
193		};
194
195		map2 {
196			trip = <&cpu1_alert2>;
197			cooling-device = <&cpu0 6 11>,
198					 <&cpu1 6 11>,
199					 <&cpu2 6 11>,
200					 <&cpu3 6 11>,
201					 <&cpu4 5 7>,
202					 <&cpu5 5 7>,
203					 <&cpu6 5 7>,
204					 <&cpu7 5 7>;
205		};
206	};
207};
208
209&cpu2_thermal {
210	trips {
211		cpu2_alert0: cpu-alert-0 {
212			temperature = <60000>; /* millicelsius */
213			hysteresis = <5000>; /* millicelsius */
214			type = "passive";
215		};
216		cpu2_alert1: cpu-alert-1 {
217			temperature = <80000>; /* millicelsius */
218			hysteresis = <10000>; /* millicelsius */
219			type = "passive";
220		};
221		cpu2_alert2: cpu-alert-2 {
222			temperature = <110000>; /* millicelsius */
223			hysteresis = <10000>; /* millicelsius */
224			type = "passive";
225		};
226		cpu2_crit0: cpu-crit-0 {
227			temperature = <120000>; /* millicelsius */
228			hysteresis = <0>; /* millicelsius */
229			type = "critical";
230		};
231	};
232
233	cooling-maps {
234		map0 {
235			trip = <&cpu2_alert0>;
236			cooling-device = <&cpu0 0 2>,
237					 <&cpu1 0 2>,
238					 <&cpu2 0 2>,
239					 <&cpu3 0 2>,
240					 <&cpu4 0 2>,
241					 <&cpu5 0 2>,
242					 <&cpu6 0 2>,
243					 <&cpu7 0 2>;
244		};
245
246		map1 {
247			trip = <&cpu2_alert1>;
248			cooling-device = <&cpu0 3 6>,
249					 <&cpu1 3 6>,
250					 <&cpu2 3 6>,
251					 <&cpu3 3 6>,
252					 <&cpu4 3 5>,
253					 <&cpu5 3 5>,
254					 <&cpu6 3 5>,
255					 <&cpu7 3 5>;
256		};
257
258		map2 {
259			trip = <&cpu2_alert2>;
260			cooling-device = <&cpu0 6 11>,
261					 <&cpu1 6 11>,
262					 <&cpu2 6 11>,
263					 <&cpu3 6 11>,
264					 <&cpu4 6 7>,
265					 <&cpu5 6 7>,
266					 <&cpu6 6 7>,
267					 <&cpu7 6 7>;
268		};
269	};
270};
271
272&cpu3_thermal {
273	trips {
274		cpu3_alert0: cpu-alert-0 {
275			temperature = <60000>; /* millicelsius */
276			hysteresis = <5000>; /* millicelsius */
277			type = "passive";
278		};
279		cpu3_alert1: cpu-alert-1 {
280			temperature = <80000>; /* millicelsius */
281			hysteresis = <10000>; /* millicelsius */
282			type = "passive";
283		};
284		cpu3_alert2: cpu-alert-2 {
285			temperature = <110000>; /* millicelsius */
286			hysteresis = <10000>; /* millicelsius */
287			type = "passive";
288		};
289		cpu3_crit0: cpu-crit-0 {
290			temperature = <120000>; /* millicelsius */
291			hysteresis = <0>; /* millicelsius */
292			type = "critical";
293		};
294	};
295
296	cooling-maps {
297		map0 {
298			trip = <&cpu3_alert0>;
299			cooling-device = <&cpu0 0 2>,
300					 <&cpu1 0 2>,
301					 <&cpu2 0 2>,
302					 <&cpu3 0 2>,
303					 <&cpu4 0 2>,
304					 <&cpu5 0 2>,
305					 <&cpu6 0 2>,
306					 <&cpu7 0 2>;
307		};
308
309		map1 {
310			trip = <&cpu3_alert1>;
311			cooling-device = <&cpu0 3 6>,
312					 <&cpu1 3 6>,
313					 <&cpu2 3 6>,
314					 <&cpu3 3 6>,
315					 <&cpu4 3 5>,
316					 <&cpu5 3 5>,
317					 <&cpu6 3 5>,
318					 <&cpu7 3 5>;
319		};
320
321		map2 {
322			trip = <&cpu3_alert2>;
323			cooling-device = <&cpu0 6 11>,
324					 <&cpu1 6 11>,
325					 <&cpu2 6 11>,
326					 <&cpu3 6 11>,
327					 <&cpu4 5 7>,
328					 <&cpu5 5 7>,
329					 <&cpu6 5 7>,
330					 <&cpu7 5 7>;
331		};
332	};
333};
334
335&hdmi {
336	hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
337	vdd_osc-supply = <&ldo7_reg>;
338	vdd_pll-supply = <&ldo6_reg>;
339	vdd-supply = <&ldo6_reg>;
340	ddc = <&i2c_2>;
341	status = "okay";
342};
343
344&hsi2c_4 {
345	status = "okay";
346
347	s2mps11_pmic@66 {
348		compatible = "samsung,s2mps11-pmic";
349		reg = <0x66>;
350
351		interrupt-parent = <&gpx3>;
352		interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
353		pinctrl-names = "default";
354		pinctrl-0 = <&s2mps11_irq>;
355
356		s2mps11_osc: clocks {
357			compatible = "samsung,s2mps11-clk";
358			#clock-cells = <1>;
359			clock-output-names = "s2mps11_ap",
360					"s2mps11_cp", "s2mps11_bt";
361		};
362
363		regulators {
364			ldo1_reg: LDO1 {
365				regulator-name = "PVDD_ALIVE_1V0";
366				regulator-min-microvolt = <1000000>;
367				regulator-max-microvolt = <1000000>;
368				regulator-always-on;
369			};
370
371			ldo2_reg: LDO2 {
372				regulator-name = "PVDD_APIO_1V8";
373				regulator-min-microvolt = <1800000>;
374				regulator-max-microvolt = <1800000>;
375				regulator-always-on;
376			};
377
378			ldo3_reg: LDO3 {
379				regulator-name = "PVDD_APIO_MMCON_1V8";
380				regulator-min-microvolt = <1800000>;
381				regulator-max-microvolt = <1800000>;
382				/*
383				 * Must be always on, even though there is
384				 * a consumer (mmc_0).  Otherwise the board
385				 * does not reboot with vendor U-Boot
386				 * (Linaro for Arndale Octa, v2012.07).
387				 */
388				regulator-always-on;
389
390				regulator-state-mem {
391					regulator-off-in-suspend;
392				};
393			};
394
395			ldo4_reg: LDO4 {
396				regulator-name = "PVDD_ADC_1V8";
397				regulator-min-microvolt = <1800000>;
398				regulator-max-microvolt = <1800000>;
399			};
400
401			ldo5_reg: LDO5 {
402				regulator-name = "PVDD_PLL_1V8";
403				regulator-min-microvolt = <1800000>;
404				regulator-max-microvolt = <1800000>;
405				regulator-always-on;
406			};
407
408			ldo6_reg: LDO6 {
409				regulator-name = "PVDD_ANAIP_1V0";
410				regulator-min-microvolt = <1000000>;
411				regulator-max-microvolt = <1000000>;
412			};
413
414			ldo7_reg: LDO7 {
415				regulator-name = "PVDD_ANAIP_1V8";
416				regulator-min-microvolt = <1800000>;
417				regulator-max-microvolt = <1800000>;
418
419				regulator-state-mem {
420					regulator-off-in-suspend;
421				};
422			};
423
424			ldo8_reg: LDO8 {
425				regulator-name = "PVDD_ABB_1V8";
426				regulator-min-microvolt = <1800000>;
427				regulator-max-microvolt = <1800000>;
428				regulator-always-on;
429			};
430
431			ldo9_reg: LDO9 {
432				regulator-name = "PVDD_USB_3V3";
433				regulator-min-microvolt = <3000000>;
434				regulator-max-microvolt = <3000000>;
435				regulator-always-on;
436			};
437
438			ldo10_reg: LDO10 {
439				regulator-name = "PVDD_PRE_1V8";
440				regulator-min-microvolt = <1800000>;
441				regulator-max-microvolt = <1800000>;
442				regulator-always-on;
443			};
444
445			ldo11_reg: LDO11 {
446				regulator-name = "PVDD_USB_1V0";
447				regulator-min-microvolt = <1000000>;
448				regulator-max-microvolt = <1000000>;
449				regulator-always-on;
450			};
451
452			ldo12_reg: LDO12 {
453				regulator-name = "PVDD_HSIC_1V8";
454				regulator-min-microvolt = <1800000>;
455				regulator-max-microvolt = <1800000>;
456			};
457
458			ldo13_reg: LDO13 {
459				regulator-name = "PVDD_APIO_MMCOFF_2V8";
460				regulator-min-microvolt = <1800000>;
461				regulator-max-microvolt = <2800000>;
462
463				regulator-state-mem {
464					regulator-off-in-suspend;
465				};
466			};
467
468			ldo14_reg: LDO14 {
469				/* Unused */
470				regulator-name = "PVDD_LDO14";
471				regulator-min-microvolt = <800000>;
472				regulator-max-microvolt = <3950000>;
473			};
474
475			ldo15_reg: LDO15 {
476				regulator-name = "PVDD_PERI_2V8";
477				regulator-min-microvolt = <3300000>;
478				regulator-max-microvolt = <3300000>;
479
480				regulator-state-mem {
481					regulator-on-in-suspend;
482				};
483			};
484
485			ldo16_reg: LDO16 {
486				regulator-name = "PVDD_PERI_3V3";
487				regulator-min-microvolt = <2200000>;
488				regulator-max-microvolt = <2200000>;
489
490				regulator-state-mem {
491					regulator-on-in-suspend;
492				};
493			};
494
495			ldo17_reg: LDO17 {
496				/* Unused */
497				regulator-name = "PVDD_LDO17";
498				regulator-min-microvolt = <800000>;
499				regulator-max-microvolt = <3950000>;
500			};
501
502			ldo18_reg: LDO18 {
503				regulator-name = "PVDD_EMMC_1V8";
504				regulator-min-microvolt = <1800000>;
505				regulator-max-microvolt = <1800000>;
506				/*
507				 * Must stay in "off" mode during shutdown for
508				 * proper eMMC reset.  The "off" mode is in
509				 * fact controlled by LDO18EN.  The eMMC does
510				 * not have reset pin connected so the reset
511				 * will be triggered by falling edge of
512				 * LDO18EN.
513				 */
514
515				regulator-state-mem {
516					regulator-off-in-suspend;
517				};
518			};
519
520			ldo19_reg: LDO19 {
521				regulator-name = "PVDD_TFLASH_2V8";
522				regulator-min-microvolt = <2800000>;
523				regulator-max-microvolt = <2800000>;
524
525				regulator-state-mem {
526					regulator-off-in-suspend;
527				};
528			};
529
530			ldo20_reg: LDO20 {
531				regulator-name = "PVDD_BTWIFI_1V8";
532				regulator-min-microvolt = <1800000>;
533				regulator-max-microvolt = <1800000>;
534			};
535
536			ldo21_reg: LDO21 {
537				regulator-name = "PVDD_CAM1IO_1V8";
538				regulator-min-microvolt = <1800000>;
539				regulator-max-microvolt = <1800000>;
540			};
541
542			ldo22_reg: LDO22 {
543				/* Unused */
544				regulator-name = "PVDD_LDO22";
545				regulator-min-microvolt = <800000>;
546				regulator-max-microvolt = <2375000>;
547			};
548
549			ldo23_reg: LDO23 {
550				regulator-name = "PVDD_MIFS_1V1";
551				regulator-min-microvolt = <800000>;
552				regulator-max-microvolt = <1100000>;
553				regulator-always-on;
554
555				regulator-state-mem {
556					regulator-on-in-suspend;
557				};
558			};
559
560			ldo24_reg: LDO24 {
561				regulator-name = "PVDD_CAM1_AVDD_2V8";
562				regulator-min-microvolt = <2800000>;
563				regulator-max-microvolt = <2800000>;
564
565				regulator-state-mem {
566					regulator-on-in-suspend;
567				};
568			};
569
570			ldo25_reg: LDO25 {
571				/* Unused */
572				regulator-name = "PVDD_LDO25";
573				regulator-min-microvolt = <800000>;
574				regulator-max-microvolt = <3950000>;
575			};
576
577			ldo26_reg: LDO26 {
578				regulator-name = "PVDD_CAM0_AF_2V8";
579				regulator-min-microvolt = <3000000>;
580				regulator-max-microvolt = <3000000>;
581			};
582
583			ldo27_reg: LDO27 {
584				regulator-name = "PVDD_G3DS_1V0";
585				regulator-min-microvolt = <800000>;
586				regulator-max-microvolt = <1100000>;
587
588				regulator-state-mem {
589					regulator-on-in-suspend;
590				};
591			};
592
593			ldo28_reg: LDO28 {
594				regulator-name = "PVDD_TSP_3V3";
595				regulator-min-microvolt = <3300000>;
596				regulator-max-microvolt = <3300000>;
597			};
598
599			ldo29_reg: LDO29 {
600				regulator-name = "PVDD_AUDIO_1V8";
601				regulator-min-microvolt = <1800000>;
602				regulator-max-microvolt = <1800000>;
603			};
604
605			ldo30_reg: LDO30 {
606				/* Unused */
607				regulator-name = "PVDD_LDO30";
608				regulator-min-microvolt = <800000>;
609				regulator-max-microvolt = <3950000>;
610			};
611
612			ldo31_reg: LDO31 {
613				regulator-name = "PVDD_PERI_1V8";
614				regulator-min-microvolt = <1800000>;
615				regulator-max-microvolt = <1800000>;
616			};
617
618			ldo32_reg: LDO32 {
619				regulator-name = "PVDD_LCD_1V8";
620				regulator-min-microvolt = <1800000>;
621				regulator-max-microvolt = <1800000>;
622			};
623
624			ldo33_reg: LDO33 {
625				regulator-name = "PVDD_CAM0IO_1V8";
626				regulator-min-microvolt = <1800000>;
627				regulator-max-microvolt = <1800000>;
628			};
629
630			ldo34_reg: LDO34 {
631				/* Unused */
632				regulator-name = "PVDD_LDO34";
633				regulator-min-microvolt = <800000>;
634				regulator-max-microvolt = <3950000>;
635			};
636
637			ldo35_reg: LDO35 {
638				regulator-name = "PVDD_CAM0_DVDD_1V2";
639				regulator-min-microvolt = <1200000>;
640				regulator-max-microvolt = <1200000>;
641			};
642
643			ldo36_reg: LDO36 {
644				/* Unused */
645				regulator-name = "PVDD_LDO36";
646				regulator-min-microvolt = <800000>;
647				regulator-max-microvolt = <3950000>;
648			};
649
650			ldo37_reg: LDO37 {
651				/* Unused */
652				regulator-name = "PVDD_LDO37";
653				regulator-min-microvolt = <800000>;
654				regulator-max-microvolt = <3950000>;
655			};
656
657			ldo38_reg: LDO38 {
658				regulator-name = "PVDD_CAM0_AVDD_2V8";
659				regulator-min-microvolt = <2800000>;
660				regulator-max-microvolt = <2800000>;
661			};
662
663			buck1_reg: BUCK1 {
664				regulator-name = "PVDD_MIF_1V1";
665				regulator-min-microvolt = <800000>;
666				regulator-max-microvolt = <1300000>;
667				regulator-always-on;
668
669				regulator-state-mem {
670					regulator-off-in-suspend;
671				};
672			};
673
674			buck2_reg: BUCK2 {
675				regulator-name = "vdd_arm";
676				regulator-min-microvolt = <800000>;
677				regulator-max-microvolt = <1500000>;
678				regulator-always-on;
679
680				regulator-state-mem {
681					regulator-off-in-suspend;
682				};
683			};
684
685			buck3_reg: BUCK3 {
686				regulator-name = "PVDD_INT_1V0";
687				regulator-min-microvolt = <800000>;
688				regulator-max-microvolt = <1400000>;
689				regulator-always-on;
690
691				regulator-state-mem {
692					regulator-off-in-suspend;
693				};
694			};
695
696			buck4_reg: BUCK4 {
697				regulator-name = "PVDD_G3D_1V0";
698				regulator-min-microvolt = <800000>;
699				regulator-max-microvolt = <1400000>;
700
701				regulator-state-mem {
702					regulator-off-in-suspend;
703				};
704			};
705
706			buck5_reg: BUCK5 {
707				regulator-name = "PVDD_LPDDR3_1V2";
708				regulator-min-microvolt = <800000>;
709				regulator-max-microvolt = <1400000>;
710				regulator-always-on;
711			};
712
713			buck6_reg: BUCK6 {
714				regulator-name = "PVDD_KFC_1V0";
715				regulator-min-microvolt = <800000>;
716				regulator-max-microvolt = <1500000>;
717				regulator-always-on;
718
719				regulator-state-mem {
720					regulator-off-in-suspend;
721				};
722			};
723
724			buck7_reg: BUCK7 {
725				regulator-name = "VIN_LLDO_1V4";
726				regulator-min-microvolt = <1200000>;
727				regulator-max-microvolt = <1500000>;
728				regulator-always-on;
729			};
730
731			buck8_reg: BUCK8 {
732				regulator-name = "VIN_MLDO_2V0";
733				regulator-min-microvolt = <1800000>;
734				regulator-max-microvolt = <2100000>;
735				regulator-always-on;
736			};
737
738			buck9_reg: BUCK9 {
739				regulator-name = "VIN_HLDO_3V5";
740				regulator-min-microvolt = <3000000>;
741				regulator-max-microvolt = <3500000>;
742				regulator-always-on;
743			};
744
745			buck10_reg: BUCK10 {
746				regulator-name = "PVDD_EMMCF_2V8";
747				regulator-min-microvolt = <2800000>;
748				regulator-max-microvolt = <2800000>;
749				/*
750				 * Must stay in "off" mode during shutdown for
751				 * proper eMMC reset.  The "off" mode is in
752				 * fact controlled by BUCK10EN.  The eMMC does
753				 * not have reset pin connected so the reset
754				 * will be triggered by falling edge of
755				 * BUCK10EN.
756				 */
757
758				regulator-state-mem {
759					regulator-off-in-suspend;
760				};
761			};
762		};
763	};
764};
765
766&i2c_2 {
767	status = "okay";
768};
769
770&mixer {
771	status = "okay";
772};
773
774&mmc_0 {
775	status = "okay";
776	non-removable;
777	card-detect-delay = <200>;
778	samsung,dw-mshc-ciu-div = <3>;
779	samsung,dw-mshc-sdr-timing = <0 4>;
780	samsung,dw-mshc-ddr-timing = <0 2>;
781	pinctrl-names = "default";
782	pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>;
783	vmmc-supply = <&ldo18_reg>;
784	vqmmc-supply = <&ldo3_reg>;
785	bus-width = <8>;
786	cap-mmc-highspeed;
787	mmc-hs200-1_8v;
788};
789
790&mmc_2 {
791	status = "okay";
792	card-detect-delay = <200>;
793	samsung,dw-mshc-ciu-div = <3>;
794	samsung,dw-mshc-sdr-timing = <0 4>;
795	samsung,dw-mshc-ddr-timing = <0 2>;
796	pinctrl-names = "default";
797	pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>;
798	vmmc-supply = <&ldo19_reg>;
799	vqmmc-supply = <&ldo13_reg>;
800	bus-width = <4>;
801	cap-sd-highspeed;
802	sd-uhs-sdr50;
803	sd-uhs-sdr104;
804	sd-uhs-ddr50;
805};
806
807&pinctrl_0 {
808	s2mps11_irq: s2mps11-irq {
809		samsung,pins = "gpx3-2";
810		samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
811		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
812		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
813	};
814};
815
816&rtc {
817	status = "okay";
818	clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>;
819	clock-names = "rtc", "rtc_src";
820};
821
822&usbdrd_dwc3_1 {
823	dr_mode = "host";
824};
825