1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
4 */
5
6#include "dra71x.dtsi"
7#include "dra7-mmc-iodelay.dtsi"
8#include "dra72x-mmc-iodelay.dtsi"
9#include <dt-bindings/net/ti-dp83867.h>
10
11/ {
12	compatible = "ti,dra718-evm", "ti,dra718", "ti,dra722", "ti,dra72", "ti,dra7";
13	model = "TI DRA718 EVM";
14
15	memory {
16		device_type = "memory";
17		reg = <0x0 0x80000000 0x0 0x80000000>; /* 2GB */
18	};
19
20	vpo_sd_1v8_3v3: gpio-regulator-TPS74801 {
21		compatible = "regulator-gpio";
22
23		regulator-name = "vddshv8";
24		regulator-min-microvolt = <1800000>;
25		regulator-max-microvolt = <3300000>;
26		regulator-boot-on;
27		vin-supply = <&evm_5v0>;
28
29		gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
30		states = <1800000 0x0
31			  3300000 0x1>;
32	};
33
34	evm_1v8_sw: fixedregulator-evm_1v8 {
35		compatible = "regulator-fixed";
36		regulator-name = "evm_1v8";
37		regulator-min-microvolt = <1800000>;
38		regulator-max-microvolt = <1800000>;
39		vin-supply = <&lp8732_buck0_reg>;
40		regulator-always-on;
41		regulator-boot-on;
42	};
43
44	poweroff: gpio-poweroff {
45		compatible = "gpio-poweroff";
46		gpios = <&gpio7 30 GPIO_ACTIVE_HIGH>;
47		input;
48	};
49};
50
51&i2c1 {
52	status = "okay";
53	clock-frequency = <400000>;
54
55	lp8733: lp8733@60 {
56		compatible = "ti,lp8733";
57		reg = <0x60>;
58
59		buck0-in-supply =<&vsys_3v3>;
60		buck1-in-supply =<&vsys_3v3>;
61		ldo0-in-supply =<&evm_5v0>;
62		ldo1-in-supply =<&evm_5v0>;
63
64		lp8733_regulators: regulators {
65			lp8733_buck0_reg: buck0 {
66				/* FB_B0 -> LP8733-BUCK1 - VPO_S1_AVS - VDD_CORE_AVS (core, mpu, gpu) */
67				regulator-name = "lp8733-buck0";
68				regulator-min-microvolt = <850000>;
69				regulator-max-microvolt = <1250000>;
70				regulator-always-on;
71				regulator-boot-on;
72			};
73
74			lp8733_buck1_reg: buck1 {
75				/* FB_B1 -> LP8733-BUCK2 - VPO_S2_AVS - VDD_DSP_AVS (DSP/eve/iva) */
76				regulator-name = "lp8733-buck1";
77				regulator-min-microvolt = <850000>;
78				regulator-max-microvolt = <1250000>;
79				regulator-boot-on;
80				regulator-always-on;
81			};
82
83			lp8733_ldo0_reg: ldo0 {
84				/* LDO0 -> LP8733-LDO1 - VPO_L1_3V3 - VDDSHV8 (optional) */
85				regulator-name = "lp8733-ldo0";
86				regulator-min-microvolt = <3300000>;
87				regulator-max-microvolt = <3300000>;
88			};
89
90			lp8733_ldo1_reg: ldo1 {
91				/* LDO1 -> LP8733-LDO2 - VPO_L2_3V3 - VDDA_USB3V3 */
92				regulator-name = "lp8733-ldo1";
93				regulator-min-microvolt = <3300000>;
94				regulator-max-microvolt = <3300000>;
95				regulator-always-on;
96				regulator-boot-on;
97			};
98		};
99	};
100
101	lp8732: lp8732@61 {
102		compatible = "ti,lp8732";
103		reg = <0x61>;
104
105		buck0-in-supply =<&vsys_3v3>;
106		buck1-in-supply =<&vsys_3v3>;
107		ldo0-in-supply =<&vsys_3v3>;
108		ldo1-in-supply =<&vsys_3v3>;
109
110		lp8732_regulators: regulators {
111			lp8732_buck0_reg: buck0 {
112				/* FB_B0 -> LP8732-BUCK1 - VPO_S3_1V8 - VDDS_1V8 */
113				regulator-name = "lp8732-buck0";
114				regulator-min-microvolt = <1800000>;
115				regulator-max-microvolt = <1800000>;
116				regulator-always-on;
117				regulator-boot-on;
118			};
119
120			lp8732_buck1_reg: buck1 {
121				/* FB_B1 -> LP8732-BUCK2 - VPO_S4_DDR - VDD_DDR_1V35 */
122				regulator-name = "lp8732-buck1";
123				regulator-min-microvolt = <1350000>;
124				regulator-max-microvolt = <1350000>;
125				regulator-boot-on;
126				regulator-always-on;
127			};
128
129			lp8732_ldo0_reg: ldo0 {
130				/* LDO0 -> LP8732-LDO1 - VPO_L3_1V8 - VDA_1V8_PLL */
131				regulator-name = "lp8732-ldo0";
132				regulator-min-microvolt = <1800000>;
133				regulator-max-microvolt = <1800000>;
134				regulator-boot-on;
135				regulator-always-on;
136			};
137
138			lp8732_ldo1_reg: ldo1 {
139				/* LDO1 -> LP8732-LDO2 - VPO_L4_1V8 - VDA_1V8_PHY */
140				regulator-name = "lp8732-ldo1";
141				regulator-min-microvolt = <1800000>;
142				regulator-max-microvolt = <1800000>;
143				regulator-always-on;
144				regulator-boot-on;
145			};
146		};
147	};
148};
149
150&pcf_lcd {
151	interrupt-parent = <&gpio7>;
152	interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
153};
154
155&pcf_gpio_21 {
156	interrupt-parent = <&gpio7>;
157	interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
158};
159
160&pcf_hdmi {
161	p0 {
162		/*
163		 * PM_OEn to High: Disable routing I2C3 to PM_I2C
164		 * With this PM_SEL(p3) should not matter
165		 */
166		gpio-hog;
167		gpios = <0 GPIO_ACTIVE_LOW>;
168		output-high;
169		line-name = "pm_oe_n";
170	};
171};
172
173&mmc1 {
174	pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
175	pinctrl-0 = <&mmc1_pins_default_no_clk_pu>;
176	pinctrl-1 = <&mmc1_pins_hs>;
177	pinctrl-2 = <&mmc1_pins_sdr12>;
178	pinctrl-3 = <&mmc1_pins_sdr25>;
179	pinctrl-4 = <&mmc1_pins_sdr50>;
180	pinctrl-5 = <&mmc1_pins_ddr50_rev20 &mmc1_iodelay_ddr50_conf>;
181	pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev20_conf>;
182	vqmmc-supply = <&vpo_sd_1v8_3v3>;
183};
184
185&mmc2 {
186	pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v";
187	pinctrl-0 = <&mmc2_pins_default>;
188	pinctrl-1 = <&mmc2_pins_hs>;
189	pinctrl-2 = <&mmc2_pins_ddr_rev20 &mmc2_iodelay_ddr_conf>;
190	pinctrl-3 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_rev20_conf>;
191	vmmc-supply = <&evm_1v8_sw>;
192	vqmmc-supply = <&evm_1v8_sw>;
193};
194
195&mac {
196	mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_LOW>,
197		     <&pcf_hdmi 9 GPIO_ACTIVE_LOW>,	/* P11 */
198		     <&pcf_hdmi 10 GPIO_ACTIVE_LOW>;	/* P12 */
199	dual_emac;
200};
201
202&cpsw_emac0 {
203	phy-handle = <&dp83867_0>;
204	phy-mode = "rgmii-id";
205	dual_emac_res_vlan = <1>;
206};
207
208&cpsw_emac1 {
209	phy-handle = <&dp83867_1>;
210	phy-mode = "rgmii-id";
211	dual_emac_res_vlan = <2>;
212};
213
214&davinci_mdio {
215	dp83867_0: ethernet-phy@2 {
216		reg = <2>;
217		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
218		ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
219		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
220		ti,min-output-impedance;
221		ti,dp83867-rxctrl-strap-quirk;
222	};
223
224	dp83867_1: ethernet-phy@3 {
225		reg = <3>;
226		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
227		ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
228		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
229		ti,min-output-impedance;
230		ti,dp83867-rxctrl-strap-quirk;
231	};
232};
233
234/* No Sata on this device */
235&sata_phy {
236	status = "disabled";
237};
238
239&sata {
240	status = "disabled";
241};
242
243/* No RTC on this device */
244&rtc {
245	status = "disabled";
246};
247
248&usb2_phy1 {
249	phy-supply = <&lp8733_ldo1_reg>;
250};
251
252&usb2_phy2 {
253	phy-supply = <&lp8733_ldo1_reg>;
254};
255
256&dss {
257	/* Supplied by VDA_1V8_PLL */
258	vdda_video-supply = <&lp8732_ldo0_reg>;
259};
260
261&hdmi {
262	/* Supplied by VDA_1V8_PHY */
263	vdda_video-supply = <&lp8732_ldo1_reg>;
264};
265
266&extcon_usb1 {
267	vbus-gpio = <&pcf_lcd 14 GPIO_ACTIVE_HIGH>;
268};
269
270&extcon_usb2 {
271	vbus-gpio = <&pcf_lcd 15 GPIO_ACTIVE_HIGH>;
272};
273