1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC 4 * 5 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> 6 */ 7 8#include <dt-bindings/pinctrl/at91.h> 9#include <dt-bindings/interrupt-controller/irq.h> 10#include <dt-bindings/gpio/gpio.h> 11#include <dt-bindings/clock/at91.h> 12 13/ { 14 #address-cells = <1>; 15 #size-cells = <1>; 16 model = "Atmel AT91SAM9263 family SoC"; 17 compatible = "atmel,at91sam9263"; 18 interrupt-parent = <&aic>; 19 20 aliases { 21 serial0 = &dbgu; 22 serial1 = &usart0; 23 serial2 = &usart1; 24 serial3 = &usart2; 25 gpio0 = &pioA; 26 gpio1 = &pioB; 27 gpio2 = &pioC; 28 gpio3 = &pioD; 29 gpio4 = &pioE; 30 tcb0 = &tcb0; 31 i2c0 = &i2c0; 32 ssc0 = &ssc0; 33 ssc1 = &ssc1; 34 pwm0 = &pwm0; 35 }; 36 37 cpus { 38 #address-cells = <0>; 39 #size-cells = <0>; 40 41 cpu { 42 compatible = "arm,arm926ej-s"; 43 device_type = "cpu"; 44 }; 45 }; 46 47 memory { 48 device_type = "memory"; 49 reg = <0x20000000 0x08000000>; 50 }; 51 52 clocks { 53 main_xtal: main_xtal { 54 compatible = "fixed-clock"; 55 #clock-cells = <0>; 56 clock-frequency = <0>; 57 }; 58 59 slow_xtal: slow_xtal { 60 compatible = "fixed-clock"; 61 #clock-cells = <0>; 62 clock-frequency = <0>; 63 }; 64 }; 65 66 sram0: sram@300000 { 67 compatible = "mmio-sram"; 68 reg = <0x00300000 0x14000>; 69 }; 70 71 sram1: sram@500000 { 72 compatible = "mmio-sram"; 73 reg = <0x00500000 0x4000>; 74 }; 75 76 ahb { 77 compatible = "simple-bus"; 78 #address-cells = <1>; 79 #size-cells = <1>; 80 ranges; 81 82 apb { 83 compatible = "simple-bus"; 84 #address-cells = <1>; 85 #size-cells = <1>; 86 ranges; 87 88 aic: interrupt-controller@fffff000 { 89 #interrupt-cells = <3>; 90 compatible = "atmel,at91rm9200-aic"; 91 interrupt-controller; 92 reg = <0xfffff000 0x200>; 93 atmel,external-irqs = <30 31>; 94 }; 95 96 pmc: pmc@fffffc00 { 97 compatible = "atmel,at91sam9263-pmc", "syscon"; 98 reg = <0xfffffc00 0x100>; 99 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 100 #clock-cells = <2>; 101 clocks = <&slow_xtal>, <&main_xtal>; 102 clock-names = "slow_xtal", "main_xtal"; 103 }; 104 105 ramc0: ramc@ffffe200 { 106 compatible = "atmel,at91sam9260-sdramc"; 107 reg = <0xffffe200 0x200>; 108 }; 109 110 smc0: smc@ffffe400 { 111 compatible = "atmel,at91sam9260-smc", "syscon"; 112 reg = <0xffffe400 0x200>; 113 }; 114 115 ramc1: ramc@ffffe800 { 116 compatible = "atmel,at91sam9260-sdramc"; 117 reg = <0xffffe800 0x200>; 118 }; 119 120 smc1: smc@ffffea00 { 121 compatible = "atmel,at91sam9260-smc", "syscon"; 122 reg = <0xffffea00 0x200>; 123 }; 124 125 matrix: matrix@ffffec00 { 126 compatible = "atmel,at91sam9263-matrix", "syscon"; 127 reg = <0xffffec00 0x200>; 128 }; 129 130 pit: timer@fffffd30 { 131 compatible = "atmel,at91sam9260-pit"; 132 reg = <0xfffffd30 0xf>; 133 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 134 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 135 }; 136 137 tcb0: timer@fff7c000 { 138 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon"; 139 #address-cells = <1>; 140 #size-cells = <0>; 141 reg = <0xfff7c000 0x100>; 142 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>; 143 clocks = <&pmc PMC_TYPE_PERIPHERAL 19>, <&slow_xtal>; 144 clock-names = "t0_clk", "slow_clk"; 145 }; 146 147 rstc@fffffd00 { 148 compatible = "atmel,at91sam9260-rstc"; 149 reg = <0xfffffd00 0x10>; 150 clocks = <&slow_xtal>; 151 }; 152 153 shdwc@fffffd10 { 154 compatible = "atmel,at91sam9260-shdwc"; 155 reg = <0xfffffd10 0x10>; 156 clocks = <&slow_xtal>; 157 }; 158 159 pinctrl@fffff200 { 160 #address-cells = <1>; 161 #size-cells = <1>; 162 compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; 163 ranges = <0xfffff200 0xfffff200 0xa00>; 164 165 atmel,mux-mask = < 166 /* A B */ 167 0xfffffffb 0xffffe07f /* pioA */ 168 0x0007ffff 0x39072fff /* pioB */ 169 0xffffffff 0x3ffffff8 /* pioC */ 170 0xfffffbff 0xffffffff /* pioD */ 171 0xffe00fff 0xfbfcff00 /* pioE */ 172 >; 173 174 /* shared pinctrl settings */ 175 dbgu { 176 pinctrl_dbgu: dbgu-0 { 177 atmel,pins = 178 <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP 179 AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; 180 }; 181 }; 182 183 usart0 { 184 pinctrl_usart0: usart0-0 { 185 atmel,pins = 186 <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE 187 AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 188 }; 189 190 pinctrl_usart0_rts: usart0_rts-0 { 191 atmel,pins = 192 <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA28 periph A */ 193 }; 194 195 pinctrl_usart0_cts: usart0_cts-0 { 196 atmel,pins = 197 <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA29 periph A */ 198 }; 199 }; 200 201 usart1 { 202 pinctrl_usart1: usart1-0 { 203 atmel,pins = 204 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE 205 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 206 }; 207 208 pinctrl_usart1_rts: usart1_rts-0 { 209 atmel,pins = 210 <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD7 periph B */ 211 }; 212 213 pinctrl_usart1_cts: usart1_cts-0 { 214 atmel,pins = 215 <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD8 periph B */ 216 }; 217 }; 218 219 usart2 { 220 pinctrl_usart2: usart2-0 { 221 atmel,pins = 222 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE 223 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 224 }; 225 226 pinctrl_usart2_rts: usart2_rts-0 { 227 atmel,pins = 228 <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD5 periph B */ 229 }; 230 231 pinctrl_usart2_cts: usart2_cts-0 { 232 atmel,pins = 233 <AT91_PIOD 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD6 periph B */ 234 }; 235 }; 236 237 nand { 238 pinctrl_nand_rb: nand-rb-0 { 239 atmel,pins = 240 <AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; 241 }; 242 243 pinctrl_nand_cs: nand-cs-0 { 244 atmel,pins = 245 <AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; 246 }; 247 }; 248 249 macb { 250 pinctrl_macb_rmii: macb_rmii-0 { 251 atmel,pins = 252 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */ 253 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */ 254 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */ 255 AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */ 256 AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */ 257 AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */ 258 AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */ 259 AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */ 260 AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */ 261 AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */ 262 }; 263 264 pinctrl_macb_rmii_mii: macb_rmii_mii-0 { 265 atmel,pins = 266 <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */ 267 AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */ 268 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC22 periph B */ 269 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC23 periph B */ 270 AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC24 periph B */ 271 AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */ 272 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */ 273 AT91_PIOE 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE22 periph B */ 274 }; 275 }; 276 277 mmc0 { 278 pinctrl_mmc0_clk: mmc0_clk-0 { 279 atmel,pins = 280 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA12 periph A */ 281 }; 282 283 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { 284 atmel,pins = 285 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */ 286 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA0 periph A with pullup */ 287 }; 288 289 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { 290 atmel,pins = 291 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */ 292 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */ 293 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */ 294 }; 295 296 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 { 297 atmel,pins = 298 <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */ 299 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA17 periph A with pullup */ 300 }; 301 302 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 { 303 atmel,pins = 304 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */ 305 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */ 306 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */ 307 }; 308 }; 309 310 mmc1 { 311 pinctrl_mmc1_clk: mmc1_clk-0 { 312 atmel,pins = 313 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */ 314 }; 315 316 pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 { 317 atmel,pins = 318 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */ 319 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA8 periph A with pullup */ 320 }; 321 322 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 { 323 atmel,pins = 324 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */ 325 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */ 326 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */ 327 }; 328 329 pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 { 330 atmel,pins = 331 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA21 periph A with pullup */ 332 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA22 periph A with pullup */ 333 }; 334 335 pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 { 336 atmel,pins = 337 <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA23 periph A with pullup */ 338 AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */ 339 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA25 periph A with pullup */ 340 }; 341 }; 342 343 ssc0 { 344 pinctrl_ssc0_tx: ssc0_tx-0 { 345 atmel,pins = 346 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB0 periph B */ 347 AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB1 periph B */ 348 AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */ 349 }; 350 351 pinctrl_ssc0_rx: ssc0_rx-0 { 352 atmel,pins = 353 <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B */ 354 AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B */ 355 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B */ 356 }; 357 }; 358 359 ssc1 { 360 pinctrl_ssc1_tx: ssc1_tx-0 { 361 atmel,pins = 362 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */ 363 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */ 364 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */ 365 }; 366 367 pinctrl_ssc1_rx: ssc1_rx-0 { 368 atmel,pins = 369 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */ 370 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */ 371 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */ 372 }; 373 }; 374 375 spi0 { 376 pinctrl_spi0: spi0-0 { 377 atmel,pins = 378 <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA0 periph B SPI0_MISO pin */ 379 AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA1 periph B SPI0_MOSI pin */ 380 AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA2 periph B SPI0_SPCK pin */ 381 }; 382 }; 383 384 spi1 { 385 pinctrl_spi1: spi1-0 { 386 atmel,pins = 387 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A SPI1_MISO pin */ 388 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A SPI1_MOSI pin */ 389 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A SPI1_SPCK pin */ 390 }; 391 }; 392 393 tcb0 { 394 pinctrl_tcb0_tclk0: tcb0_tclk0-0 { 395 atmel,pins = <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; 396 }; 397 398 pinctrl_tcb0_tclk1: tcb0_tclk1-0 { 399 atmel,pins = <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; 400 }; 401 402 pinctrl_tcb0_tclk2: tcb0_tclk2-0 { 403 atmel,pins = <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; 404 }; 405 406 pinctrl_tcb0_tioa0: tcb0_tioa0-0 { 407 atmel,pins = <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; 408 }; 409 410 pinctrl_tcb0_tioa1: tcb0_tioa1-0 { 411 atmel,pins = <AT91_PIOE 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; 412 }; 413 414 pinctrl_tcb0_tioa2: tcb0_tioa2-0 { 415 atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; 416 }; 417 418 pinctrl_tcb0_tiob0: tcb0_tiob0-0 { 419 atmel,pins = <AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; 420 }; 421 422 pinctrl_tcb0_tiob1: tcb0_tiob1-0 { 423 atmel,pins = <AT91_PIOE 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; 424 }; 425 426 pinctrl_tcb0_tiob2: tcb0_tiob2-0 { 427 atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; 428 }; 429 }; 430 431 fb { 432 pinctrl_fb: fb-0 { 433 atmel,pins = 434 <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC1 periph A */ 435 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC2 periph A */ 436 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC3 periph A */ 437 AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB9 periph B */ 438 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 periph A */ 439 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 periph A */ 440 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 periph A */ 441 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC9 periph A */ 442 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC10 periph A */ 443 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC11 periph A */ 444 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC14 periph A */ 445 AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC15 periph A */ 446 AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A */ 447 AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC12 periph B */ 448 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC18 periph A */ 449 AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A */ 450 AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A */ 451 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A */ 452 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC24 periph A */ 453 AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC17 periph B */ 454 AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC26 periph A */ 455 AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC27 periph A */ 456 }; 457 }; 458 459 can { 460 pinctrl_can_rx_tx: can_rx_tx { 461 atmel,pins = 462 <AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* CANRX, conflicts with IRQ0 */ 463 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* CANTX, conflicts with PCK0 */ 464 }; 465 }; 466 467 ac97 { 468 pinctrl_ac97: ac97-0 { 469 atmel,pins = 470 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A AC97FS pin */ 471 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A AC97CK pin */ 472 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A AC97TX pin */ 473 AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A AC97RX pin */ 474 }; 475 }; 476 477 pioA: gpio@fffff200 { 478 compatible = "atmel,at91rm9200-gpio"; 479 reg = <0xfffff200 0x200>; 480 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; 481 #gpio-cells = <2>; 482 gpio-controller; 483 interrupt-controller; 484 #interrupt-cells = <2>; 485 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>; 486 }; 487 488 pioB: gpio@fffff400 { 489 compatible = "atmel,at91rm9200-gpio"; 490 reg = <0xfffff400 0x200>; 491 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; 492 #gpio-cells = <2>; 493 gpio-controller; 494 interrupt-controller; 495 #interrupt-cells = <2>; 496 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>; 497 }; 498 499 pioC: gpio@fffff600 { 500 compatible = "atmel,at91rm9200-gpio"; 501 reg = <0xfffff600 0x200>; 502 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; 503 #gpio-cells = <2>; 504 gpio-controller; 505 interrupt-controller; 506 #interrupt-cells = <2>; 507 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>; 508 }; 509 510 pioD: gpio@fffff800 { 511 compatible = "atmel,at91rm9200-gpio"; 512 reg = <0xfffff800 0x200>; 513 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; 514 #gpio-cells = <2>; 515 gpio-controller; 516 interrupt-controller; 517 #interrupt-cells = <2>; 518 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>; 519 }; 520 521 pioE: gpio@fffffa00 { 522 compatible = "atmel,at91rm9200-gpio"; 523 reg = <0xfffffa00 0x200>; 524 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; 525 #gpio-cells = <2>; 526 gpio-controller; 527 interrupt-controller; 528 #interrupt-cells = <2>; 529 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>; 530 }; 531 }; 532 533 dbgu: serial@ffffee00 { 534 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; 535 reg = <0xffffee00 0x200>; 536 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 537 pinctrl-names = "default"; 538 pinctrl-0 = <&pinctrl_dbgu>; 539 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 540 clock-names = "usart"; 541 status = "disabled"; 542 }; 543 544 usart0: serial@fff8c000 { 545 compatible = "atmel,at91sam9260-usart"; 546 reg = <0xfff8c000 0x200>; 547 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; 548 atmel,use-dma-rx; 549 atmel,use-dma-tx; 550 pinctrl-names = "default"; 551 pinctrl-0 = <&pinctrl_usart0>; 552 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; 553 clock-names = "usart"; 554 status = "disabled"; 555 }; 556 557 usart1: serial@fff90000 { 558 compatible = "atmel,at91sam9260-usart"; 559 reg = <0xfff90000 0x200>; 560 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; 561 atmel,use-dma-rx; 562 atmel,use-dma-tx; 563 pinctrl-names = "default"; 564 pinctrl-0 = <&pinctrl_usart1>; 565 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; 566 clock-names = "usart"; 567 status = "disabled"; 568 }; 569 570 usart2: serial@fff94000 { 571 compatible = "atmel,at91sam9260-usart"; 572 reg = <0xfff94000 0x200>; 573 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>; 574 atmel,use-dma-rx; 575 atmel,use-dma-tx; 576 pinctrl-names = "default"; 577 pinctrl-0 = <&pinctrl_usart2>; 578 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; 579 clock-names = "usart"; 580 status = "disabled"; 581 }; 582 583 ssc0: ssc@fff98000 { 584 compatible = "atmel,at91rm9200-ssc"; 585 reg = <0xfff98000 0x4000>; 586 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; 587 pinctrl-names = "default"; 588 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; 589 clocks = <&pmc PMC_TYPE_PERIPHERAL 16>; 590 clock-names = "pclk"; 591 status = "disabled"; 592 }; 593 594 ssc1: ssc@fff9c000 { 595 compatible = "atmel,at91rm9200-ssc"; 596 reg = <0xfff9c000 0x4000>; 597 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>; 598 pinctrl-names = "default"; 599 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; 600 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>; 601 clock-names = "pclk"; 602 status = "disabled"; 603 }; 604 605 ac97: sound@fffa0000 { 606 compatible = "atmel,at91sam9263-ac97c"; 607 reg = <0xfffa0000 0x4000>; 608 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 5>; 609 pinctrl-names = "default"; 610 pinctrl-0 = <&pinctrl_ac97>; 611 clocks = <&pmc PMC_TYPE_PERIPHERAL 18>; 612 clock-names = "ac97_clk"; 613 status = "disabled"; 614 }; 615 616 macb0: ethernet@fffbc000 { 617 compatible = "cdns,at91sam9260-macb", "cdns,macb"; 618 reg = <0xfffbc000 0x100>; 619 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>; 620 pinctrl-names = "default"; 621 pinctrl-0 = <&pinctrl_macb_rmii>; 622 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_PERIPHERAL 21>; 623 clock-names = "hclk", "pclk"; 624 status = "disabled"; 625 }; 626 627 usb1: gadget@fff78000 { 628 compatible = "atmel,at91sam9263-udc"; 629 reg = <0xfff78000 0x4000>; 630 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>; 631 clocks = <&pmc PMC_TYPE_PERIPHERAL 24>, <&pmc PMC_TYPE_SYSTEM 7>; 632 clock-names = "pclk", "hclk"; 633 status = "disabled"; 634 }; 635 636 i2c0: i2c@fff88000 { 637 compatible = "atmel,at91sam9260-i2c"; 638 reg = <0xfff88000 0x100>; 639 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>; 640 #address-cells = <1>; 641 #size-cells = <0>; 642 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; 643 status = "disabled"; 644 }; 645 646 mmc0: mmc@fff80000 { 647 compatible = "atmel,hsmci"; 648 reg = <0xfff80000 0x600>; 649 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>; 650 pinctrl-names = "default"; 651 #address-cells = <1>; 652 #size-cells = <0>; 653 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>; 654 clock-names = "mci_clk"; 655 status = "disabled"; 656 }; 657 658 mmc1: mmc@fff84000 { 659 compatible = "atmel,hsmci"; 660 reg = <0xfff84000 0x600>; 661 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>; 662 pinctrl-names = "default"; 663 #address-cells = <1>; 664 #size-cells = <0>; 665 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>; 666 clock-names = "mci_clk"; 667 status = "disabled"; 668 }; 669 670 watchdog@fffffd40 { 671 compatible = "atmel,at91sam9260-wdt"; 672 reg = <0xfffffd40 0x10>; 673 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 674 clocks = <&slow_xtal>; 675 atmel,watchdog-type = "hardware"; 676 atmel,reset-type = "all"; 677 atmel,dbg-halt; 678 status = "disabled"; 679 }; 680 681 spi0: spi@fffa4000 { 682 #address-cells = <1>; 683 #size-cells = <0>; 684 compatible = "atmel,at91rm9200-spi"; 685 reg = <0xfffa4000 0x200>; 686 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>; 687 pinctrl-names = "default"; 688 pinctrl-0 = <&pinctrl_spi0>; 689 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; 690 clock-names = "spi_clk"; 691 status = "disabled"; 692 }; 693 694 spi1: spi@fffa8000 { 695 #address-cells = <1>; 696 #size-cells = <0>; 697 compatible = "atmel,at91rm9200-spi"; 698 reg = <0xfffa8000 0x200>; 699 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 3>; 700 pinctrl-names = "default"; 701 pinctrl-0 = <&pinctrl_spi1>; 702 clocks = <&pmc PMC_TYPE_PERIPHERAL 15>; 703 clock-names = "spi_clk"; 704 status = "disabled"; 705 }; 706 707 pwm0: pwm@fffb8000 { 708 compatible = "atmel,at91sam9rl-pwm"; 709 reg = <0xfffb8000 0x300>; 710 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 4>; 711 #pwm-cells = <3>; 712 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>; 713 clock-names = "pwm_clk"; 714 status = "disabled"; 715 }; 716 717 can: can@fffac000 { 718 compatible = "atmel,at91sam9263-can"; 719 reg = <0xfffac000 0x300>; 720 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>; 721 pinctrl-names = "default"; 722 pinctrl-0 = <&pinctrl_can_rx_tx>; 723 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>; 724 clock-names = "can_clk"; 725 }; 726 727 rtc@fffffd20 { 728 compatible = "atmel,at91sam9260-rtt"; 729 reg = <0xfffffd20 0x10>; 730 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 731 clocks = <&slow_xtal>; 732 status = "disabled"; 733 }; 734 735 rtc@fffffd50 { 736 compatible = "atmel,at91sam9260-rtt"; 737 reg = <0xfffffd50 0x10>; 738 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 739 clocks = <&slow_xtal>; 740 status = "disabled"; 741 }; 742 743 gpbr: syscon@fffffd60 { 744 compatible = "atmel,at91sam9260-gpbr", "syscon"; 745 reg = <0xfffffd60 0x50>; 746 status = "disabled"; 747 }; 748 }; 749 750 fb0: fb@700000 { 751 compatible = "atmel,at91sam9263-lcdc"; 752 reg = <0x00700000 0x1000>; 753 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 3>; 754 pinctrl-names = "default"; 755 pinctrl-0 = <&pinctrl_fb>; 756 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&pmc PMC_TYPE_PERIPHERAL 26>; 757 clock-names = "lcdc_clk", "hclk"; 758 status = "disabled"; 759 }; 760 761 usb0: ohci@a00000 { 762 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 763 reg = <0x00a00000 0x100000>; 764 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>; 765 clocks = <&pmc PMC_TYPE_PERIPHERAL 29>, <&pmc PMC_TYPE_PERIPHERAL 29>, <&pmc PMC_TYPE_SYSTEM 6>; 766 clock-names = "ohci_clk", "hclk", "uhpck"; 767 status = "disabled"; 768 }; 769 770 ebi0: ebi@10000000 { 771 compatible = "atmel,at91sam9263-ebi0"; 772 #address-cells = <2>; 773 #size-cells = <1>; 774 atmel,smc = <&smc0>; 775 atmel,matrix = <&matrix>; 776 reg = <0x10000000 0x80000000>; 777 ranges = <0x0 0x0 0x10000000 0x10000000 778 0x1 0x0 0x20000000 0x10000000 779 0x2 0x0 0x30000000 0x10000000 780 0x3 0x0 0x40000000 0x10000000 781 0x4 0x0 0x50000000 0x10000000 782 0x5 0x0 0x60000000 0x10000000>; 783 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 784 status = "disabled"; 785 786 nand_controller0: nand-controller { 787 compatible = "atmel,at91sam9260-nand-controller"; 788 #address-cells = <2>; 789 #size-cells = <1>; 790 ranges; 791 status = "disabled"; 792 }; 793 }; 794 795 ebi1: ebi@70000000 { 796 compatible = "atmel,at91sam9263-ebi1"; 797 #address-cells = <2>; 798 #size-cells = <1>; 799 atmel,smc = <&smc1>; 800 atmel,matrix = <&matrix>; 801 reg = <0x80000000 0x20000000>; 802 ranges = <0x0 0x0 0x80000000 0x10000000 803 0x1 0x0 0x90000000 0x10000000>; 804 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; 805 status = "disabled"; 806 807 nand_controller1: nand-controller { 808 compatible = "atmel,at91sam9260-nand-controller"; 809 #address-cells = <2>; 810 #size-cells = <1>; 811 ranges; 812 status = "disabled"; 813 }; 814 }; 815 }; 816 817 i2c-gpio-0 { 818 compatible = "i2c-gpio"; 819 gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */ 820 &pioB 5 GPIO_ACTIVE_HIGH /* scl */ 821 >; 822 i2c-gpio,sda-open-drain; 823 i2c-gpio,scl-open-drain; 824 i2c-gpio,delay-us = <2>; /* ~100 kHz */ 825 #address-cells = <1>; 826 #size-cells = <0>; 827 status = "disabled"; 828 }; 829}; 830
