1// SPDX-License-Identifier: GPL-2.0+
2// Copyright (c) 2018 Facebook Inc.
3// Author: Vijay Khemka <vijaykhemka@fb.com>
4/dts-v1/;
5
6#include "aspeed-g5.dtsi"
7#include <dt-bindings/gpio/aspeed-gpio.h>
8
9/ {
10	model = "Facebook TiogaPass BMC";
11	compatible = "facebook,tiogapass-bmc", "aspeed,ast2500";
12	aliases {
13		serial0 = &uart1;
14		serial4 = &uart5;
15
16		/*
17		 * Hardcode the bus number of i2c switches' channels to
18		 * avoid breaking the legacy applications.
19		 */
20		i2c16 = &imux16;
21		i2c17 = &imux17;
22		i2c18 = &imux18;
23		i2c19 = &imux19;
24		i2c20 = &imux20;
25		i2c21 = &imux21;
26		i2c22 = &imux22;
27		i2c23 = &imux23;
28		i2c24 = &imux24;
29		i2c25 = &imux25;
30		i2c26 = &imux26;
31		i2c27 = &imux27;
32		i2c28 = &imux28;
33		i2c29 = &imux29;
34		i2c30 = &imux30;
35		i2c31 = &imux31;
36	};
37	chosen {
38		stdout-path = &uart5;
39		bootargs = "console=ttyS4,115200 earlyprintk";
40	};
41
42	memory@80000000 {
43		reg = <0x80000000 0x20000000>;
44	};
45
46	iio-hwmon {
47		compatible = "iio-hwmon";
48		io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
49			      <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>;
50	};
51
52};
53
54&fmc {
55	status = "okay";
56	flash@0 {
57		status = "okay";
58		m25p,fast-read;
59#include "openbmc-flash-layout.dtsi"
60	};
61};
62
63&spi1 {
64	status = "okay";
65	pinctrl-names = "default";
66	pinctrl-0 = <&pinctrl_spi1_default>;
67	flash@0 {
68		status = "okay";
69		m25p,fast-read;
70		label = "pnor";
71	};
72};
73
74&lpc_snoop {
75	status = "okay";
76	snoop-ports = <0x80>;
77};
78
79&lpc_ctrl {
80	// Enable lpc clock
81	status = "okay";
82};
83
84&vuart {
85	// VUART Host Console
86	status = "okay";
87};
88
89&uart1 {
90	// Host Console
91	status = "okay";
92	pinctrl-names = "default";
93	pinctrl-0 = <&pinctrl_txd1_default
94		     &pinctrl_rxd1_default>;
95};
96
97&uart2 {
98	// SoL Host Console
99	status = "okay";
100};
101
102&uart3 {
103	// SoL BMC Console
104	status = "okay";
105};
106
107&uart5 {
108	// BMC Console
109	status = "okay";
110};
111
112&kcs2 {
113	// BMC KCS channel 2
114	status = "okay";
115	kcs_addr = <0xca8>;
116};
117
118&kcs3 {
119	// BMC KCS channel 3
120	status = "okay";
121	kcs_addr = <0xca2>;
122};
123
124&mac0 {
125	status = "okay";
126
127	pinctrl-names = "default";
128	pinctrl-0 = <&pinctrl_rmii1_default>;
129	use-ncsi;
130};
131
132&adc {
133	status = "okay";
134};
135
136&i2c0 {
137	status = "okay";
138	//Airmax Conn B, CPU0 PIROM, CPU1 PIROM
139};
140
141&i2c1 {
142	status = "okay";
143	//X24 Riser
144	i2c-switch@71 {
145		compatible = "nxp,pca9544";
146		#address-cells = <1>;
147		#size-cells = <0>;
148		reg = <0x71>;
149
150		imux16: i2c@0 {
151			#address-cells = <1>;
152			#size-cells = <0>;
153			reg = <0>;
154
155			ina230@45 {
156				compatible = "ti,ina230";
157				reg = <0x45>;
158			};
159
160			tmp75@48 {
161				compatible = "ti,tmp75";
162				reg = <0x48>;
163			};
164
165			tmp421@49 {
166				compatible = "ti,tmp75";
167				reg = <0x49>;
168			};
169
170			eeprom@50 {
171				compatible = "atmel,24c64";
172				reg = <0x50>;
173				pagesize = <32>;
174			};
175
176			i2c-switch@73 {
177				compatible = "nxp,pca9546";
178				#address-cells = <1>;
179				#size-cells = <0>;
180				reg = <0x73>;
181
182				imux20: i2c@0 {
183					#address-cells = <1>;
184					#size-cells = <0>;
185					reg = <0>;
186				};
187
188				imux21: i2c@1 {
189					#address-cells = <1>;
190					#size-cells = <0>;
191					reg = <1>;
192				};
193
194				imux22: i2c@2 {
195					#address-cells = <1>;
196					#size-cells = <0>;
197					reg = <2>;
198				};
199
200				imux23: i2c@3 {
201					#address-cells = <1>;
202					#size-cells = <0>;
203					reg = <3>;
204				};
205
206			};
207
208		};
209
210		imux17: i2c@1 {
211			#address-cells = <1>;
212			#size-cells = <0>;
213			reg = <1>;
214
215			ina230@45 {
216				compatible = "ti,ina230";
217				reg = <0x45>;
218			};
219
220			tmp421@48 {
221				compatible = "ti,tmp75";
222				reg = <0x48>;
223			};
224
225			tmp421@49 {
226				compatible = "ti,tmp75";
227				reg = <0x49>;
228			};
229
230			eeprom@50 {
231				compatible = "atmel,24c64";
232				reg = <0x50>;
233				pagesize = <32>;
234			};
235
236			i2c-switch@73 {
237				compatible = "nxp,pca9546";
238				#address-cells = <1>;
239				#size-cells = <0>;
240				reg = <0x73>;
241
242				imux24: i2c@0 {
243					#address-cells = <1>;
244					#size-cells = <0>;
245					reg = <0>;
246				};
247
248				imux25: i2c@1 {
249					#address-cells = <1>;
250					#size-cells = <0>;
251					reg = <1>;
252				};
253
254				imux26: i2c@2 {
255					#address-cells = <1>;
256					#size-cells = <0>;
257					reg = <2>;
258				};
259
260				imux27: i2c@3 {
261					#address-cells = <1>;
262					#size-cells = <0>;
263					reg = <3>;
264				};
265
266			};
267
268		};
269
270		imux18: i2c@2 {
271			#address-cells = <1>;
272			#size-cells = <0>;
273			reg = <2>;
274
275			ina230@45 {
276				compatible = "ti,ina230";
277				reg = <0x45>;
278			};
279
280			tmp421@48 {
281				compatible = "ti,tmp75";
282				reg = <0x48>;
283			};
284
285			tmp421@49 {
286				compatible = "ti,tmp75";
287				reg = <0x49>;
288			};
289
290			eeprom@50 {
291				compatible = "atmel,24c64";
292				reg = <0x50>;
293				pagesize = <32>;
294			};
295
296			i2c-switch@73 {
297				compatible = "nxp,pca9546";
298				#address-cells = <1>;
299				#size-cells = <0>;
300				reg = <0x73>;
301
302				imux28: i2c@0 {
303					#address-cells = <1>;
304					#size-cells = <0>;
305					reg = <0>;
306				};
307
308				imux29: i2c@1 {
309					#address-cells = <1>;
310					#size-cells = <0>;
311					reg = <1>;
312				};
313
314				imux30: i2c@2 {
315					#address-cells = <1>;
316					#size-cells = <0>;
317					reg = <2>;
318				};
319
320				imux31: i2c@3 {
321					#address-cells = <1>;
322					#size-cells = <0>;
323					reg = <3>;
324				};
325
326			};
327
328		};
329
330		imux19: i2c@3 {
331			#address-cells = <1>;
332			#size-cells = <0>;
333			reg = <3>;
334
335			i2c-switch@40 {
336				compatible = "ti,ina230";
337				reg = <0x40>;
338			};
339
340			i2c-switch@41 {
341				compatible = "ti,ina230";
342				reg = <0x41>;
343			};
344
345			i2c-switch@45 {
346				compatible = "ti,ina230";
347				reg = <0x45>;
348			};
349
350		};
351
352	};
353};
354
355&i2c2 {
356	status = "okay";
357	// Mezz Management SMBus
358};
359
360&i2c3 {
361	status = "okay";
362	// SMBus to Board ID EEPROM
363};
364
365&i2c4 {
366	status = "okay";
367	// BMC Debug Header
368};
369
370&i2c5 {
371	status = "okay";
372	// CPU Voltage regulators
373	regulator@48 {
374		compatible = "infineon,pxe1610";
375		reg = <0x48>;
376	};
377	regulator@4a {
378		compatible = "infineon,pxe1610";
379		reg = <0x4a>;
380	};
381	regulator@50 {
382		compatible = "infineon,pxe1610";
383		reg = <0x50>;
384	};
385	regulator@52 {
386		compatible = "infineon,pxe1610";
387		reg = <0x52>;
388	};
389	regulator@58 {
390		compatible = "infineon,pxe1610";
391		reg = <0x58>;
392	};
393	regulator@5a {
394		compatible = "infineon,pxe1610";
395		reg = <0x5a>;
396	};
397	regulator@68 {
398		compatible = "infineon,pxe1610";
399		reg = <0x68>;
400	};
401	regulator@70 {
402		compatible = "infineon,pxe1610";
403		reg = <0x70>;
404	};
405	regulator@72 {
406		compatible = "infineon,pxe1610";
407		reg = <0x72>;
408	};
409};
410
411&i2c6 {
412	status = "okay";
413	tpm@20 {
414		compatible = "infineon,slb9645tt";
415		reg = <0x20>;
416	};
417	tmp421@4e {
418		compatible = "ti,tmp421";
419		reg = <0x4e>;
420	};
421	tmp421@4f {
422		compatible = "ti,tmp421";
423		reg = <0x4f>;
424	};
425	eeprom@54 {
426		compatible = "atmel,24c64";
427		reg = <0x54>;
428		pagesize = <32>;
429	};
430};
431
432&i2c7 {
433	status = "okay";
434	//HSC, AirMax Conn A
435};
436
437&i2c8 {
438	status = "okay";
439	tmp421@1f {
440		compatible = "ti,tmp421";
441		reg = <0x1f>;
442	};
443	//Mezz Sensor SMBus
444};
445
446&i2c9 {
447	status = "okay";
448	//USB Debug Connector
449};
450
451&pwm_tacho {
452	status = "okay";
453	pinctrl-names = "default";
454	pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default>;
455	fan@0 {
456		reg = <0x00>;
457		aspeed,fan-tach-ch = /bits/ 8 <0x00>;
458	};
459
460	fan@1 {
461		reg = <0x01>;
462		aspeed,fan-tach-ch = /bits/ 8 <0x02>;
463	};
464};
465