1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Mediatek Watchdog Driver
4 *
5 * Copyright (C) 2014 Matthias Brugger
6 *
7 * Matthias Brugger <matthias.bgg@gmail.com>
8 *
9 * Based on sunxi_wdt.c
10 */
11
12 #include <linux/err.h>
13 #include <linux/init.h>
14 #include <linux/io.h>
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/moduleparam.h>
18 #include <linux/of.h>
19 #include <linux/platform_device.h>
20 #include <linux/types.h>
21 #include <linux/watchdog.h>
22 #include <linux/delay.h>
23
24 #define WDT_MAX_TIMEOUT 31
25 #define WDT_MIN_TIMEOUT 1
26 #define WDT_LENGTH_TIMEOUT(n) ((n) << 5)
27
28 #define WDT_LENGTH 0x04
29 #define WDT_LENGTH_KEY 0x8
30
31 #define WDT_RST 0x08
32 #define WDT_RST_RELOAD 0x1971
33
34 #define WDT_MODE 0x00
35 #define WDT_MODE_EN (1 << 0)
36 #define WDT_MODE_EXT_POL_LOW (0 << 1)
37 #define WDT_MODE_EXT_POL_HIGH (1 << 1)
38 #define WDT_MODE_EXRST_EN (1 << 2)
39 #define WDT_MODE_IRQ_EN (1 << 3)
40 #define WDT_MODE_AUTO_START (1 << 4)
41 #define WDT_MODE_DUAL_EN (1 << 6)
42 #define WDT_MODE_KEY 0x22000000
43
44 #define WDT_SWRST 0x14
45 #define WDT_SWRST_KEY 0x1209
46
47 #define DRV_NAME "mtk-wdt"
48 #define DRV_VERSION "1.0"
49
50 static bool nowayout = WATCHDOG_NOWAYOUT;
51 static unsigned int timeout;
52
53 struct mtk_wdt_dev {
54 struct watchdog_device wdt_dev;
55 void __iomem *wdt_base;
56 };
57
mtk_wdt_restart(struct watchdog_device * wdt_dev,unsigned long action,void * data)58 static int mtk_wdt_restart(struct watchdog_device *wdt_dev,
59 unsigned long action, void *data)
60 {
61 struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev);
62 void __iomem *wdt_base;
63
64 wdt_base = mtk_wdt->wdt_base;
65
66 while (1) {
67 writel(WDT_SWRST_KEY, wdt_base + WDT_SWRST);
68 mdelay(5);
69 }
70
71 return 0;
72 }
73
mtk_wdt_ping(struct watchdog_device * wdt_dev)74 static int mtk_wdt_ping(struct watchdog_device *wdt_dev)
75 {
76 struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev);
77 void __iomem *wdt_base = mtk_wdt->wdt_base;
78
79 iowrite32(WDT_RST_RELOAD, wdt_base + WDT_RST);
80
81 return 0;
82 }
83
mtk_wdt_set_timeout(struct watchdog_device * wdt_dev,unsigned int timeout)84 static int mtk_wdt_set_timeout(struct watchdog_device *wdt_dev,
85 unsigned int timeout)
86 {
87 struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev);
88 void __iomem *wdt_base = mtk_wdt->wdt_base;
89 u32 reg;
90
91 wdt_dev->timeout = timeout;
92
93 /*
94 * One bit is the value of 512 ticks
95 * The clock has 32 KHz
96 */
97 reg = WDT_LENGTH_TIMEOUT(timeout << 6) | WDT_LENGTH_KEY;
98 iowrite32(reg, wdt_base + WDT_LENGTH);
99
100 mtk_wdt_ping(wdt_dev);
101
102 return 0;
103 }
104
mtk_wdt_stop(struct watchdog_device * wdt_dev)105 static int mtk_wdt_stop(struct watchdog_device *wdt_dev)
106 {
107 struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev);
108 void __iomem *wdt_base = mtk_wdt->wdt_base;
109 u32 reg;
110
111 reg = readl(wdt_base + WDT_MODE);
112 reg &= ~WDT_MODE_EN;
113 reg |= WDT_MODE_KEY;
114 iowrite32(reg, wdt_base + WDT_MODE);
115
116 return 0;
117 }
118
mtk_wdt_start(struct watchdog_device * wdt_dev)119 static int mtk_wdt_start(struct watchdog_device *wdt_dev)
120 {
121 u32 reg;
122 struct mtk_wdt_dev *mtk_wdt = watchdog_get_drvdata(wdt_dev);
123 void __iomem *wdt_base = mtk_wdt->wdt_base;
124 int ret;
125
126 ret = mtk_wdt_set_timeout(wdt_dev, wdt_dev->timeout);
127 if (ret < 0)
128 return ret;
129
130 reg = ioread32(wdt_base + WDT_MODE);
131 reg &= ~(WDT_MODE_IRQ_EN | WDT_MODE_DUAL_EN);
132 reg |= (WDT_MODE_EN | WDT_MODE_KEY);
133 iowrite32(reg, wdt_base + WDT_MODE);
134
135 return 0;
136 }
137
138 static const struct watchdog_info mtk_wdt_info = {
139 .identity = DRV_NAME,
140 .options = WDIOF_SETTIMEOUT |
141 WDIOF_KEEPALIVEPING |
142 WDIOF_MAGICCLOSE,
143 };
144
145 static const struct watchdog_ops mtk_wdt_ops = {
146 .owner = THIS_MODULE,
147 .start = mtk_wdt_start,
148 .stop = mtk_wdt_stop,
149 .ping = mtk_wdt_ping,
150 .set_timeout = mtk_wdt_set_timeout,
151 .restart = mtk_wdt_restart,
152 };
153
mtk_wdt_probe(struct platform_device * pdev)154 static int mtk_wdt_probe(struct platform_device *pdev)
155 {
156 struct device *dev = &pdev->dev;
157 struct mtk_wdt_dev *mtk_wdt;
158 int err;
159
160 mtk_wdt = devm_kzalloc(dev, sizeof(*mtk_wdt), GFP_KERNEL);
161 if (!mtk_wdt)
162 return -ENOMEM;
163
164 platform_set_drvdata(pdev, mtk_wdt);
165
166 mtk_wdt->wdt_base = devm_platform_ioremap_resource(pdev, 0);
167 if (IS_ERR(mtk_wdt->wdt_base))
168 return PTR_ERR(mtk_wdt->wdt_base);
169
170 mtk_wdt->wdt_dev.info = &mtk_wdt_info;
171 mtk_wdt->wdt_dev.ops = &mtk_wdt_ops;
172 mtk_wdt->wdt_dev.timeout = WDT_MAX_TIMEOUT;
173 mtk_wdt->wdt_dev.max_timeout = WDT_MAX_TIMEOUT;
174 mtk_wdt->wdt_dev.min_timeout = WDT_MIN_TIMEOUT;
175 mtk_wdt->wdt_dev.parent = dev;
176
177 watchdog_init_timeout(&mtk_wdt->wdt_dev, timeout, dev);
178 watchdog_set_nowayout(&mtk_wdt->wdt_dev, nowayout);
179 watchdog_set_restart_priority(&mtk_wdt->wdt_dev, 128);
180
181 watchdog_set_drvdata(&mtk_wdt->wdt_dev, mtk_wdt);
182
183 mtk_wdt_stop(&mtk_wdt->wdt_dev);
184
185 watchdog_stop_on_reboot(&mtk_wdt->wdt_dev);
186 err = devm_watchdog_register_device(dev, &mtk_wdt->wdt_dev);
187 if (unlikely(err))
188 return err;
189
190 dev_info(dev, "Watchdog enabled (timeout=%d sec, nowayout=%d)\n",
191 mtk_wdt->wdt_dev.timeout, nowayout);
192
193 return 0;
194 }
195
196 #ifdef CONFIG_PM_SLEEP
mtk_wdt_suspend(struct device * dev)197 static int mtk_wdt_suspend(struct device *dev)
198 {
199 struct mtk_wdt_dev *mtk_wdt = dev_get_drvdata(dev);
200
201 if (watchdog_active(&mtk_wdt->wdt_dev))
202 mtk_wdt_stop(&mtk_wdt->wdt_dev);
203
204 return 0;
205 }
206
mtk_wdt_resume(struct device * dev)207 static int mtk_wdt_resume(struct device *dev)
208 {
209 struct mtk_wdt_dev *mtk_wdt = dev_get_drvdata(dev);
210
211 if (watchdog_active(&mtk_wdt->wdt_dev)) {
212 mtk_wdt_start(&mtk_wdt->wdt_dev);
213 mtk_wdt_ping(&mtk_wdt->wdt_dev);
214 }
215
216 return 0;
217 }
218 #endif
219
220 static const struct of_device_id mtk_wdt_dt_ids[] = {
221 { .compatible = "mediatek,mt6589-wdt" },
222 { /* sentinel */ }
223 };
224 MODULE_DEVICE_TABLE(of, mtk_wdt_dt_ids);
225
226 static const struct dev_pm_ops mtk_wdt_pm_ops = {
227 SET_SYSTEM_SLEEP_PM_OPS(mtk_wdt_suspend,
228 mtk_wdt_resume)
229 };
230
231 static struct platform_driver mtk_wdt_driver = {
232 .probe = mtk_wdt_probe,
233 .driver = {
234 .name = DRV_NAME,
235 .pm = &mtk_wdt_pm_ops,
236 .of_match_table = mtk_wdt_dt_ids,
237 },
238 };
239
240 module_platform_driver(mtk_wdt_driver);
241
242 module_param(timeout, uint, 0);
243 MODULE_PARM_DESC(timeout, "Watchdog heartbeat in seconds");
244
245 module_param(nowayout, bool, 0);
246 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
247 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
248
249 MODULE_LICENSE("GPL");
250 MODULE_AUTHOR("Matthias Brugger <matthias.bgg@gmail.com>");
251 MODULE_DESCRIPTION("Mediatek WatchDog Timer Driver");
252 MODULE_VERSION(DRV_VERSION);
253
