1 /*
2 * linux/drivers/video/offb.c -- Open Firmware based frame buffer device
3 *
4 * Copyright (C) 1997 Geert Uytterhoeven
5 *
6 * This driver is partly based on the PowerMac console driver:
7 *
8 * Copyright (C) 1996 Paul Mackerras
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file COPYING in the main directory of this archive for
12 * more details.
13 */
14
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/errno.h>
18 #include <linux/string.h>
19 #include <linux/mm.h>
20 #include <linux/vmalloc.h>
21 #include <linux/delay.h>
22 #include <linux/of.h>
23 #include <linux/of_address.h>
24 #include <linux/interrupt.h>
25 #include <linux/fb.h>
26 #include <linux/init.h>
27 #include <linux/ioport.h>
28 #include <linux/pci.h>
29 #include <asm/io.h>
30
31 #ifdef CONFIG_PPC32
32 #include <asm/bootx.h>
33 #endif
34
35 #include "macmodes.h"
36
37 /* Supported palette hacks */
38 enum {
39 cmap_unknown,
40 cmap_simple, /* ATI Mach64 */
41 cmap_r128, /* ATI Rage128 */
42 cmap_M3A, /* ATI Rage Mobility M3 Head A */
43 cmap_M3B, /* ATI Rage Mobility M3 Head B */
44 cmap_radeon, /* ATI Radeon */
45 cmap_gxt2000, /* IBM GXT2000 */
46 cmap_avivo, /* ATI R5xx */
47 cmap_qemu, /* qemu vga */
48 };
49
50 struct offb_par {
51 volatile void __iomem *cmap_adr;
52 volatile void __iomem *cmap_data;
53 int cmap_type;
54 int blanked;
55 };
56
57 struct offb_par default_par;
58
59 #ifdef CONFIG_PPC32
60 extern boot_infos_t *boot_infos;
61 #endif
62
63 /* Definitions used by the Avivo palette hack */
64 #define AVIVO_DC_LUT_RW_SELECT 0x6480
65 #define AVIVO_DC_LUT_RW_MODE 0x6484
66 #define AVIVO_DC_LUT_RW_INDEX 0x6488
67 #define AVIVO_DC_LUT_SEQ_COLOR 0x648c
68 #define AVIVO_DC_LUT_PWL_DATA 0x6490
69 #define AVIVO_DC_LUT_30_COLOR 0x6494
70 #define AVIVO_DC_LUT_READ_PIPE_SELECT 0x6498
71 #define AVIVO_DC_LUT_WRITE_EN_MASK 0x649c
72 #define AVIVO_DC_LUT_AUTOFILL 0x64a0
73
74 #define AVIVO_DC_LUTA_CONTROL 0x64c0
75 #define AVIVO_DC_LUTA_BLACK_OFFSET_BLUE 0x64c4
76 #define AVIVO_DC_LUTA_BLACK_OFFSET_GREEN 0x64c8
77 #define AVIVO_DC_LUTA_BLACK_OFFSET_RED 0x64cc
78 #define AVIVO_DC_LUTA_WHITE_OFFSET_BLUE 0x64d0
79 #define AVIVO_DC_LUTA_WHITE_OFFSET_GREEN 0x64d4
80 #define AVIVO_DC_LUTA_WHITE_OFFSET_RED 0x64d8
81
82 #define AVIVO_DC_LUTB_CONTROL 0x6cc0
83 #define AVIVO_DC_LUTB_BLACK_OFFSET_BLUE 0x6cc4
84 #define AVIVO_DC_LUTB_BLACK_OFFSET_GREEN 0x6cc8
85 #define AVIVO_DC_LUTB_BLACK_OFFSET_RED 0x6ccc
86 #define AVIVO_DC_LUTB_WHITE_OFFSET_BLUE 0x6cd0
87 #define AVIVO_DC_LUTB_WHITE_OFFSET_GREEN 0x6cd4
88 #define AVIVO_DC_LUTB_WHITE_OFFSET_RED 0x6cd8
89
90 /*
91 * Set a single color register. The values supplied are already
92 * rounded down to the hardware's capabilities (according to the
93 * entries in the var structure). Return != 0 for invalid regno.
94 */
95
offb_setcolreg(u_int regno,u_int red,u_int green,u_int blue,u_int transp,struct fb_info * info)96 static int offb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
97 u_int transp, struct fb_info *info)
98 {
99 struct offb_par *par = (struct offb_par *) info->par;
100
101 if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
102 u32 *pal = info->pseudo_palette;
103 u32 cr = red >> (16 - info->var.red.length);
104 u32 cg = green >> (16 - info->var.green.length);
105 u32 cb = blue >> (16 - info->var.blue.length);
106 u32 value;
107
108 if (regno >= 16)
109 return -EINVAL;
110
111 value = (cr << info->var.red.offset) |
112 (cg << info->var.green.offset) |
113 (cb << info->var.blue.offset);
114 if (info->var.transp.length > 0) {
115 u32 mask = (1 << info->var.transp.length) - 1;
116 mask <<= info->var.transp.offset;
117 value |= mask;
118 }
119 pal[regno] = value;
120 return 0;
121 }
122
123 if (regno > 255)
124 return -EINVAL;
125
126 red >>= 8;
127 green >>= 8;
128 blue >>= 8;
129
130 if (!par->cmap_adr)
131 return 0;
132
133 switch (par->cmap_type) {
134 case cmap_simple:
135 writeb(regno, par->cmap_adr);
136 writeb(red, par->cmap_data);
137 writeb(green, par->cmap_data);
138 writeb(blue, par->cmap_data);
139 break;
140 case cmap_M3A:
141 /* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */
142 out_le32(par->cmap_adr + 0x58,
143 in_le32(par->cmap_adr + 0x58) & ~0x20);
144 /* fall through */
145 case cmap_r128:
146 /* Set palette index & data */
147 out_8(par->cmap_adr + 0xb0, regno);
148 out_le32(par->cmap_adr + 0xb4,
149 (red << 16 | green << 8 | blue));
150 break;
151 case cmap_M3B:
152 /* Set PALETTE_ACCESS_CNTL in DAC_CNTL */
153 out_le32(par->cmap_adr + 0x58,
154 in_le32(par->cmap_adr + 0x58) | 0x20);
155 /* Set palette index & data */
156 out_8(par->cmap_adr + 0xb0, regno);
157 out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue));
158 break;
159 case cmap_radeon:
160 /* Set palette index & data (could be smarter) */
161 out_8(par->cmap_adr + 0xb0, regno);
162 out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue));
163 break;
164 case cmap_gxt2000:
165 out_le32(((unsigned __iomem *) par->cmap_adr) + regno,
166 (red << 16 | green << 8 | blue));
167 break;
168 case cmap_avivo:
169 /* Write to both LUTs for now */
170 writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
171 writeb(regno, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
172 writel(((red) << 22) | ((green) << 12) | ((blue) << 2),
173 par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
174 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
175 writeb(regno, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
176 writel(((red) << 22) | ((green) << 12) | ((blue) << 2),
177 par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
178 break;
179 }
180
181 return 0;
182 }
183
184 /*
185 * Blank the display.
186 */
187
offb_blank(int blank,struct fb_info * info)188 static int offb_blank(int blank, struct fb_info *info)
189 {
190 struct offb_par *par = (struct offb_par *) info->par;
191 int i, j;
192
193 if (!par->cmap_adr)
194 return 0;
195
196 if (!par->blanked)
197 if (!blank)
198 return 0;
199
200 par->blanked = blank;
201
202 if (blank)
203 for (i = 0; i < 256; i++) {
204 switch (par->cmap_type) {
205 case cmap_simple:
206 writeb(i, par->cmap_adr);
207 for (j = 0; j < 3; j++)
208 writeb(0, par->cmap_data);
209 break;
210 case cmap_M3A:
211 /* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */
212 out_le32(par->cmap_adr + 0x58,
213 in_le32(par->cmap_adr + 0x58) & ~0x20);
214 /* fall through */
215 case cmap_r128:
216 /* Set palette index & data */
217 out_8(par->cmap_adr + 0xb0, i);
218 out_le32(par->cmap_adr + 0xb4, 0);
219 break;
220 case cmap_M3B:
221 /* Set PALETTE_ACCESS_CNTL in DAC_CNTL */
222 out_le32(par->cmap_adr + 0x58,
223 in_le32(par->cmap_adr + 0x58) | 0x20);
224 /* Set palette index & data */
225 out_8(par->cmap_adr + 0xb0, i);
226 out_le32(par->cmap_adr + 0xb4, 0);
227 break;
228 case cmap_radeon:
229 out_8(par->cmap_adr + 0xb0, i);
230 out_le32(par->cmap_adr + 0xb4, 0);
231 break;
232 case cmap_gxt2000:
233 out_le32(((unsigned __iomem *) par->cmap_adr) + i,
234 0);
235 break;
236 case cmap_avivo:
237 writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
238 writeb(i, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
239 writel(0, par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
240 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
241 writeb(i, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
242 writel(0, par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
243 break;
244 }
245 } else
246 fb_set_cmap(&info->cmap, info);
247 return 0;
248 }
249
offb_set_par(struct fb_info * info)250 static int offb_set_par(struct fb_info *info)
251 {
252 struct offb_par *par = (struct offb_par *) info->par;
253
254 /* On avivo, initialize palette control */
255 if (par->cmap_type == cmap_avivo) {
256 writel(0, par->cmap_adr + AVIVO_DC_LUTA_CONTROL);
257 writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_BLUE);
258 writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_GREEN);
259 writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_RED);
260 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_BLUE);
261 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_GREEN);
262 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_RED);
263 writel(0, par->cmap_adr + AVIVO_DC_LUTB_CONTROL);
264 writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_BLUE);
265 writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_GREEN);
266 writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_RED);
267 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_BLUE);
268 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_GREEN);
269 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_RED);
270 writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
271 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_MODE);
272 writel(0x0000003f, par->cmap_adr + AVIVO_DC_LUT_WRITE_EN_MASK);
273 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
274 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_MODE);
275 writel(0x0000003f, par->cmap_adr + AVIVO_DC_LUT_WRITE_EN_MASK);
276 }
277 return 0;
278 }
279
offb_destroy(struct fb_info * info)280 static void offb_destroy(struct fb_info *info)
281 {
282 if (info->screen_base)
283 iounmap(info->screen_base);
284 release_mem_region(info->apertures->ranges[0].base, info->apertures->ranges[0].size);
285 fb_dealloc_cmap(&info->cmap);
286 framebuffer_release(info);
287 }
288
289 static struct fb_ops offb_ops = {
290 .owner = THIS_MODULE,
291 .fb_destroy = offb_destroy,
292 .fb_setcolreg = offb_setcolreg,
293 .fb_set_par = offb_set_par,
294 .fb_blank = offb_blank,
295 .fb_fillrect = cfb_fillrect,
296 .fb_copyarea = cfb_copyarea,
297 .fb_imageblit = cfb_imageblit,
298 };
299
offb_map_reg(struct device_node * np,int index,unsigned long offset,unsigned long size)300 static void __iomem *offb_map_reg(struct device_node *np, int index,
301 unsigned long offset, unsigned long size)
302 {
303 const __be32 *addrp;
304 u64 asize, taddr;
305 unsigned int flags;
306
307 addrp = of_get_pci_address(np, index, &asize, &flags);
308 if (addrp == NULL)
309 addrp = of_get_address(np, index, &asize, &flags);
310 if (addrp == NULL)
311 return NULL;
312 if ((flags & (IORESOURCE_IO | IORESOURCE_MEM)) == 0)
313 return NULL;
314 if ((offset + size) > asize)
315 return NULL;
316 taddr = of_translate_address(np, addrp);
317 if (taddr == OF_BAD_ADDR)
318 return NULL;
319 return ioremap(taddr + offset, size);
320 }
321
offb_init_palette_hacks(struct fb_info * info,struct device_node * dp,unsigned long address)322 static void offb_init_palette_hacks(struct fb_info *info, struct device_node *dp,
323 unsigned long address)
324 {
325 struct offb_par *par = (struct offb_par *) info->par;
326
327 if (of_node_name_prefix(dp, "ATY,Rage128")) {
328 par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff);
329 if (par->cmap_adr)
330 par->cmap_type = cmap_r128;
331 } else if (of_node_name_prefix(dp, "ATY,RageM3pA") ||
332 of_node_name_prefix(dp, "ATY,RageM3p12A")) {
333 par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff);
334 if (par->cmap_adr)
335 par->cmap_type = cmap_M3A;
336 } else if (of_node_name_prefix(dp, "ATY,RageM3pB")) {
337 par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff);
338 if (par->cmap_adr)
339 par->cmap_type = cmap_M3B;
340 } else if (of_node_name_prefix(dp, "ATY,Rage6")) {
341 par->cmap_adr = offb_map_reg(dp, 1, 0, 0x1fff);
342 if (par->cmap_adr)
343 par->cmap_type = cmap_radeon;
344 } else if (of_node_name_prefix(dp, "ATY,")) {
345 unsigned long base = address & 0xff000000UL;
346 par->cmap_adr =
347 ioremap(base + 0x7ff000, 0x1000) + 0xcc0;
348 par->cmap_data = par->cmap_adr + 1;
349 par->cmap_type = cmap_simple;
350 } else if (dp && (of_device_is_compatible(dp, "pci1014,b7") ||
351 of_device_is_compatible(dp, "pci1014,21c"))) {
352 par->cmap_adr = offb_map_reg(dp, 0, 0x6000, 0x1000);
353 if (par->cmap_adr)
354 par->cmap_type = cmap_gxt2000;
355 } else if (of_node_name_prefix(dp, "vga,Display-")) {
356 /* Look for AVIVO initialized by SLOF */
357 struct device_node *pciparent = of_get_parent(dp);
358 const u32 *vid, *did;
359 vid = of_get_property(pciparent, "vendor-id", NULL);
360 did = of_get_property(pciparent, "device-id", NULL);
361 /* This will match most R5xx */
362 if (vid && did && *vid == 0x1002 &&
363 ((*did >= 0x7100 && *did < 0x7800) ||
364 (*did >= 0x9400))) {
365 par->cmap_adr = offb_map_reg(pciparent, 2, 0, 0x10000);
366 if (par->cmap_adr)
367 par->cmap_type = cmap_avivo;
368 }
369 of_node_put(pciparent);
370 } else if (dp && of_device_is_compatible(dp, "qemu,std-vga")) {
371 #ifdef __BIG_ENDIAN
372 const __be32 io_of_addr[3] = { 0x01000000, 0x0, 0x0 };
373 #else
374 const __be32 io_of_addr[3] = { 0x00000001, 0x0, 0x0 };
375 #endif
376 u64 io_addr = of_translate_address(dp, io_of_addr);
377 if (io_addr != OF_BAD_ADDR) {
378 par->cmap_adr = ioremap(io_addr + 0x3c8, 2);
379 if (par->cmap_adr) {
380 par->cmap_type = cmap_simple;
381 par->cmap_data = par->cmap_adr + 1;
382 }
383 }
384 }
385 info->fix.visual = (par->cmap_type != cmap_unknown) ?
386 FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_STATIC_PSEUDOCOLOR;
387 }
388
offb_init_fb(const char * name,int width,int height,int depth,int pitch,unsigned long address,int foreign_endian,struct device_node * dp)389 static void __init offb_init_fb(const char *name,
390 int width, int height, int depth,
391 int pitch, unsigned long address,
392 int foreign_endian, struct device_node *dp)
393 {
394 unsigned long res_size = pitch * height;
395 struct offb_par *par = &default_par;
396 unsigned long res_start = address;
397 struct fb_fix_screeninfo *fix;
398 struct fb_var_screeninfo *var;
399 struct fb_info *info;
400
401 if (!request_mem_region(res_start, res_size, "offb"))
402 return;
403
404 printk(KERN_INFO
405 "Using unsupported %dx%d %s at %lx, depth=%d, pitch=%d\n",
406 width, height, name, address, depth, pitch);
407 if (depth != 8 && depth != 15 && depth != 16 && depth != 32) {
408 printk(KERN_ERR "%pOF: can't use depth = %d\n", dp, depth);
409 release_mem_region(res_start, res_size);
410 return;
411 }
412
413 info = framebuffer_alloc(sizeof(u32) * 16, NULL);
414
415 if (info == 0) {
416 release_mem_region(res_start, res_size);
417 return;
418 }
419
420 fix = &info->fix;
421 var = &info->var;
422 info->par = par;
423
424 if (name) {
425 strcpy(fix->id, "OFfb ");
426 strncat(fix->id, name, sizeof(fix->id) - sizeof("OFfb "));
427 fix->id[sizeof(fix->id) - 1] = '\0';
428 } else
429 snprintf(fix->id, sizeof(fix->id), "OFfb %pOFn", dp);
430
431
432 var->xres = var->xres_virtual = width;
433 var->yres = var->yres_virtual = height;
434 fix->line_length = pitch;
435
436 fix->smem_start = address;
437 fix->smem_len = pitch * height;
438 fix->type = FB_TYPE_PACKED_PIXELS;
439 fix->type_aux = 0;
440
441 par->cmap_type = cmap_unknown;
442 if (depth == 8)
443 offb_init_palette_hacks(info, dp, address);
444 else
445 fix->visual = FB_VISUAL_TRUECOLOR;
446
447 var->xoffset = var->yoffset = 0;
448 switch (depth) {
449 case 8:
450 var->bits_per_pixel = 8;
451 var->red.offset = 0;
452 var->red.length = 8;
453 var->green.offset = 0;
454 var->green.length = 8;
455 var->blue.offset = 0;
456 var->blue.length = 8;
457 var->transp.offset = 0;
458 var->transp.length = 0;
459 break;
460 case 15: /* RGB 555 */
461 var->bits_per_pixel = 16;
462 var->red.offset = 10;
463 var->red.length = 5;
464 var->green.offset = 5;
465 var->green.length = 5;
466 var->blue.offset = 0;
467 var->blue.length = 5;
468 var->transp.offset = 0;
469 var->transp.length = 0;
470 break;
471 case 16: /* RGB 565 */
472 var->bits_per_pixel = 16;
473 var->red.offset = 11;
474 var->red.length = 5;
475 var->green.offset = 5;
476 var->green.length = 6;
477 var->blue.offset = 0;
478 var->blue.length = 5;
479 var->transp.offset = 0;
480 var->transp.length = 0;
481 break;
482 case 32: /* RGB 888 */
483 var->bits_per_pixel = 32;
484 var->red.offset = 16;
485 var->red.length = 8;
486 var->green.offset = 8;
487 var->green.length = 8;
488 var->blue.offset = 0;
489 var->blue.length = 8;
490 var->transp.offset = 24;
491 var->transp.length = 8;
492 break;
493 }
494 var->red.msb_right = var->green.msb_right = var->blue.msb_right =
495 var->transp.msb_right = 0;
496 var->grayscale = 0;
497 var->nonstd = 0;
498 var->activate = 0;
499 var->height = var->width = -1;
500 var->pixclock = 10000;
501 var->left_margin = var->right_margin = 16;
502 var->upper_margin = var->lower_margin = 16;
503 var->hsync_len = var->vsync_len = 8;
504 var->sync = 0;
505 var->vmode = FB_VMODE_NONINTERLACED;
506
507 /* set offb aperture size for generic probing */
508 info->apertures = alloc_apertures(1);
509 if (!info->apertures)
510 goto out_aper;
511 info->apertures->ranges[0].base = address;
512 info->apertures->ranges[0].size = fix->smem_len;
513
514 info->fbops = &offb_ops;
515 info->screen_base = ioremap(address, fix->smem_len);
516 info->pseudo_palette = (void *) (info + 1);
517 info->flags = FBINFO_DEFAULT | FBINFO_MISC_FIRMWARE | foreign_endian;
518
519 fb_alloc_cmap(&info->cmap, 256, 0);
520
521 if (register_framebuffer(info) < 0)
522 goto out_err;
523
524 fb_info(info, "Open Firmware frame buffer device on %pOF\n", dp);
525 return;
526
527 out_err:
528 fb_dealloc_cmap(&info->cmap);
529 iounmap(info->screen_base);
530 out_aper:
531 iounmap(par->cmap_adr);
532 par->cmap_adr = NULL;
533 framebuffer_release(info);
534 release_mem_region(res_start, res_size);
535 }
536
537
offb_init_nodriver(struct device_node * dp,int no_real_node)538 static void __init offb_init_nodriver(struct device_node *dp, int no_real_node)
539 {
540 unsigned int len;
541 int i, width = 640, height = 480, depth = 8, pitch = 640;
542 unsigned int flags, rsize, addr_prop = 0;
543 unsigned long max_size = 0;
544 u64 rstart, address = OF_BAD_ADDR;
545 const __be32 *pp, *addrp, *up;
546 u64 asize;
547 int foreign_endian = 0;
548
549 #ifdef __BIG_ENDIAN
550 if (of_get_property(dp, "little-endian", NULL))
551 foreign_endian = FBINFO_FOREIGN_ENDIAN;
552 #else
553 if (of_get_property(dp, "big-endian", NULL))
554 foreign_endian = FBINFO_FOREIGN_ENDIAN;
555 #endif
556
557 pp = of_get_property(dp, "linux,bootx-depth", &len);
558 if (pp == NULL)
559 pp = of_get_property(dp, "depth", &len);
560 if (pp && len == sizeof(u32))
561 depth = be32_to_cpup(pp);
562
563 pp = of_get_property(dp, "linux,bootx-width", &len);
564 if (pp == NULL)
565 pp = of_get_property(dp, "width", &len);
566 if (pp && len == sizeof(u32))
567 width = be32_to_cpup(pp);
568
569 pp = of_get_property(dp, "linux,bootx-height", &len);
570 if (pp == NULL)
571 pp = of_get_property(dp, "height", &len);
572 if (pp && len == sizeof(u32))
573 height = be32_to_cpup(pp);
574
575 pp = of_get_property(dp, "linux,bootx-linebytes", &len);
576 if (pp == NULL)
577 pp = of_get_property(dp, "linebytes", &len);
578 if (pp && len == sizeof(u32) && (*pp != 0xffffffffu))
579 pitch = be32_to_cpup(pp);
580 else
581 pitch = width * ((depth + 7) / 8);
582
583 rsize = (unsigned long)pitch * (unsigned long)height;
584
585 /* Ok, now we try to figure out the address of the framebuffer.
586 *
587 * Unfortunately, Open Firmware doesn't provide a standard way to do
588 * so. All we can do is a dodgy heuristic that happens to work in
589 * practice. On most machines, the "address" property contains what
590 * we need, though not on Matrox cards found in IBM machines. What I've
591 * found that appears to give good results is to go through the PCI
592 * ranges and pick one that is both big enough and if possible encloses
593 * the "address" property. If none match, we pick the biggest
594 */
595 up = of_get_property(dp, "linux,bootx-addr", &len);
596 if (up == NULL)
597 up = of_get_property(dp, "address", &len);
598 if (up && len == sizeof(u32))
599 addr_prop = *up;
600
601 /* Hack for when BootX is passing us */
602 if (no_real_node)
603 goto skip_addr;
604
605 for (i = 0; (addrp = of_get_address(dp, i, &asize, &flags))
606 != NULL; i++) {
607 int match_addrp = 0;
608
609 if (!(flags & IORESOURCE_MEM))
610 continue;
611 if (asize < rsize)
612 continue;
613 rstart = of_translate_address(dp, addrp);
614 if (rstart == OF_BAD_ADDR)
615 continue;
616 if (addr_prop && (rstart <= addr_prop) &&
617 ((rstart + asize) >= (addr_prop + rsize)))
618 match_addrp = 1;
619 if (match_addrp) {
620 address = addr_prop;
621 break;
622 }
623 if (rsize > max_size) {
624 max_size = rsize;
625 address = OF_BAD_ADDR;
626 }
627
628 if (address == OF_BAD_ADDR)
629 address = rstart;
630 }
631 skip_addr:
632 if (address == OF_BAD_ADDR && addr_prop)
633 address = (u64)addr_prop;
634 if (address != OF_BAD_ADDR) {
635 #ifdef CONFIG_PCI
636 const __be32 *vidp, *didp;
637 u32 vid, did;
638 struct pci_dev *pdev;
639
640 vidp = of_get_property(dp, "vendor-id", NULL);
641 didp = of_get_property(dp, "device-id", NULL);
642 if (vidp && didp) {
643 vid = be32_to_cpup(vidp);
644 did = be32_to_cpup(didp);
645 pdev = pci_get_device(vid, did, NULL);
646 if (!pdev || pci_enable_device(pdev))
647 return;
648 }
649 #endif
650 /* kludge for valkyrie */
651 if (of_node_name_eq(dp, "valkyrie"))
652 address += 0x1000;
653 offb_init_fb(no_real_node ? "bootx" : NULL,
654 width, height, depth, pitch, address,
655 foreign_endian, no_real_node ? NULL : dp);
656 }
657 }
658
offb_init(void)659 static int __init offb_init(void)
660 {
661 struct device_node *dp = NULL, *boot_disp = NULL;
662
663 if (fb_get_options("offb", NULL))
664 return -ENODEV;
665
666 /* Check if we have a MacOS display without a node spec */
667 if (of_get_property(of_chosen, "linux,bootx-noscreen", NULL) != NULL) {
668 /* The old code tried to work out which node was the MacOS
669 * display based on the address. I'm dropping that since the
670 * lack of a node spec only happens with old BootX versions
671 * (users can update) and with this code, they'll still get
672 * a display (just not the palette hacks).
673 */
674 offb_init_nodriver(of_chosen, 1);
675 }
676
677 for_each_node_by_type(dp, "display") {
678 if (of_get_property(dp, "linux,opened", NULL) &&
679 of_get_property(dp, "linux,boot-display", NULL)) {
680 boot_disp = dp;
681 offb_init_nodriver(dp, 0);
682 }
683 }
684 for_each_node_by_type(dp, "display") {
685 if (of_get_property(dp, "linux,opened", NULL) &&
686 dp != boot_disp)
687 offb_init_nodriver(dp, 0);
688 }
689
690 return 0;
691 }
692
693
694 module_init(offb_init);
695 MODULE_LICENSE("GPL");
696
