1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Freescale linflexuart serial port driver
4 *
5 * Copyright 2012-2016 Freescale Semiconductor, Inc.
6 * Copyright 2017-2019 NXP
7 */
8
9 #if defined(CONFIG_SERIAL_FSL_LINFLEXUART_CONSOLE) && \
10 defined(CONFIG_MAGIC_SYSRQ)
11 #define SUPPORT_SYSRQ
12 #endif
13
14 #include <linux/console.h>
15 #include <linux/io.h>
16 #include <linux/irq.h>
17 #include <linux/module.h>
18 #include <linux/of.h>
19 #include <linux/of_device.h>
20 #include <linux/serial_core.h>
21 #include <linux/slab.h>
22 #include <linux/tty_flip.h>
23 #include <linux/delay.h>
24
25 /* All registers are 32-bit width */
26
27 #define LINCR1 0x0000 /* LIN control register */
28 #define LINIER 0x0004 /* LIN interrupt enable register */
29 #define LINSR 0x0008 /* LIN status register */
30 #define LINESR 0x000C /* LIN error status register */
31 #define UARTCR 0x0010 /* UART mode control register */
32 #define UARTSR 0x0014 /* UART mode status register */
33 #define LINTCSR 0x0018 /* LIN timeout control status register */
34 #define LINOCR 0x001C /* LIN output compare register */
35 #define LINTOCR 0x0020 /* LIN timeout control register */
36 #define LINFBRR 0x0024 /* LIN fractional baud rate register */
37 #define LINIBRR 0x0028 /* LIN integer baud rate register */
38 #define LINCFR 0x002C /* LIN checksum field register */
39 #define LINCR2 0x0030 /* LIN control register 2 */
40 #define BIDR 0x0034 /* Buffer identifier register */
41 #define BDRL 0x0038 /* Buffer data register least significant */
42 #define BDRM 0x003C /* Buffer data register most significant */
43 #define IFER 0x0040 /* Identifier filter enable register */
44 #define IFMI 0x0044 /* Identifier filter match index */
45 #define IFMR 0x0048 /* Identifier filter mode register */
46 #define GCR 0x004C /* Global control register */
47 #define UARTPTO 0x0050 /* UART preset timeout register */
48 #define UARTCTO 0x0054 /* UART current timeout register */
49
50 /*
51 * Register field definitions
52 */
53
54 #define LINFLEXD_LINCR1_INIT BIT(0)
55 #define LINFLEXD_LINCR1_MME BIT(4)
56 #define LINFLEXD_LINCR1_BF BIT(7)
57
58 #define LINFLEXD_LINSR_LINS_INITMODE BIT(12)
59 #define LINFLEXD_LINSR_LINS_MASK (0xF << 12)
60
61 #define LINFLEXD_LINIER_SZIE BIT(15)
62 #define LINFLEXD_LINIER_OCIE BIT(14)
63 #define LINFLEXD_LINIER_BEIE BIT(13)
64 #define LINFLEXD_LINIER_CEIE BIT(12)
65 #define LINFLEXD_LINIER_HEIE BIT(11)
66 #define LINFLEXD_LINIER_FEIE BIT(8)
67 #define LINFLEXD_LINIER_BOIE BIT(7)
68 #define LINFLEXD_LINIER_LSIE BIT(6)
69 #define LINFLEXD_LINIER_WUIE BIT(5)
70 #define LINFLEXD_LINIER_DBFIE BIT(4)
71 #define LINFLEXD_LINIER_DBEIETOIE BIT(3)
72 #define LINFLEXD_LINIER_DRIE BIT(2)
73 #define LINFLEXD_LINIER_DTIE BIT(1)
74 #define LINFLEXD_LINIER_HRIE BIT(0)
75
76 #define LINFLEXD_UARTCR_OSR_MASK (0xF << 24)
77 #define LINFLEXD_UARTCR_OSR(uartcr) (((uartcr) \
78 & LINFLEXD_UARTCR_OSR_MASK) >> 24)
79
80 #define LINFLEXD_UARTCR_ROSE BIT(23)
81
82 #define LINFLEXD_UARTCR_RFBM BIT(9)
83 #define LINFLEXD_UARTCR_TFBM BIT(8)
84 #define LINFLEXD_UARTCR_WL1 BIT(7)
85 #define LINFLEXD_UARTCR_PC1 BIT(6)
86
87 #define LINFLEXD_UARTCR_RXEN BIT(5)
88 #define LINFLEXD_UARTCR_TXEN BIT(4)
89 #define LINFLEXD_UARTCR_PC0 BIT(3)
90
91 #define LINFLEXD_UARTCR_PCE BIT(2)
92 #define LINFLEXD_UARTCR_WL0 BIT(1)
93 #define LINFLEXD_UARTCR_UART BIT(0)
94
95 #define LINFLEXD_UARTSR_SZF BIT(15)
96 #define LINFLEXD_UARTSR_OCF BIT(14)
97 #define LINFLEXD_UARTSR_PE3 BIT(13)
98 #define LINFLEXD_UARTSR_PE2 BIT(12)
99 #define LINFLEXD_UARTSR_PE1 BIT(11)
100 #define LINFLEXD_UARTSR_PE0 BIT(10)
101 #define LINFLEXD_UARTSR_RMB BIT(9)
102 #define LINFLEXD_UARTSR_FEF BIT(8)
103 #define LINFLEXD_UARTSR_BOF BIT(7)
104 #define LINFLEXD_UARTSR_RPS BIT(6)
105 #define LINFLEXD_UARTSR_WUF BIT(5)
106 #define LINFLEXD_UARTSR_4 BIT(4)
107
108 #define LINFLEXD_UARTSR_TO BIT(3)
109
110 #define LINFLEXD_UARTSR_DRFRFE BIT(2)
111 #define LINFLEXD_UARTSR_DTFTFF BIT(1)
112 #define LINFLEXD_UARTSR_NF BIT(0)
113 #define LINFLEXD_UARTSR_PE (LINFLEXD_UARTSR_PE0 |\
114 LINFLEXD_UARTSR_PE1 |\
115 LINFLEXD_UARTSR_PE2 |\
116 LINFLEXD_UARTSR_PE3)
117
118 #define LINFLEX_LDIV_MULTIPLIER (16)
119
120 #define DRIVER_NAME "fsl-linflexuart"
121 #define DEV_NAME "ttyLF"
122 #define UART_NR 4
123
124 #define EARLYCON_BUFFER_INITIAL_CAP 8
125
126 #define PREINIT_DELAY 2000 /* us */
127
128 static const struct of_device_id linflex_dt_ids[] = {
129 {
130 .compatible = "fsl,s32v234-linflexuart",
131 },
132 { /* sentinel */ }
133 };
134 MODULE_DEVICE_TABLE(of, linflex_dt_ids);
135
136 #ifdef CONFIG_SERIAL_FSL_LINFLEXUART_CONSOLE
137 static struct uart_port *earlycon_port;
138 static bool linflex_earlycon_same_instance;
139 static DEFINE_SPINLOCK(init_lock);
140 static bool during_init;
141
142 static struct {
143 char *content;
144 unsigned int len, cap;
145 } earlycon_buf;
146 #endif
147
linflex_stop_tx(struct uart_port * port)148 static void linflex_stop_tx(struct uart_port *port)
149 {
150 unsigned long ier;
151
152 ier = readl(port->membase + LINIER);
153 ier &= ~(LINFLEXD_LINIER_DTIE);
154 writel(ier, port->membase + LINIER);
155 }
156
linflex_stop_rx(struct uart_port * port)157 static void linflex_stop_rx(struct uart_port *port)
158 {
159 unsigned long ier;
160
161 ier = readl(port->membase + LINIER);
162 writel(ier & ~LINFLEXD_LINIER_DRIE, port->membase + LINIER);
163 }
164
linflex_transmit_buffer(struct uart_port * sport)165 static inline void linflex_transmit_buffer(struct uart_port *sport)
166 {
167 struct circ_buf *xmit = &sport->state->xmit;
168 unsigned char c;
169 unsigned long status;
170
171 while (!uart_circ_empty(xmit)) {
172 c = xmit->buf[xmit->tail];
173 writeb(c, sport->membase + BDRL);
174
175 /* Waiting for data transmission completed. */
176 while (((status = readl(sport->membase + UARTSR)) &
177 LINFLEXD_UARTSR_DTFTFF) !=
178 LINFLEXD_UARTSR_DTFTFF)
179 ;
180
181 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
182 sport->icount.tx++;
183
184 writel(status | LINFLEXD_UARTSR_DTFTFF,
185 sport->membase + UARTSR);
186 }
187
188 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
189 uart_write_wakeup(sport);
190
191 if (uart_circ_empty(xmit))
192 linflex_stop_tx(sport);
193 }
194
linflex_start_tx(struct uart_port * port)195 static void linflex_start_tx(struct uart_port *port)
196 {
197 unsigned long ier;
198
199 linflex_transmit_buffer(port);
200 ier = readl(port->membase + LINIER);
201 writel(ier | LINFLEXD_LINIER_DTIE, port->membase + LINIER);
202 }
203
linflex_txint(int irq,void * dev_id)204 static irqreturn_t linflex_txint(int irq, void *dev_id)
205 {
206 struct uart_port *sport = dev_id;
207 struct circ_buf *xmit = &sport->state->xmit;
208 unsigned long flags;
209 unsigned long status;
210
211 spin_lock_irqsave(&sport->lock, flags);
212
213 if (sport->x_char) {
214 writeb(sport->x_char, sport->membase + BDRL);
215
216 /* waiting for data transmission completed */
217 while (((status = readl(sport->membase + UARTSR)) &
218 LINFLEXD_UARTSR_DTFTFF) != LINFLEXD_UARTSR_DTFTFF)
219 ;
220
221 writel(status | LINFLEXD_UARTSR_DTFTFF,
222 sport->membase + UARTSR);
223
224 goto out;
225 }
226
227 if (uart_circ_empty(xmit) || uart_tx_stopped(sport)) {
228 linflex_stop_tx(sport);
229 goto out;
230 }
231
232 linflex_transmit_buffer(sport);
233
234 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
235 uart_write_wakeup(sport);
236
237 out:
238 spin_unlock_irqrestore(&sport->lock, flags);
239 return IRQ_HANDLED;
240 }
241
linflex_rxint(int irq,void * dev_id)242 static irqreturn_t linflex_rxint(int irq, void *dev_id)
243 {
244 struct uart_port *sport = dev_id;
245 unsigned int flg;
246 struct tty_port *port = &sport->state->port;
247 unsigned long flags, status;
248 unsigned char rx;
249 bool brk;
250
251 spin_lock_irqsave(&sport->lock, flags);
252
253 status = readl(sport->membase + UARTSR);
254 while (status & LINFLEXD_UARTSR_RMB) {
255 rx = readb(sport->membase + BDRM);
256 brk = false;
257 flg = TTY_NORMAL;
258 sport->icount.rx++;
259
260 if (status & (LINFLEXD_UARTSR_BOF | LINFLEXD_UARTSR_SZF |
261 LINFLEXD_UARTSR_FEF | LINFLEXD_UARTSR_PE)) {
262 if (status & LINFLEXD_UARTSR_SZF)
263 status |= LINFLEXD_UARTSR_SZF;
264 if (status & LINFLEXD_UARTSR_BOF)
265 status |= LINFLEXD_UARTSR_BOF;
266 if (status & LINFLEXD_UARTSR_FEF) {
267 if (!rx)
268 brk = true;
269 status |= LINFLEXD_UARTSR_FEF;
270 }
271 if (status & LINFLEXD_UARTSR_PE)
272 status |= LINFLEXD_UARTSR_PE;
273 }
274
275 writel(status | LINFLEXD_UARTSR_RMB | LINFLEXD_UARTSR_DRFRFE,
276 sport->membase + UARTSR);
277 status = readl(sport->membase + UARTSR);
278
279 if (brk) {
280 uart_handle_break(sport);
281 } else {
282 #ifdef SUPPORT_SYSRQ
283 if (uart_handle_sysrq_char(sport, (unsigned char)rx))
284 continue;
285 #endif
286 tty_insert_flip_char(port, rx, flg);
287 }
288 }
289
290 spin_unlock_irqrestore(&sport->lock, flags);
291
292 tty_flip_buffer_push(port);
293
294 return IRQ_HANDLED;
295 }
296
linflex_int(int irq,void * dev_id)297 static irqreturn_t linflex_int(int irq, void *dev_id)
298 {
299 struct uart_port *sport = dev_id;
300 unsigned long status;
301
302 status = readl(sport->membase + UARTSR);
303
304 if (status & LINFLEXD_UARTSR_DRFRFE)
305 linflex_rxint(irq, dev_id);
306 if (status & LINFLEXD_UARTSR_DTFTFF)
307 linflex_txint(irq, dev_id);
308
309 return IRQ_HANDLED;
310 }
311
312 /* return TIOCSER_TEMT when transmitter is not busy */
linflex_tx_empty(struct uart_port * port)313 static unsigned int linflex_tx_empty(struct uart_port *port)
314 {
315 unsigned long status;
316
317 status = readl(port->membase + UARTSR) & LINFLEXD_UARTSR_DTFTFF;
318
319 return status ? TIOCSER_TEMT : 0;
320 }
321
linflex_get_mctrl(struct uart_port * port)322 static unsigned int linflex_get_mctrl(struct uart_port *port)
323 {
324 return 0;
325 }
326
linflex_set_mctrl(struct uart_port * port,unsigned int mctrl)327 static void linflex_set_mctrl(struct uart_port *port, unsigned int mctrl)
328 {
329 }
330
linflex_break_ctl(struct uart_port * port,int break_state)331 static void linflex_break_ctl(struct uart_port *port, int break_state)
332 {
333 }
334
linflex_setup_watermark(struct uart_port * sport)335 static void linflex_setup_watermark(struct uart_port *sport)
336 {
337 unsigned long cr, ier, cr1;
338
339 /* Disable transmission/reception */
340 ier = readl(sport->membase + LINIER);
341 ier &= ~(LINFLEXD_LINIER_DRIE | LINFLEXD_LINIER_DTIE);
342 writel(ier, sport->membase + LINIER);
343
344 cr = readl(sport->membase + UARTCR);
345 cr &= ~(LINFLEXD_UARTCR_RXEN | LINFLEXD_UARTCR_TXEN);
346 writel(cr, sport->membase + UARTCR);
347
348 /* Enter initialization mode by setting INIT bit */
349
350 /* set the Linflex in master mode and activate by-pass filter */
351 cr1 = LINFLEXD_LINCR1_BF | LINFLEXD_LINCR1_MME
352 | LINFLEXD_LINCR1_INIT;
353 writel(cr1, sport->membase + LINCR1);
354
355 /* wait for init mode entry */
356 while ((readl(sport->membase + LINSR)
357 & LINFLEXD_LINSR_LINS_MASK)
358 != LINFLEXD_LINSR_LINS_INITMODE)
359 ;
360
361 /*
362 * UART = 0x1; - Linflex working in UART mode
363 * TXEN = 0x1; - Enable transmission of data now
364 * RXEn = 0x1; - Receiver enabled
365 * WL0 = 0x1; - 8 bit data
366 * PCE = 0x0; - No parity
367 */
368
369 /* set UART bit to allow writing other bits */
370 writel(LINFLEXD_UARTCR_UART, sport->membase + UARTCR);
371
372 cr = (LINFLEXD_UARTCR_RXEN | LINFLEXD_UARTCR_TXEN |
373 LINFLEXD_UARTCR_WL0 | LINFLEXD_UARTCR_UART);
374
375 writel(cr, sport->membase + UARTCR);
376
377 cr1 &= ~(LINFLEXD_LINCR1_INIT);
378
379 writel(cr1, sport->membase + LINCR1);
380
381 ier = readl(sport->membase + LINIER);
382 ier |= LINFLEXD_LINIER_DRIE;
383 ier |= LINFLEXD_LINIER_DTIE;
384
385 writel(ier, sport->membase + LINIER);
386 }
387
linflex_startup(struct uart_port * port)388 static int linflex_startup(struct uart_port *port)
389 {
390 int ret = 0;
391 unsigned long flags;
392
393 spin_lock_irqsave(&port->lock, flags);
394
395 linflex_setup_watermark(port);
396
397 spin_unlock_irqrestore(&port->lock, flags);
398
399 ret = devm_request_irq(port->dev, port->irq, linflex_int, 0,
400 DRIVER_NAME, port);
401
402 return ret;
403 }
404
linflex_shutdown(struct uart_port * port)405 static void linflex_shutdown(struct uart_port *port)
406 {
407 unsigned long ier;
408 unsigned long flags;
409
410 spin_lock_irqsave(&port->lock, flags);
411
412 /* disable interrupts */
413 ier = readl(port->membase + LINIER);
414 ier &= ~(LINFLEXD_LINIER_DRIE | LINFLEXD_LINIER_DTIE);
415 writel(ier, port->membase + LINIER);
416
417 spin_unlock_irqrestore(&port->lock, flags);
418
419 devm_free_irq(port->dev, port->irq, port);
420 }
421
422 static void
linflex_set_termios(struct uart_port * port,struct ktermios * termios,struct ktermios * old)423 linflex_set_termios(struct uart_port *port, struct ktermios *termios,
424 struct ktermios *old)
425 {
426 unsigned long flags;
427 unsigned long cr, old_cr, cr1;
428 unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8;
429
430 cr = readl(port->membase + UARTCR);
431 old_cr = cr;
432
433 /* Enter initialization mode by setting INIT bit */
434 cr1 = readl(port->membase + LINCR1);
435 cr1 |= LINFLEXD_LINCR1_INIT;
436 writel(cr1, port->membase + LINCR1);
437
438 /* wait for init mode entry */
439 while ((readl(port->membase + LINSR)
440 & LINFLEXD_LINSR_LINS_MASK)
441 != LINFLEXD_LINSR_LINS_INITMODE)
442 ;
443
444 /*
445 * only support CS8 and CS7, and for CS7 must enable PE.
446 * supported mode:
447 * - (7,e/o,1)
448 * - (8,n,1)
449 * - (8,e/o,1)
450 */
451 /* enter the UART into configuration mode */
452
453 while ((termios->c_cflag & CSIZE) != CS8 &&
454 (termios->c_cflag & CSIZE) != CS7) {
455 termios->c_cflag &= ~CSIZE;
456 termios->c_cflag |= old_csize;
457 old_csize = CS8;
458 }
459
460 if ((termios->c_cflag & CSIZE) == CS7) {
461 /* Word length: WL1WL0:00 */
462 cr = old_cr & ~LINFLEXD_UARTCR_WL1 & ~LINFLEXD_UARTCR_WL0;
463 }
464
465 if ((termios->c_cflag & CSIZE) == CS8) {
466 /* Word length: WL1WL0:01 */
467 cr = (old_cr | LINFLEXD_UARTCR_WL0) & ~LINFLEXD_UARTCR_WL1;
468 }
469
470 if (termios->c_cflag & CMSPAR) {
471 if ((termios->c_cflag & CSIZE) != CS8) {
472 termios->c_cflag &= ~CSIZE;
473 termios->c_cflag |= CS8;
474 }
475 /* has a space/sticky bit */
476 cr |= LINFLEXD_UARTCR_WL0;
477 }
478
479 if (termios->c_cflag & CSTOPB)
480 termios->c_cflag &= ~CSTOPB;
481
482 /* parity must be enabled when CS7 to match 8-bits format */
483 if ((termios->c_cflag & CSIZE) == CS7)
484 termios->c_cflag |= PARENB;
485
486 if ((termios->c_cflag & PARENB)) {
487 cr |= LINFLEXD_UARTCR_PCE;
488 if (termios->c_cflag & PARODD)
489 cr = (cr | LINFLEXD_UARTCR_PC0) &
490 (~LINFLEXD_UARTCR_PC1);
491 else
492 cr = cr & (~LINFLEXD_UARTCR_PC1 &
493 ~LINFLEXD_UARTCR_PC0);
494 } else {
495 cr &= ~LINFLEXD_UARTCR_PCE;
496 }
497
498 spin_lock_irqsave(&port->lock, flags);
499
500 port->read_status_mask = 0;
501
502 if (termios->c_iflag & INPCK)
503 port->read_status_mask |= (LINFLEXD_UARTSR_FEF |
504 LINFLEXD_UARTSR_PE0 |
505 LINFLEXD_UARTSR_PE1 |
506 LINFLEXD_UARTSR_PE2 |
507 LINFLEXD_UARTSR_PE3);
508 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
509 port->read_status_mask |= LINFLEXD_UARTSR_FEF;
510
511 /* characters to ignore */
512 port->ignore_status_mask = 0;
513 if (termios->c_iflag & IGNPAR)
514 port->ignore_status_mask |= LINFLEXD_UARTSR_PE;
515 if (termios->c_iflag & IGNBRK) {
516 port->ignore_status_mask |= LINFLEXD_UARTSR_PE;
517 /*
518 * if we're ignoring parity and break indicators,
519 * ignore overruns too (for real raw support).
520 */
521 if (termios->c_iflag & IGNPAR)
522 port->ignore_status_mask |= LINFLEXD_UARTSR_BOF;
523 }
524
525 writel(cr, port->membase + UARTCR);
526
527 cr1 &= ~(LINFLEXD_LINCR1_INIT);
528
529 writel(cr1, port->membase + LINCR1);
530
531 spin_unlock_irqrestore(&port->lock, flags);
532 }
533
linflex_type(struct uart_port * port)534 static const char *linflex_type(struct uart_port *port)
535 {
536 return "FSL_LINFLEX";
537 }
538
linflex_release_port(struct uart_port * port)539 static void linflex_release_port(struct uart_port *port)
540 {
541 /* nothing to do */
542 }
543
linflex_request_port(struct uart_port * port)544 static int linflex_request_port(struct uart_port *port)
545 {
546 return 0;
547 }
548
549 /* configure/auto-configure the port */
linflex_config_port(struct uart_port * port,int flags)550 static void linflex_config_port(struct uart_port *port, int flags)
551 {
552 if (flags & UART_CONFIG_TYPE)
553 port->type = PORT_LINFLEXUART;
554 }
555
556 static const struct uart_ops linflex_pops = {
557 .tx_empty = linflex_tx_empty,
558 .set_mctrl = linflex_set_mctrl,
559 .get_mctrl = linflex_get_mctrl,
560 .stop_tx = linflex_stop_tx,
561 .start_tx = linflex_start_tx,
562 .stop_rx = linflex_stop_rx,
563 .break_ctl = linflex_break_ctl,
564 .startup = linflex_startup,
565 .shutdown = linflex_shutdown,
566 .set_termios = linflex_set_termios,
567 .type = linflex_type,
568 .request_port = linflex_request_port,
569 .release_port = linflex_release_port,
570 .config_port = linflex_config_port,
571 };
572
573 static struct uart_port *linflex_ports[UART_NR];
574
575 #ifdef CONFIG_SERIAL_FSL_LINFLEXUART_CONSOLE
linflex_console_putchar(struct uart_port * port,int ch)576 static void linflex_console_putchar(struct uart_port *port, int ch)
577 {
578 unsigned long cr;
579
580 cr = readl(port->membase + UARTCR);
581
582 writeb(ch, port->membase + BDRL);
583
584 if (!(cr & LINFLEXD_UARTCR_TFBM))
585 while ((readl(port->membase + UARTSR) &
586 LINFLEXD_UARTSR_DTFTFF)
587 != LINFLEXD_UARTSR_DTFTFF)
588 ;
589 else
590 while (readl(port->membase + UARTSR) &
591 LINFLEXD_UARTSR_DTFTFF)
592 ;
593
594 if (!(cr & LINFLEXD_UARTCR_TFBM)) {
595 writel((readl(port->membase + UARTSR) |
596 LINFLEXD_UARTSR_DTFTFF),
597 port->membase + UARTSR);
598 }
599 }
600
linflex_earlycon_putchar(struct uart_port * port,int ch)601 static void linflex_earlycon_putchar(struct uart_port *port, int ch)
602 {
603 unsigned long flags;
604 char *ret;
605
606 if (!linflex_earlycon_same_instance) {
607 linflex_console_putchar(port, ch);
608 return;
609 }
610
611 spin_lock_irqsave(&init_lock, flags);
612 if (!during_init)
613 goto outside_init;
614
615 if (earlycon_buf.len >= 1 << CONFIG_LOG_BUF_SHIFT)
616 goto init_release;
617
618 if (!earlycon_buf.cap) {
619 earlycon_buf.content = kmalloc(EARLYCON_BUFFER_INITIAL_CAP,
620 GFP_ATOMIC);
621 earlycon_buf.cap = earlycon_buf.content ?
622 EARLYCON_BUFFER_INITIAL_CAP : 0;
623 } else if (earlycon_buf.len == earlycon_buf.cap) {
624 ret = krealloc(earlycon_buf.content, earlycon_buf.cap << 1,
625 GFP_ATOMIC);
626 if (ret) {
627 earlycon_buf.content = ret;
628 earlycon_buf.cap <<= 1;
629 }
630 }
631
632 if (earlycon_buf.len < earlycon_buf.cap)
633 earlycon_buf.content[earlycon_buf.len++] = ch;
634
635 goto init_release;
636
637 outside_init:
638 linflex_console_putchar(port, ch);
639 init_release:
640 spin_unlock_irqrestore(&init_lock, flags);
641 }
642
linflex_string_write(struct uart_port * sport,const char * s,unsigned int count)643 static void linflex_string_write(struct uart_port *sport, const char *s,
644 unsigned int count)
645 {
646 unsigned long cr, ier = 0;
647
648 ier = readl(sport->membase + LINIER);
649 linflex_stop_tx(sport);
650
651 cr = readl(sport->membase + UARTCR);
652 cr |= (LINFLEXD_UARTCR_TXEN);
653 writel(cr, sport->membase + UARTCR);
654
655 uart_console_write(sport, s, count, linflex_console_putchar);
656
657 writel(ier, sport->membase + LINIER);
658 }
659
660 static void
linflex_console_write(struct console * co,const char * s,unsigned int count)661 linflex_console_write(struct console *co, const char *s, unsigned int count)
662 {
663 struct uart_port *sport = linflex_ports[co->index];
664 unsigned long flags;
665 int locked = 1;
666
667 if (sport->sysrq)
668 locked = 0;
669 else if (oops_in_progress)
670 locked = spin_trylock_irqsave(&sport->lock, flags);
671 else
672 spin_lock_irqsave(&sport->lock, flags);
673
674 linflex_string_write(sport, s, count);
675
676 if (locked)
677 spin_unlock_irqrestore(&sport->lock, flags);
678 }
679
680 /*
681 * if the port was already initialised (eg, by a boot loader),
682 * try to determine the current setup.
683 */
684 static void __init
linflex_console_get_options(struct uart_port * sport,int * parity,int * bits)685 linflex_console_get_options(struct uart_port *sport, int *parity, int *bits)
686 {
687 unsigned long cr;
688
689 cr = readl(sport->membase + UARTCR);
690 cr &= LINFLEXD_UARTCR_RXEN | LINFLEXD_UARTCR_TXEN;
691
692 if (!cr)
693 return;
694
695 /* ok, the port was enabled */
696
697 *parity = 'n';
698 if (cr & LINFLEXD_UARTCR_PCE) {
699 if (cr & LINFLEXD_UARTCR_PC0)
700 *parity = 'o';
701 else
702 *parity = 'e';
703 }
704
705 if ((cr & LINFLEXD_UARTCR_WL0) && ((cr & LINFLEXD_UARTCR_WL1) == 0)) {
706 if (cr & LINFLEXD_UARTCR_PCE)
707 *bits = 9;
708 else
709 *bits = 8;
710 }
711 }
712
linflex_console_setup(struct console * co,char * options)713 static int __init linflex_console_setup(struct console *co, char *options)
714 {
715 struct uart_port *sport;
716 int baud = 115200;
717 int bits = 8;
718 int parity = 'n';
719 int flow = 'n';
720 int ret;
721 int i;
722 unsigned long flags;
723 /*
724 * check whether an invalid uart number has been specified, and
725 * if so, search for the first available port that does have
726 * console support.
727 */
728 if (co->index == -1 || co->index >= ARRAY_SIZE(linflex_ports))
729 co->index = 0;
730
731 sport = linflex_ports[co->index];
732 if (!sport)
733 return -ENODEV;
734
735 if (options)
736 uart_parse_options(options, &baud, &parity, &bits, &flow);
737 else
738 linflex_console_get_options(sport, &parity, &bits);
739
740 if (earlycon_port && sport->mapbase == earlycon_port->mapbase) {
741 linflex_earlycon_same_instance = true;
742
743 spin_lock_irqsave(&init_lock, flags);
744 during_init = true;
745 spin_unlock_irqrestore(&init_lock, flags);
746
747 /* Workaround for character loss or output of many invalid
748 * characters, when INIT mode is entered shortly after a
749 * character has just been printed.
750 */
751 udelay(PREINIT_DELAY);
752 }
753
754 linflex_setup_watermark(sport);
755
756 ret = uart_set_options(sport, co, baud, parity, bits, flow);
757
758 if (!linflex_earlycon_same_instance)
759 goto done;
760
761 spin_lock_irqsave(&init_lock, flags);
762
763 /* Emptying buffer */
764 if (earlycon_buf.len) {
765 for (i = 0; i < earlycon_buf.len; i++)
766 linflex_console_putchar(earlycon_port,
767 earlycon_buf.content[i]);
768
769 kfree(earlycon_buf.content);
770 earlycon_buf.len = 0;
771 }
772
773 during_init = false;
774 spin_unlock_irqrestore(&init_lock, flags);
775
776 done:
777 return ret;
778 }
779
780 static struct uart_driver linflex_reg;
781 static struct console linflex_console = {
782 .name = DEV_NAME,
783 .write = linflex_console_write,
784 .device = uart_console_device,
785 .setup = linflex_console_setup,
786 .flags = CON_PRINTBUFFER,
787 .index = -1,
788 .data = &linflex_reg,
789 };
790
linflex_earlycon_write(struct console * con,const char * s,unsigned int n)791 static void linflex_earlycon_write(struct console *con, const char *s,
792 unsigned int n)
793 {
794 struct earlycon_device *dev = con->data;
795
796 uart_console_write(&dev->port, s, n, linflex_earlycon_putchar);
797 }
798
linflex_early_console_setup(struct earlycon_device * device,const char * options)799 static int __init linflex_early_console_setup(struct earlycon_device *device,
800 const char *options)
801 {
802 if (!device->port.membase)
803 return -ENODEV;
804
805 device->con->write = linflex_earlycon_write;
806 earlycon_port = &device->port;
807
808 return 0;
809 }
810
811 OF_EARLYCON_DECLARE(linflex, "fsl,s32v234-linflexuart",
812 linflex_early_console_setup);
813
814 #define LINFLEX_CONSOLE (&linflex_console)
815 #else
816 #define LINFLEX_CONSOLE NULL
817 #endif
818
819 static struct uart_driver linflex_reg = {
820 .owner = THIS_MODULE,
821 .driver_name = DRIVER_NAME,
822 .dev_name = DEV_NAME,
823 .nr = ARRAY_SIZE(linflex_ports),
824 .cons = LINFLEX_CONSOLE,
825 };
826
linflex_probe(struct platform_device * pdev)827 static int linflex_probe(struct platform_device *pdev)
828 {
829 struct device_node *np = pdev->dev.of_node;
830 struct uart_port *sport;
831 struct resource *res;
832 int ret;
833
834 sport = devm_kzalloc(&pdev->dev, sizeof(*sport), GFP_KERNEL);
835 if (!sport)
836 return -ENOMEM;
837
838 ret = of_alias_get_id(np, "serial");
839 if (ret < 0) {
840 dev_err(&pdev->dev, "failed to get alias id, errno %d\n", ret);
841 return ret;
842 }
843 if (ret >= UART_NR) {
844 dev_err(&pdev->dev, "driver limited to %d serial ports\n",
845 UART_NR);
846 return -ENOMEM;
847 }
848
849 sport->line = ret;
850
851 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
852 if (!res)
853 return -ENODEV;
854
855 sport->mapbase = res->start;
856 sport->membase = devm_ioremap_resource(&pdev->dev, res);
857 if (IS_ERR(sport->membase))
858 return PTR_ERR(sport->membase);
859
860 sport->dev = &pdev->dev;
861 sport->type = PORT_LINFLEXUART;
862 sport->iotype = UPIO_MEM;
863 sport->irq = platform_get_irq(pdev, 0);
864 sport->ops = &linflex_pops;
865 sport->flags = UPF_BOOT_AUTOCONF;
866
867 linflex_ports[sport->line] = sport;
868
869 platform_set_drvdata(pdev, sport);
870
871 ret = uart_add_one_port(&linflex_reg, sport);
872 if (ret)
873 return ret;
874
875 return 0;
876 }
877
linflex_remove(struct platform_device * pdev)878 static int linflex_remove(struct platform_device *pdev)
879 {
880 struct uart_port *sport = platform_get_drvdata(pdev);
881
882 uart_remove_one_port(&linflex_reg, sport);
883
884 return 0;
885 }
886
887 #ifdef CONFIG_PM_SLEEP
linflex_suspend(struct device * dev)888 static int linflex_suspend(struct device *dev)
889 {
890 struct uart_port *sport = dev_get_drvdata(dev);
891
892 uart_suspend_port(&linflex_reg, sport);
893
894 return 0;
895 }
896
linflex_resume(struct device * dev)897 static int linflex_resume(struct device *dev)
898 {
899 struct uart_port *sport = dev_get_drvdata(dev);
900
901 uart_resume_port(&linflex_reg, sport);
902
903 return 0;
904 }
905 #endif
906
907 static SIMPLE_DEV_PM_OPS(linflex_pm_ops, linflex_suspend, linflex_resume);
908
909 static struct platform_driver linflex_driver = {
910 .probe = linflex_probe,
911 .remove = linflex_remove,
912 .driver = {
913 .name = DRIVER_NAME,
914 .of_match_table = linflex_dt_ids,
915 .pm = &linflex_pm_ops,
916 },
917 };
918
linflex_serial_init(void)919 static int __init linflex_serial_init(void)
920 {
921 int ret;
922
923 ret = uart_register_driver(&linflex_reg);
924 if (ret)
925 return ret;
926
927 ret = platform_driver_register(&linflex_driver);
928 if (ret)
929 uart_unregister_driver(&linflex_reg);
930
931 return ret;
932 }
933
linflex_serial_exit(void)934 static void __exit linflex_serial_exit(void)
935 {
936 platform_driver_unregister(&linflex_driver);
937 uart_unregister_driver(&linflex_reg);
938 }
939
940 module_init(linflex_serial_init);
941 module_exit(linflex_serial_exit);
942
943 MODULE_DESCRIPTION("Freescale linflex serial port driver");
944 MODULE_LICENSE("GPL v2");
945
