1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * ad2s1210.c support for the ADI Resolver to Digital Converters: AD2S1210
4 *
5 * Copyright (c) 2010-2010 Analog Devices Inc.
6 */
7 #include <linux/types.h>
8 #include <linux/mutex.h>
9 #include <linux/device.h>
10 #include <linux/spi/spi.h>
11 #include <linux/slab.h>
12 #include <linux/sysfs.h>
13 #include <linux/delay.h>
14 #include <linux/gpio/consumer.h>
15 #include <linux/module.h>
16
17 #include <linux/iio/iio.h>
18 #include <linux/iio/sysfs.h>
19
20 #define DRV_NAME "ad2s1210"
21
22 #define AD2S1210_DEF_CONTROL 0x7E
23
24 #define AD2S1210_MSB_IS_HIGH 0x80
25 #define AD2S1210_MSB_IS_LOW 0x7F
26 #define AD2S1210_PHASE_LOCK_RANGE_44 0x20
27 #define AD2S1210_ENABLE_HYSTERESIS 0x10
28 #define AD2S1210_SET_ENRES1 0x08
29 #define AD2S1210_SET_ENRES0 0x04
30 #define AD2S1210_SET_RES1 0x02
31 #define AD2S1210_SET_RES0 0x01
32
33 #define AD2S1210_SET_RESOLUTION (AD2S1210_SET_RES1 | AD2S1210_SET_RES0)
34
35 #define AD2S1210_REG_POSITION 0x80
36 #define AD2S1210_REG_VELOCITY 0x82
37 #define AD2S1210_REG_LOS_THRD 0x88
38 #define AD2S1210_REG_DOS_OVR_THRD 0x89
39 #define AD2S1210_REG_DOS_MIS_THRD 0x8A
40 #define AD2S1210_REG_DOS_RST_MAX_THRD 0x8B
41 #define AD2S1210_REG_DOS_RST_MIN_THRD 0x8C
42 #define AD2S1210_REG_LOT_HIGH_THRD 0x8D
43 #define AD2S1210_REG_LOT_LOW_THRD 0x8E
44 #define AD2S1210_REG_EXCIT_FREQ 0x91
45 #define AD2S1210_REG_CONTROL 0x92
46 #define AD2S1210_REG_SOFT_RESET 0xF0
47 #define AD2S1210_REG_FAULT 0xFF
48
49 #define AD2S1210_MIN_CLKIN 6144000
50 #define AD2S1210_MAX_CLKIN 10240000
51 #define AD2S1210_MIN_EXCIT 2000
52 #define AD2S1210_MAX_EXCIT 20000
53 #define AD2S1210_MIN_FCW 0x4
54 #define AD2S1210_MAX_FCW 0x50
55
56 #define AD2S1210_DEF_EXCIT 10000
57
58 enum ad2s1210_mode {
59 MOD_POS = 0,
60 MOD_VEL,
61 MOD_CONFIG,
62 MOD_RESERVED,
63 };
64
65 enum ad2s1210_gpios {
66 AD2S1210_SAMPLE,
67 AD2S1210_A0,
68 AD2S1210_A1,
69 AD2S1210_RES0,
70 AD2S1210_RES1,
71 };
72
73 struct ad2s1210_gpio {
74 const char *name;
75 unsigned long flags;
76 };
77
78 static const struct ad2s1210_gpio gpios[] = {
79 [AD2S1210_SAMPLE] = { .name = "adi,sample", .flags = GPIOD_OUT_LOW },
80 [AD2S1210_A0] = { .name = "adi,a0", .flags = GPIOD_OUT_LOW },
81 [AD2S1210_A1] = { .name = "adi,a1", .flags = GPIOD_OUT_LOW },
82 [AD2S1210_RES0] = { .name = "adi,res0", .flags = GPIOD_OUT_LOW },
83 [AD2S1210_RES1] = { .name = "adi,res1", .flags = GPIOD_OUT_LOW },
84 };
85
86 static const unsigned int ad2s1210_resolution_value[] = { 10, 12, 14, 16 };
87
88 struct ad2s1210_state {
89 struct mutex lock;
90 struct spi_device *sdev;
91 struct gpio_desc *gpios[5];
92 unsigned int fclkin;
93 unsigned int fexcit;
94 bool hysteresis;
95 u8 resolution;
96 enum ad2s1210_mode mode;
97 u8 rx[2] ____cacheline_aligned;
98 u8 tx[2] ____cacheline_aligned;
99 };
100
101 static const int ad2s1210_mode_vals[4][2] = {
102 [MOD_POS] = { 0, 0 },
103 [MOD_VEL] = { 0, 1 },
104 [MOD_CONFIG] = { 1, 0 },
105 };
106
ad2s1210_set_mode(enum ad2s1210_mode mode,struct ad2s1210_state * st)107 static inline void ad2s1210_set_mode(enum ad2s1210_mode mode,
108 struct ad2s1210_state *st)
109 {
110 gpiod_set_value(st->gpios[AD2S1210_A0], ad2s1210_mode_vals[mode][0]);
111 gpiod_set_value(st->gpios[AD2S1210_A1], ad2s1210_mode_vals[mode][1]);
112 st->mode = mode;
113 }
114
115 /* write 1 bytes (address or data) to the chip */
ad2s1210_config_write(struct ad2s1210_state * st,u8 data)116 static int ad2s1210_config_write(struct ad2s1210_state *st, u8 data)
117 {
118 int ret;
119
120 ad2s1210_set_mode(MOD_CONFIG, st);
121 st->tx[0] = data;
122 ret = spi_write(st->sdev, st->tx, 1);
123 if (ret < 0)
124 return ret;
125
126 return 0;
127 }
128
129 /* read value from one of the registers */
ad2s1210_config_read(struct ad2s1210_state * st,unsigned char address)130 static int ad2s1210_config_read(struct ad2s1210_state *st,
131 unsigned char address)
132 {
133 struct spi_transfer xfer = {
134 .len = 2,
135 .rx_buf = st->rx,
136 .tx_buf = st->tx,
137 };
138 int ret = 0;
139
140 ad2s1210_set_mode(MOD_CONFIG, st);
141 st->tx[0] = address | AD2S1210_MSB_IS_HIGH;
142 st->tx[1] = AD2S1210_REG_FAULT;
143 ret = spi_sync_transfer(st->sdev, &xfer, 1);
144 if (ret < 0)
145 return ret;
146
147 return st->rx[1];
148 }
149
150 static inline
ad2s1210_update_frequency_control_word(struct ad2s1210_state * st)151 int ad2s1210_update_frequency_control_word(struct ad2s1210_state *st)
152 {
153 int ret;
154 unsigned char fcw;
155
156 fcw = (unsigned char)(st->fexcit * (1 << 15) / st->fclkin);
157 if (fcw < AD2S1210_MIN_FCW || fcw > AD2S1210_MAX_FCW) {
158 dev_err(&st->sdev->dev, "ad2s1210: FCW out of range\n");
159 return -ERANGE;
160 }
161
162 ret = ad2s1210_config_write(st, AD2S1210_REG_EXCIT_FREQ);
163 if (ret < 0)
164 return ret;
165
166 return ad2s1210_config_write(st, fcw);
167 }
168
169 static const int ad2s1210_res_pins[4][2] = {
170 { 0, 0 }, {0, 1}, {1, 0}, {1, 1}
171 };
172
ad2s1210_set_resolution_pin(struct ad2s1210_state * st)173 static inline void ad2s1210_set_resolution_pin(struct ad2s1210_state *st)
174 {
175 gpiod_set_value(st->gpios[AD2S1210_RES0],
176 ad2s1210_res_pins[(st->resolution - 10) / 2][0]);
177 gpiod_set_value(st->gpios[AD2S1210_RES1],
178 ad2s1210_res_pins[(st->resolution - 10) / 2][1]);
179 }
180
ad2s1210_soft_reset(struct ad2s1210_state * st)181 static inline int ad2s1210_soft_reset(struct ad2s1210_state *st)
182 {
183 int ret;
184
185 ret = ad2s1210_config_write(st, AD2S1210_REG_SOFT_RESET);
186 if (ret < 0)
187 return ret;
188
189 return ad2s1210_config_write(st, 0x0);
190 }
191
ad2s1210_show_fclkin(struct device * dev,struct device_attribute * attr,char * buf)192 static ssize_t ad2s1210_show_fclkin(struct device *dev,
193 struct device_attribute *attr,
194 char *buf)
195 {
196 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
197
198 return sprintf(buf, "%u\n", st->fclkin);
199 }
200
ad2s1210_store_fclkin(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)201 static ssize_t ad2s1210_store_fclkin(struct device *dev,
202 struct device_attribute *attr,
203 const char *buf,
204 size_t len)
205 {
206 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
207 unsigned int fclkin;
208 int ret;
209
210 ret = kstrtouint(buf, 10, &fclkin);
211 if (ret)
212 return ret;
213 if (fclkin < AD2S1210_MIN_CLKIN || fclkin > AD2S1210_MAX_CLKIN) {
214 dev_err(dev, "ad2s1210: fclkin out of range\n");
215 return -EINVAL;
216 }
217
218 mutex_lock(&st->lock);
219 st->fclkin = fclkin;
220
221 ret = ad2s1210_update_frequency_control_word(st);
222 if (ret < 0)
223 goto error_ret;
224 ret = ad2s1210_soft_reset(st);
225 error_ret:
226 mutex_unlock(&st->lock);
227
228 return ret < 0 ? ret : len;
229 }
230
ad2s1210_show_fexcit(struct device * dev,struct device_attribute * attr,char * buf)231 static ssize_t ad2s1210_show_fexcit(struct device *dev,
232 struct device_attribute *attr,
233 char *buf)
234 {
235 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
236
237 return sprintf(buf, "%u\n", st->fexcit);
238 }
239
ad2s1210_store_fexcit(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)240 static ssize_t ad2s1210_store_fexcit(struct device *dev,
241 struct device_attribute *attr,
242 const char *buf, size_t len)
243 {
244 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
245 unsigned int fexcit;
246 int ret;
247
248 ret = kstrtouint(buf, 10, &fexcit);
249 if (ret < 0)
250 return ret;
251 if (fexcit < AD2S1210_MIN_EXCIT || fexcit > AD2S1210_MAX_EXCIT) {
252 dev_err(dev,
253 "ad2s1210: excitation frequency out of range\n");
254 return -EINVAL;
255 }
256 mutex_lock(&st->lock);
257 st->fexcit = fexcit;
258 ret = ad2s1210_update_frequency_control_word(st);
259 if (ret < 0)
260 goto error_ret;
261 ret = ad2s1210_soft_reset(st);
262 error_ret:
263 mutex_unlock(&st->lock);
264
265 return ret < 0 ? ret : len;
266 }
267
ad2s1210_show_control(struct device * dev,struct device_attribute * attr,char * buf)268 static ssize_t ad2s1210_show_control(struct device *dev,
269 struct device_attribute *attr,
270 char *buf)
271 {
272 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
273 int ret;
274
275 mutex_lock(&st->lock);
276 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
277 mutex_unlock(&st->lock);
278 return ret < 0 ? ret : sprintf(buf, "0x%x\n", ret);
279 }
280
ad2s1210_store_control(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)281 static ssize_t ad2s1210_store_control(struct device *dev,
282 struct device_attribute *attr,
283 const char *buf, size_t len)
284 {
285 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
286 unsigned char udata;
287 unsigned char data;
288 int ret;
289
290 ret = kstrtou8(buf, 16, &udata);
291 if (ret)
292 return -EINVAL;
293
294 mutex_lock(&st->lock);
295 ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL);
296 if (ret < 0)
297 goto error_ret;
298 data = udata & AD2S1210_MSB_IS_LOW;
299 ret = ad2s1210_config_write(st, data);
300 if (ret < 0)
301 goto error_ret;
302
303 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
304 if (ret < 0)
305 goto error_ret;
306 if (ret & AD2S1210_MSB_IS_HIGH) {
307 ret = -EIO;
308 dev_err(dev,
309 "ad2s1210: write control register fail\n");
310 goto error_ret;
311 }
312 st->resolution =
313 ad2s1210_resolution_value[data & AD2S1210_SET_RESOLUTION];
314 ad2s1210_set_resolution_pin(st);
315 ret = len;
316 st->hysteresis = !!(data & AD2S1210_ENABLE_HYSTERESIS);
317
318 error_ret:
319 mutex_unlock(&st->lock);
320 return ret;
321 }
322
ad2s1210_show_resolution(struct device * dev,struct device_attribute * attr,char * buf)323 static ssize_t ad2s1210_show_resolution(struct device *dev,
324 struct device_attribute *attr,
325 char *buf)
326 {
327 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
328
329 return sprintf(buf, "%d\n", st->resolution);
330 }
331
ad2s1210_store_resolution(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)332 static ssize_t ad2s1210_store_resolution(struct device *dev,
333 struct device_attribute *attr,
334 const char *buf, size_t len)
335 {
336 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
337 unsigned char data;
338 unsigned char udata;
339 int ret;
340
341 ret = kstrtou8(buf, 10, &udata);
342 if (ret || udata < 10 || udata > 16) {
343 dev_err(dev, "ad2s1210: resolution out of range\n");
344 return -EINVAL;
345 }
346 mutex_lock(&st->lock);
347 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
348 if (ret < 0)
349 goto error_ret;
350 data = ret;
351 data &= ~AD2S1210_SET_RESOLUTION;
352 data |= (udata - 10) >> 1;
353 ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL);
354 if (ret < 0)
355 goto error_ret;
356 ret = ad2s1210_config_write(st, data & AD2S1210_MSB_IS_LOW);
357 if (ret < 0)
358 goto error_ret;
359 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
360 if (ret < 0)
361 goto error_ret;
362 data = ret;
363 if (data & AD2S1210_MSB_IS_HIGH) {
364 ret = -EIO;
365 dev_err(dev, "ad2s1210: setting resolution fail\n");
366 goto error_ret;
367 }
368 st->resolution =
369 ad2s1210_resolution_value[data & AD2S1210_SET_RESOLUTION];
370 ad2s1210_set_resolution_pin(st);
371 ret = len;
372 error_ret:
373 mutex_unlock(&st->lock);
374 return ret;
375 }
376
377 /* read the fault register since last sample */
ad2s1210_show_fault(struct device * dev,struct device_attribute * attr,char * buf)378 static ssize_t ad2s1210_show_fault(struct device *dev,
379 struct device_attribute *attr, char *buf)
380 {
381 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
382 int ret;
383
384 mutex_lock(&st->lock);
385 ret = ad2s1210_config_read(st, AD2S1210_REG_FAULT);
386 mutex_unlock(&st->lock);
387
388 return ret ? ret : sprintf(buf, "0x%x\n", ret);
389 }
390
ad2s1210_clear_fault(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)391 static ssize_t ad2s1210_clear_fault(struct device *dev,
392 struct device_attribute *attr,
393 const char *buf,
394 size_t len)
395 {
396 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
397 int ret;
398
399 mutex_lock(&st->lock);
400 gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 0);
401 /* delay (2 * tck + 20) nano seconds */
402 udelay(1);
403 gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 1);
404 ret = ad2s1210_config_read(st, AD2S1210_REG_FAULT);
405 if (ret < 0)
406 goto error_ret;
407 gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 0);
408 gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 1);
409 error_ret:
410 mutex_unlock(&st->lock);
411
412 return ret < 0 ? ret : len;
413 }
414
ad2s1210_show_reg(struct device * dev,struct device_attribute * attr,char * buf)415 static ssize_t ad2s1210_show_reg(struct device *dev,
416 struct device_attribute *attr,
417 char *buf)
418 {
419 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
420 struct iio_dev_attr *iattr = to_iio_dev_attr(attr);
421 int ret;
422
423 mutex_lock(&st->lock);
424 ret = ad2s1210_config_read(st, iattr->address);
425 mutex_unlock(&st->lock);
426
427 return ret < 0 ? ret : sprintf(buf, "%d\n", ret);
428 }
429
ad2s1210_store_reg(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)430 static ssize_t ad2s1210_store_reg(struct device *dev,
431 struct device_attribute *attr,
432 const char *buf, size_t len)
433 {
434 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
435 unsigned char data;
436 int ret;
437 struct iio_dev_attr *iattr = to_iio_dev_attr(attr);
438
439 ret = kstrtou8(buf, 10, &data);
440 if (ret)
441 return -EINVAL;
442 mutex_lock(&st->lock);
443 ret = ad2s1210_config_write(st, iattr->address);
444 if (ret < 0)
445 goto error_ret;
446 ret = ad2s1210_config_write(st, data & AD2S1210_MSB_IS_LOW);
447 error_ret:
448 mutex_unlock(&st->lock);
449 return ret < 0 ? ret : len;
450 }
451
ad2s1210_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long m)452 static int ad2s1210_read_raw(struct iio_dev *indio_dev,
453 struct iio_chan_spec const *chan,
454 int *val,
455 int *val2,
456 long m)
457 {
458 struct ad2s1210_state *st = iio_priv(indio_dev);
459 u16 negative;
460 int ret = 0;
461 u16 pos;
462 s16 vel;
463
464 mutex_lock(&st->lock);
465 gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 0);
466 /* delay (6 * tck + 20) nano seconds */
467 udelay(1);
468
469 switch (chan->type) {
470 case IIO_ANGL:
471 ad2s1210_set_mode(MOD_POS, st);
472 break;
473 case IIO_ANGL_VEL:
474 ad2s1210_set_mode(MOD_VEL, st);
475 break;
476 default:
477 ret = -EINVAL;
478 break;
479 }
480 if (ret < 0)
481 goto error_ret;
482 ret = spi_read(st->sdev, st->rx, 2);
483 if (ret < 0)
484 goto error_ret;
485
486 switch (chan->type) {
487 case IIO_ANGL:
488 pos = be16_to_cpup((__be16 *)st->rx);
489 if (st->hysteresis)
490 pos >>= 16 - st->resolution;
491 *val = pos;
492 ret = IIO_VAL_INT;
493 break;
494 case IIO_ANGL_VEL:
495 negative = st->rx[0] & 0x80;
496 vel = be16_to_cpup((__be16 *)st->rx);
497 vel >>= 16 - st->resolution;
498 if (vel & 0x8000) {
499 negative = (0xffff >> st->resolution) << st->resolution;
500 vel |= negative;
501 }
502 *val = vel;
503 ret = IIO_VAL_INT;
504 break;
505 default:
506 mutex_unlock(&st->lock);
507 return -EINVAL;
508 }
509
510 error_ret:
511 gpiod_set_value(st->gpios[AD2S1210_SAMPLE], 1);
512 /* delay (2 * tck + 20) nano seconds */
513 udelay(1);
514 mutex_unlock(&st->lock);
515 return ret;
516 }
517
518 static IIO_DEVICE_ATTR(fclkin, 0644,
519 ad2s1210_show_fclkin, ad2s1210_store_fclkin, 0);
520 static IIO_DEVICE_ATTR(fexcit, 0644,
521 ad2s1210_show_fexcit, ad2s1210_store_fexcit, 0);
522 static IIO_DEVICE_ATTR(control, 0644,
523 ad2s1210_show_control, ad2s1210_store_control, 0);
524 static IIO_DEVICE_ATTR(bits, 0644,
525 ad2s1210_show_resolution, ad2s1210_store_resolution, 0);
526 static IIO_DEVICE_ATTR(fault, 0644,
527 ad2s1210_show_fault, ad2s1210_clear_fault, 0);
528
529 static IIO_DEVICE_ATTR(los_thrd, 0644,
530 ad2s1210_show_reg, ad2s1210_store_reg,
531 AD2S1210_REG_LOS_THRD);
532 static IIO_DEVICE_ATTR(dos_ovr_thrd, 0644,
533 ad2s1210_show_reg, ad2s1210_store_reg,
534 AD2S1210_REG_DOS_OVR_THRD);
535 static IIO_DEVICE_ATTR(dos_mis_thrd, 0644,
536 ad2s1210_show_reg, ad2s1210_store_reg,
537 AD2S1210_REG_DOS_MIS_THRD);
538 static IIO_DEVICE_ATTR(dos_rst_max_thrd, 0644,
539 ad2s1210_show_reg, ad2s1210_store_reg,
540 AD2S1210_REG_DOS_RST_MAX_THRD);
541 static IIO_DEVICE_ATTR(dos_rst_min_thrd, 0644,
542 ad2s1210_show_reg, ad2s1210_store_reg,
543 AD2S1210_REG_DOS_RST_MIN_THRD);
544 static IIO_DEVICE_ATTR(lot_high_thrd, 0644,
545 ad2s1210_show_reg, ad2s1210_store_reg,
546 AD2S1210_REG_LOT_HIGH_THRD);
547 static IIO_DEVICE_ATTR(lot_low_thrd, 0644,
548 ad2s1210_show_reg, ad2s1210_store_reg,
549 AD2S1210_REG_LOT_LOW_THRD);
550
551 static const struct iio_chan_spec ad2s1210_channels[] = {
552 {
553 .type = IIO_ANGL,
554 .indexed = 1,
555 .channel = 0,
556 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
557 }, {
558 .type = IIO_ANGL_VEL,
559 .indexed = 1,
560 .channel = 0,
561 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
562 }
563 };
564
565 static struct attribute *ad2s1210_attributes[] = {
566 &iio_dev_attr_fclkin.dev_attr.attr,
567 &iio_dev_attr_fexcit.dev_attr.attr,
568 &iio_dev_attr_control.dev_attr.attr,
569 &iio_dev_attr_bits.dev_attr.attr,
570 &iio_dev_attr_fault.dev_attr.attr,
571 &iio_dev_attr_los_thrd.dev_attr.attr,
572 &iio_dev_attr_dos_ovr_thrd.dev_attr.attr,
573 &iio_dev_attr_dos_mis_thrd.dev_attr.attr,
574 &iio_dev_attr_dos_rst_max_thrd.dev_attr.attr,
575 &iio_dev_attr_dos_rst_min_thrd.dev_attr.attr,
576 &iio_dev_attr_lot_high_thrd.dev_attr.attr,
577 &iio_dev_attr_lot_low_thrd.dev_attr.attr,
578 NULL,
579 };
580
581 static const struct attribute_group ad2s1210_attribute_group = {
582 .attrs = ad2s1210_attributes,
583 };
584
ad2s1210_initial(struct ad2s1210_state * st)585 static int ad2s1210_initial(struct ad2s1210_state *st)
586 {
587 unsigned char data;
588 int ret;
589
590 mutex_lock(&st->lock);
591 ad2s1210_set_resolution_pin(st);
592
593 ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL);
594 if (ret < 0)
595 goto error_ret;
596 data = AD2S1210_DEF_CONTROL & ~(AD2S1210_SET_RESOLUTION);
597 data |= (st->resolution - 10) >> 1;
598 ret = ad2s1210_config_write(st, data);
599 if (ret < 0)
600 goto error_ret;
601 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
602 if (ret < 0)
603 goto error_ret;
604
605 if (ret & AD2S1210_MSB_IS_HIGH) {
606 ret = -EIO;
607 goto error_ret;
608 }
609
610 ret = ad2s1210_update_frequency_control_word(st);
611 if (ret < 0)
612 goto error_ret;
613 ret = ad2s1210_soft_reset(st);
614 error_ret:
615 mutex_unlock(&st->lock);
616 return ret;
617 }
618
619 static const struct iio_info ad2s1210_info = {
620 .read_raw = ad2s1210_read_raw,
621 .attrs = &ad2s1210_attribute_group,
622 };
623
ad2s1210_setup_gpios(struct ad2s1210_state * st)624 static int ad2s1210_setup_gpios(struct ad2s1210_state *st)
625 {
626 struct spi_device *spi = st->sdev;
627 int i, ret;
628
629 for (i = 0; i < ARRAY_SIZE(gpios); i++) {
630 st->gpios[i] = devm_gpiod_get(&spi->dev, gpios[i].name,
631 gpios[i].flags);
632 if (IS_ERR(st->gpios[i])) {
633 ret = PTR_ERR(st->gpios[i]);
634 dev_err(&spi->dev,
635 "ad2s1210: failed to request %s GPIO: %d\n",
636 gpios[i].name, ret);
637 return ret;
638 }
639 }
640
641 return 0;
642 }
643
ad2s1210_probe(struct spi_device * spi)644 static int ad2s1210_probe(struct spi_device *spi)
645 {
646 struct iio_dev *indio_dev;
647 struct ad2s1210_state *st;
648 int ret;
649
650 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
651 if (!indio_dev)
652 return -ENOMEM;
653 st = iio_priv(indio_dev);
654 ret = ad2s1210_setup_gpios(st);
655 if (ret < 0)
656 return ret;
657
658 spi_set_drvdata(spi, indio_dev);
659
660 mutex_init(&st->lock);
661 st->sdev = spi;
662 st->hysteresis = true;
663 st->mode = MOD_CONFIG;
664 st->resolution = 12;
665 st->fexcit = AD2S1210_DEF_EXCIT;
666
667 indio_dev->dev.parent = &spi->dev;
668 indio_dev->info = &ad2s1210_info;
669 indio_dev->modes = INDIO_DIRECT_MODE;
670 indio_dev->channels = ad2s1210_channels;
671 indio_dev->num_channels = ARRAY_SIZE(ad2s1210_channels);
672 indio_dev->name = spi_get_device_id(spi)->name;
673
674 ret = devm_iio_device_register(&spi->dev, indio_dev);
675 if (ret)
676 return ret;
677
678 st->fclkin = spi->max_speed_hz;
679 spi->mode = SPI_MODE_3;
680 spi_setup(spi);
681 ad2s1210_initial(st);
682
683 return 0;
684 }
685
686 static const struct of_device_id ad2s1210_of_match[] = {
687 { .compatible = "adi,ad2s1210", },
688 { }
689 };
690 MODULE_DEVICE_TABLE(of, ad2s1210_of_match);
691
692 static const struct spi_device_id ad2s1210_id[] = {
693 { "ad2s1210" },
694 {}
695 };
696 MODULE_DEVICE_TABLE(spi, ad2s1210_id);
697
698 static struct spi_driver ad2s1210_driver = {
699 .driver = {
700 .name = DRV_NAME,
701 .of_match_table = of_match_ptr(ad2s1210_of_match),
702 },
703 .probe = ad2s1210_probe,
704 .id_table = ad2s1210_id,
705 };
706 module_spi_driver(ad2s1210_driver);
707
708 MODULE_AUTHOR("Graff Yang <graff.yang@gmail.com>");
709 MODULE_DESCRIPTION("Analog Devices AD2S1210 Resolver to Digital SPI driver");
710 MODULE_LICENSE("GPL v2");
711
