1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * AD7150 capacitive sensor driver supporting AD7150/1/6
4 *
5 * Copyright 2010-2011 Analog Devices Inc.
6 */
7
8 #include <linux/bitfield.h>
9 #include <linux/interrupt.h>
10 #include <linux/device.h>
11 #include <linux/kernel.h>
12 #include <linux/slab.h>
13 #include <linux/i2c.h>
14 #include <linux/module.h>
15
16 #include <linux/iio/iio.h>
17 #include <linux/iio/sysfs.h>
18 #include <linux/iio/events.h>
19 /*
20 * AD7150 registers definition
21 */
22
23 #define AD7150_STATUS 0
24 #define AD7150_STATUS_OUT1 BIT(3)
25 #define AD7150_STATUS_OUT2 BIT(5)
26 #define AD7150_CH1_DATA_HIGH 1
27 #define AD7150_CH2_DATA_HIGH 3
28 #define AD7150_CH1_AVG_HIGH 5
29 #define AD7150_CH2_AVG_HIGH 7
30 #define AD7150_CH1_SENSITIVITY 9
31 #define AD7150_CH1_THR_HOLD_H 9
32 #define AD7150_CH1_TIMEOUT 10
33 #define AD7150_CH1_SETUP 11
34 #define AD7150_CH2_SENSITIVITY 12
35 #define AD7150_CH2_THR_HOLD_H 12
36 #define AD7150_CH2_TIMEOUT 13
37 #define AD7150_CH2_SETUP 14
38 #define AD7150_CFG 15
39 #define AD7150_CFG_FIX BIT(7)
40 #define AD7150_PD_TIMER 16
41 #define AD7150_CH1_CAPDAC 17
42 #define AD7150_CH2_CAPDAC 18
43 #define AD7150_SN3 19
44 #define AD7150_SN2 20
45 #define AD7150_SN1 21
46 #define AD7150_SN0 22
47 #define AD7150_ID 23
48
49 /* AD7150 masks */
50 #define AD7150_THRESHTYPE_MSK GENMASK(6, 5)
51
52 /**
53 * struct ad7150_chip_info - instance specific chip data
54 * @client: i2c client for this device
55 * @current_event: device always has one type of event enabled.
56 * This element stores the event code of the current one.
57 * @threshold: thresholds for simple capacitance value events
58 * @thresh_sensitivity: threshold for simple capacitance offset
59 * from 'average' value.
60 * @mag_sensitity: threshold for magnitude of capacitance offset from
61 * from 'average' value.
62 * @thresh_timeout: a timeout, in samples from the moment an
63 * adaptive threshold event occurs to when the average
64 * value jumps to current value.
65 * @mag_timeout: a timeout, in sample from the moment an
66 * adaptive magnitude event occurs to when the average
67 * value jumps to the current value.
68 * @old_state: store state from previous event, allowing confirmation
69 * of new condition.
70 * @conversion_mode: the current conversion mode.
71 * @state_lock: ensure consistent state of this structure wrt the
72 * hardware.
73 */
74 struct ad7150_chip_info {
75 struct i2c_client *client;
76 u64 current_event;
77 u16 threshold[2][2];
78 u8 thresh_sensitivity[2][2];
79 u8 mag_sensitivity[2][2];
80 u8 thresh_timeout[2][2];
81 u8 mag_timeout[2][2];
82 int old_state;
83 char *conversion_mode;
84 struct mutex state_lock;
85 };
86
87 /*
88 * sysfs nodes
89 */
90
91 static const u8 ad7150_addresses[][6] = {
92 { AD7150_CH1_DATA_HIGH, AD7150_CH1_AVG_HIGH,
93 AD7150_CH1_SETUP, AD7150_CH1_THR_HOLD_H,
94 AD7150_CH1_SENSITIVITY, AD7150_CH1_TIMEOUT },
95 { AD7150_CH2_DATA_HIGH, AD7150_CH2_AVG_HIGH,
96 AD7150_CH2_SETUP, AD7150_CH2_THR_HOLD_H,
97 AD7150_CH2_SENSITIVITY, AD7150_CH2_TIMEOUT },
98 };
99
ad7150_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)100 static int ad7150_read_raw(struct iio_dev *indio_dev,
101 struct iio_chan_spec const *chan,
102 int *val,
103 int *val2,
104 long mask)
105 {
106 int ret;
107 struct ad7150_chip_info *chip = iio_priv(indio_dev);
108 int channel = chan->channel;
109
110 switch (mask) {
111 case IIO_CHAN_INFO_RAW:
112 ret = i2c_smbus_read_word_data(chip->client,
113 ad7150_addresses[channel][0]);
114 if (ret < 0)
115 return ret;
116 *val = swab16(ret);
117 return IIO_VAL_INT;
118 case IIO_CHAN_INFO_AVERAGE_RAW:
119 ret = i2c_smbus_read_word_data(chip->client,
120 ad7150_addresses[channel][1]);
121 if (ret < 0)
122 return ret;
123 *val = swab16(ret);
124 return IIO_VAL_INT;
125 default:
126 return -EINVAL;
127 }
128 }
129
ad7150_read_event_config(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir)130 static int ad7150_read_event_config(struct iio_dev *indio_dev,
131 const struct iio_chan_spec *chan,
132 enum iio_event_type type,
133 enum iio_event_direction dir)
134 {
135 int ret;
136 u8 threshtype;
137 bool thrfixed;
138 struct ad7150_chip_info *chip = iio_priv(indio_dev);
139
140 ret = i2c_smbus_read_byte_data(chip->client, AD7150_CFG);
141 if (ret < 0)
142 return ret;
143
144 threshtype = FIELD_GET(AD7150_THRESHTYPE_MSK, ret);
145
146 /*check if threshold mode is fixed or adaptive*/
147 thrfixed = FIELD_GET(AD7150_CFG_FIX, ret);
148
149 switch (type) {
150 case IIO_EV_TYPE_MAG_ADAPTIVE:
151 if (dir == IIO_EV_DIR_RISING)
152 return !thrfixed && (threshtype == 0x1);
153 return !thrfixed && (threshtype == 0x0);
154 case IIO_EV_TYPE_THRESH_ADAPTIVE:
155 if (dir == IIO_EV_DIR_RISING)
156 return !thrfixed && (threshtype == 0x3);
157 return !thrfixed && (threshtype == 0x2);
158 case IIO_EV_TYPE_THRESH:
159 if (dir == IIO_EV_DIR_RISING)
160 return thrfixed && (threshtype == 0x1);
161 return thrfixed && (threshtype == 0x0);
162 default:
163 break;
164 }
165 return -EINVAL;
166 }
167
168 /* state_lock should be held to ensure consistent state*/
169
ad7150_write_event_params(struct iio_dev * indio_dev,unsigned int chan,enum iio_event_type type,enum iio_event_direction dir)170 static int ad7150_write_event_params(struct iio_dev *indio_dev,
171 unsigned int chan,
172 enum iio_event_type type,
173 enum iio_event_direction dir)
174 {
175 int ret;
176 u16 value;
177 u8 sens, timeout;
178 struct ad7150_chip_info *chip = iio_priv(indio_dev);
179 int rising = (dir == IIO_EV_DIR_RISING);
180 u64 event_code;
181
182 event_code = IIO_UNMOD_EVENT_CODE(IIO_CAPACITANCE, chan, type, dir);
183
184 if (event_code != chip->current_event)
185 return 0;
186
187 switch (type) {
188 /* Note completely different from the adaptive versions */
189 case IIO_EV_TYPE_THRESH:
190 value = chip->threshold[rising][chan];
191 return i2c_smbus_write_word_data(chip->client,
192 ad7150_addresses[chan][3],
193 swab16(value));
194 case IIO_EV_TYPE_MAG_ADAPTIVE:
195 sens = chip->mag_sensitivity[rising][chan];
196 timeout = chip->mag_timeout[rising][chan];
197 break;
198 case IIO_EV_TYPE_THRESH_ADAPTIVE:
199 sens = chip->thresh_sensitivity[rising][chan];
200 timeout = chip->thresh_timeout[rising][chan];
201 break;
202 default:
203 return -EINVAL;
204 }
205 ret = i2c_smbus_write_byte_data(chip->client,
206 ad7150_addresses[chan][4],
207 sens);
208 if (ret)
209 return ret;
210 return i2c_smbus_write_byte_data(chip->client,
211 ad7150_addresses[chan][5],
212 timeout);
213 }
214
ad7150_write_event_config(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,int state)215 static int ad7150_write_event_config(struct iio_dev *indio_dev,
216 const struct iio_chan_spec *chan,
217 enum iio_event_type type,
218 enum iio_event_direction dir, int state)
219 {
220 u8 thresh_type, cfg, adaptive;
221 int ret;
222 struct ad7150_chip_info *chip = iio_priv(indio_dev);
223 int rising = (dir == IIO_EV_DIR_RISING);
224 u64 event_code;
225
226 /* Something must always be turned on */
227 if (!state)
228 return -EINVAL;
229
230 event_code = IIO_UNMOD_EVENT_CODE(chan->type, chan->channel, type, dir);
231 if (event_code == chip->current_event)
232 return 0;
233 mutex_lock(&chip->state_lock);
234 ret = i2c_smbus_read_byte_data(chip->client, AD7150_CFG);
235 if (ret < 0)
236 goto error_ret;
237
238 cfg = ret & ~((0x03 << 5) | BIT(7));
239
240 switch (type) {
241 case IIO_EV_TYPE_MAG_ADAPTIVE:
242 adaptive = 1;
243 if (rising)
244 thresh_type = 0x1;
245 else
246 thresh_type = 0x0;
247 break;
248 case IIO_EV_TYPE_THRESH_ADAPTIVE:
249 adaptive = 1;
250 if (rising)
251 thresh_type = 0x3;
252 else
253 thresh_type = 0x2;
254 break;
255 case IIO_EV_TYPE_THRESH:
256 adaptive = 0;
257 if (rising)
258 thresh_type = 0x1;
259 else
260 thresh_type = 0x0;
261 break;
262 default:
263 ret = -EINVAL;
264 goto error_ret;
265 }
266
267 cfg |= (!adaptive << 7) | (thresh_type << 5);
268
269 ret = i2c_smbus_write_byte_data(chip->client, AD7150_CFG, cfg);
270 if (ret < 0)
271 goto error_ret;
272
273 chip->current_event = event_code;
274
275 /* update control attributes */
276 ret = ad7150_write_event_params(indio_dev, chan->channel, type, dir);
277 error_ret:
278 mutex_unlock(&chip->state_lock);
279
280 return ret;
281 }
282
ad7150_read_event_value(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int * val,int * val2)283 static int ad7150_read_event_value(struct iio_dev *indio_dev,
284 const struct iio_chan_spec *chan,
285 enum iio_event_type type,
286 enum iio_event_direction dir,
287 enum iio_event_info info,
288 int *val, int *val2)
289 {
290 struct ad7150_chip_info *chip = iio_priv(indio_dev);
291 int rising = (dir == IIO_EV_DIR_RISING);
292
293 /* Complex register sharing going on here */
294 switch (type) {
295 case IIO_EV_TYPE_MAG_ADAPTIVE:
296 *val = chip->mag_sensitivity[rising][chan->channel];
297 return IIO_VAL_INT;
298 case IIO_EV_TYPE_THRESH_ADAPTIVE:
299 *val = chip->thresh_sensitivity[rising][chan->channel];
300 return IIO_VAL_INT;
301 case IIO_EV_TYPE_THRESH:
302 *val = chip->threshold[rising][chan->channel];
303 return IIO_VAL_INT;
304 default:
305 return -EINVAL;
306 }
307 }
308
ad7150_write_event_value(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int val,int val2)309 static int ad7150_write_event_value(struct iio_dev *indio_dev,
310 const struct iio_chan_spec *chan,
311 enum iio_event_type type,
312 enum iio_event_direction dir,
313 enum iio_event_info info,
314 int val, int val2)
315 {
316 int ret;
317 struct ad7150_chip_info *chip = iio_priv(indio_dev);
318 int rising = (dir == IIO_EV_DIR_RISING);
319
320 mutex_lock(&chip->state_lock);
321 switch (type) {
322 case IIO_EV_TYPE_MAG_ADAPTIVE:
323 chip->mag_sensitivity[rising][chan->channel] = val;
324 break;
325 case IIO_EV_TYPE_THRESH_ADAPTIVE:
326 chip->thresh_sensitivity[rising][chan->channel] = val;
327 break;
328 case IIO_EV_TYPE_THRESH:
329 chip->threshold[rising][chan->channel] = val;
330 break;
331 default:
332 ret = -EINVAL;
333 goto error_ret;
334 }
335
336 /* write back if active */
337 ret = ad7150_write_event_params(indio_dev, chan->channel, type, dir);
338
339 error_ret:
340 mutex_unlock(&chip->state_lock);
341 return ret;
342 }
343
ad7150_show_timeout(struct device * dev,struct device_attribute * attr,char * buf)344 static ssize_t ad7150_show_timeout(struct device *dev,
345 struct device_attribute *attr,
346 char *buf)
347 {
348 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
349 struct ad7150_chip_info *chip = iio_priv(indio_dev);
350 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
351 u8 value;
352
353 /* use the event code for consistency reasons */
354 int chan = IIO_EVENT_CODE_EXTRACT_CHAN(this_attr->address);
355 int rising = (IIO_EVENT_CODE_EXTRACT_DIR(this_attr->address)
356 == IIO_EV_DIR_RISING) ? 1 : 0;
357
358 switch (IIO_EVENT_CODE_EXTRACT_TYPE(this_attr->address)) {
359 case IIO_EV_TYPE_MAG_ADAPTIVE:
360 value = chip->mag_timeout[rising][chan];
361 break;
362 case IIO_EV_TYPE_THRESH_ADAPTIVE:
363 value = chip->thresh_timeout[rising][chan];
364 break;
365 default:
366 return -EINVAL;
367 }
368
369 return sprintf(buf, "%d\n", value);
370 }
371
ad7150_store_timeout(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)372 static ssize_t ad7150_store_timeout(struct device *dev,
373 struct device_attribute *attr,
374 const char *buf,
375 size_t len)
376 {
377 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
378 struct ad7150_chip_info *chip = iio_priv(indio_dev);
379 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
380 int chan = IIO_EVENT_CODE_EXTRACT_CHAN(this_attr->address);
381 enum iio_event_direction dir;
382 enum iio_event_type type;
383 int rising;
384 u8 data;
385 int ret;
386
387 type = IIO_EVENT_CODE_EXTRACT_TYPE(this_attr->address);
388 dir = IIO_EVENT_CODE_EXTRACT_DIR(this_attr->address);
389 rising = (dir == IIO_EV_DIR_RISING);
390
391 ret = kstrtou8(buf, 10, &data);
392 if (ret < 0)
393 return ret;
394
395 mutex_lock(&chip->state_lock);
396 switch (type) {
397 case IIO_EV_TYPE_MAG_ADAPTIVE:
398 chip->mag_timeout[rising][chan] = data;
399 break;
400 case IIO_EV_TYPE_THRESH_ADAPTIVE:
401 chip->thresh_timeout[rising][chan] = data;
402 break;
403 default:
404 ret = -EINVAL;
405 goto error_ret;
406 }
407
408 ret = ad7150_write_event_params(indio_dev, chan, type, dir);
409 error_ret:
410 mutex_unlock(&chip->state_lock);
411
412 if (ret < 0)
413 return ret;
414
415 return len;
416 }
417
418 #define AD7150_TIMEOUT(chan, type, dir, ev_type, ev_dir) \
419 IIO_DEVICE_ATTR(in_capacitance##chan##_##type##_##dir##_timeout, \
420 0644, \
421 &ad7150_show_timeout, \
422 &ad7150_store_timeout, \
423 IIO_UNMOD_EVENT_CODE(IIO_CAPACITANCE, \
424 chan, \
425 IIO_EV_TYPE_##ev_type, \
426 IIO_EV_DIR_##ev_dir))
427 static AD7150_TIMEOUT(0, mag_adaptive, rising, MAG_ADAPTIVE, RISING);
428 static AD7150_TIMEOUT(0, mag_adaptive, falling, MAG_ADAPTIVE, FALLING);
429 static AD7150_TIMEOUT(1, mag_adaptive, rising, MAG_ADAPTIVE, RISING);
430 static AD7150_TIMEOUT(1, mag_adaptive, falling, MAG_ADAPTIVE, FALLING);
431 static AD7150_TIMEOUT(0, thresh_adaptive, rising, THRESH_ADAPTIVE, RISING);
432 static AD7150_TIMEOUT(0, thresh_adaptive, falling, THRESH_ADAPTIVE, FALLING);
433 static AD7150_TIMEOUT(1, thresh_adaptive, rising, THRESH_ADAPTIVE, RISING);
434 static AD7150_TIMEOUT(1, thresh_adaptive, falling, THRESH_ADAPTIVE, FALLING);
435
436 static const struct iio_event_spec ad7150_events[] = {
437 {
438 .type = IIO_EV_TYPE_THRESH,
439 .dir = IIO_EV_DIR_RISING,
440 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
441 BIT(IIO_EV_INFO_ENABLE),
442 }, {
443 .type = IIO_EV_TYPE_THRESH,
444 .dir = IIO_EV_DIR_FALLING,
445 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
446 BIT(IIO_EV_INFO_ENABLE),
447 }, {
448 .type = IIO_EV_TYPE_THRESH_ADAPTIVE,
449 .dir = IIO_EV_DIR_RISING,
450 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
451 BIT(IIO_EV_INFO_ENABLE),
452 }, {
453 .type = IIO_EV_TYPE_THRESH_ADAPTIVE,
454 .dir = IIO_EV_DIR_FALLING,
455 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
456 BIT(IIO_EV_INFO_ENABLE),
457 }, {
458 .type = IIO_EV_TYPE_MAG_ADAPTIVE,
459 .dir = IIO_EV_DIR_RISING,
460 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
461 BIT(IIO_EV_INFO_ENABLE),
462 }, {
463 .type = IIO_EV_TYPE_MAG_ADAPTIVE,
464 .dir = IIO_EV_DIR_FALLING,
465 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
466 BIT(IIO_EV_INFO_ENABLE),
467 },
468 };
469
470 #define AD7150_CAPACITANCE_CHAN(_chan) { \
471 .type = IIO_CAPACITANCE, \
472 .indexed = 1, \
473 .channel = _chan, \
474 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
475 BIT(IIO_CHAN_INFO_AVERAGE_RAW), \
476 .event_spec = ad7150_events, \
477 .num_event_specs = ARRAY_SIZE(ad7150_events), \
478 }
479
480 static const struct iio_chan_spec ad7150_channels[] = {
481 AD7150_CAPACITANCE_CHAN(0),
482 AD7150_CAPACITANCE_CHAN(1)
483 };
484
ad7150_event_handler(int irq,void * private)485 static irqreturn_t ad7150_event_handler(int irq, void *private)
486 {
487 struct iio_dev *indio_dev = private;
488 struct ad7150_chip_info *chip = iio_priv(indio_dev);
489 u8 int_status;
490 s64 timestamp = iio_get_time_ns(indio_dev);
491 int ret;
492
493 ret = i2c_smbus_read_byte_data(chip->client, AD7150_STATUS);
494 if (ret < 0)
495 return IRQ_HANDLED;
496
497 int_status = ret;
498
499 if ((int_status & AD7150_STATUS_OUT1) &&
500 !(chip->old_state & AD7150_STATUS_OUT1))
501 iio_push_event(indio_dev,
502 IIO_UNMOD_EVENT_CODE(IIO_CAPACITANCE,
503 0,
504 IIO_EV_TYPE_THRESH,
505 IIO_EV_DIR_RISING),
506 timestamp);
507 else if ((!(int_status & AD7150_STATUS_OUT1)) &&
508 (chip->old_state & AD7150_STATUS_OUT1))
509 iio_push_event(indio_dev,
510 IIO_UNMOD_EVENT_CODE(IIO_CAPACITANCE,
511 0,
512 IIO_EV_TYPE_THRESH,
513 IIO_EV_DIR_FALLING),
514 timestamp);
515
516 if ((int_status & AD7150_STATUS_OUT2) &&
517 !(chip->old_state & AD7150_STATUS_OUT2))
518 iio_push_event(indio_dev,
519 IIO_UNMOD_EVENT_CODE(IIO_CAPACITANCE,
520 1,
521 IIO_EV_TYPE_THRESH,
522 IIO_EV_DIR_RISING),
523 timestamp);
524 else if ((!(int_status & AD7150_STATUS_OUT2)) &&
525 (chip->old_state & AD7150_STATUS_OUT2))
526 iio_push_event(indio_dev,
527 IIO_UNMOD_EVENT_CODE(IIO_CAPACITANCE,
528 1,
529 IIO_EV_TYPE_THRESH,
530 IIO_EV_DIR_FALLING),
531 timestamp);
532 /* store the status to avoid repushing same events */
533 chip->old_state = int_status;
534
535 return IRQ_HANDLED;
536 }
537
538 /* Timeouts not currently handled by core */
539 static struct attribute *ad7150_event_attributes[] = {
540 &iio_dev_attr_in_capacitance0_mag_adaptive_rising_timeout
541 .dev_attr.attr,
542 &iio_dev_attr_in_capacitance0_mag_adaptive_falling_timeout
543 .dev_attr.attr,
544 &iio_dev_attr_in_capacitance1_mag_adaptive_rising_timeout
545 .dev_attr.attr,
546 &iio_dev_attr_in_capacitance1_mag_adaptive_falling_timeout
547 .dev_attr.attr,
548 &iio_dev_attr_in_capacitance0_thresh_adaptive_rising_timeout
549 .dev_attr.attr,
550 &iio_dev_attr_in_capacitance0_thresh_adaptive_falling_timeout
551 .dev_attr.attr,
552 &iio_dev_attr_in_capacitance1_thresh_adaptive_rising_timeout
553 .dev_attr.attr,
554 &iio_dev_attr_in_capacitance1_thresh_adaptive_falling_timeout
555 .dev_attr.attr,
556 NULL,
557 };
558
559 static const struct attribute_group ad7150_event_attribute_group = {
560 .attrs = ad7150_event_attributes,
561 .name = "events",
562 };
563
564 static const struct iio_info ad7150_info = {
565 .event_attrs = &ad7150_event_attribute_group,
566 .read_raw = &ad7150_read_raw,
567 .read_event_config = &ad7150_read_event_config,
568 .write_event_config = &ad7150_write_event_config,
569 .read_event_value = &ad7150_read_event_value,
570 .write_event_value = &ad7150_write_event_value,
571 };
572
ad7150_probe(struct i2c_client * client,const struct i2c_device_id * id)573 static int ad7150_probe(struct i2c_client *client,
574 const struct i2c_device_id *id)
575 {
576 int ret;
577 struct ad7150_chip_info *chip;
578 struct iio_dev *indio_dev;
579
580 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*chip));
581 if (!indio_dev)
582 return -ENOMEM;
583 chip = iio_priv(indio_dev);
584 mutex_init(&chip->state_lock);
585 /* this is only used for device removal purposes */
586 i2c_set_clientdata(client, indio_dev);
587
588 chip->client = client;
589
590 indio_dev->name = id->name;
591 indio_dev->channels = ad7150_channels;
592 indio_dev->num_channels = ARRAY_SIZE(ad7150_channels);
593 /* Establish that the iio_dev is a child of the i2c device */
594 indio_dev->dev.parent = &client->dev;
595
596 indio_dev->info = &ad7150_info;
597
598 indio_dev->modes = INDIO_DIRECT_MODE;
599
600 if (client->irq) {
601 ret = devm_request_threaded_irq(&client->dev, client->irq,
602 NULL,
603 &ad7150_event_handler,
604 IRQF_TRIGGER_RISING |
605 IRQF_TRIGGER_FALLING |
606 IRQF_ONESHOT,
607 "ad7150_irq1",
608 indio_dev);
609 if (ret)
610 return ret;
611 }
612
613 if (client->dev.platform_data) {
614 ret = devm_request_threaded_irq(&client->dev, *(unsigned int *)
615 client->dev.platform_data,
616 NULL,
617 &ad7150_event_handler,
618 IRQF_TRIGGER_RISING |
619 IRQF_TRIGGER_FALLING |
620 IRQF_ONESHOT,
621 "ad7150_irq2",
622 indio_dev);
623 if (ret)
624 return ret;
625 }
626
627 ret = devm_iio_device_register(indio_dev->dev.parent, indio_dev);
628 if (ret)
629 return ret;
630
631 dev_info(&client->dev, "%s capacitive sensor registered,irq: %d\n",
632 id->name, client->irq);
633
634 return 0;
635 }
636
637 static const struct i2c_device_id ad7150_id[] = {
638 { "ad7150", 0 },
639 { "ad7151", 0 },
640 { "ad7156", 0 },
641 {}
642 };
643
644 MODULE_DEVICE_TABLE(i2c, ad7150_id);
645
646 static struct i2c_driver ad7150_driver = {
647 .driver = {
648 .name = "ad7150",
649 },
650 .probe = ad7150_probe,
651 .id_table = ad7150_id,
652 };
653 module_i2c_driver(ad7150_driver);
654
655 MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
656 MODULE_DESCRIPTION("Analog Devices AD7150/1/6 capacitive sensor driver");
657 MODULE_LICENSE("GPL v2");
658
