1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * An I2C and SPI driver for the NXP PCF2127/29 RTC
4  * Copyright 2013 Til-Technologies
5  *
6  * Author: Renaud Cerrato <r.cerrato@til-technologies.fr>
7  *
8  * Watchdog and tamper functions
9  * Author: Bruno Thomsen <bruno.thomsen@gmail.com>
10  *
11  * based on the other drivers in this same directory.
12  *
13  * Datasheet: http://cache.nxp.com/documents/data_sheet/PCF2127.pdf
14  */
15 
16 #include <linux/i2c.h>
17 #include <linux/spi/spi.h>
18 #include <linux/bcd.h>
19 #include <linux/rtc.h>
20 #include <linux/slab.h>
21 #include <linux/module.h>
22 #include <linux/of.h>
23 #include <linux/regmap.h>
24 #include <linux/watchdog.h>
25 
26 /* Control register 1 */
27 #define PCF2127_REG_CTRL1		0x00
28 #define PCF2127_BIT_CTRL1_TSF1			BIT(4)
29 /* Control register 2 */
30 #define PCF2127_REG_CTRL2		0x01
31 #define PCF2127_BIT_CTRL2_TSIE			BIT(2)
32 #define PCF2127_BIT_CTRL2_TSF2			BIT(5)
33 /* Control register 3 */
34 #define PCF2127_REG_CTRL3		0x02
35 #define PCF2127_BIT_CTRL3_BLIE			BIT(0)
36 #define PCF2127_BIT_CTRL3_BIE			BIT(1)
37 #define PCF2127_BIT_CTRL3_BLF			BIT(2)
38 #define PCF2127_BIT_CTRL3_BF			BIT(3)
39 #define PCF2127_BIT_CTRL3_BTSE			BIT(4)
40 /* Time and date registers */
41 #define PCF2127_REG_SC			0x03
42 #define PCF2127_BIT_SC_OSF			BIT(7)
43 #define PCF2127_REG_MN			0x04
44 #define PCF2127_REG_HR			0x05
45 #define PCF2127_REG_DM			0x06
46 #define PCF2127_REG_DW			0x07
47 #define PCF2127_REG_MO			0x08
48 #define PCF2127_REG_YR			0x09
49 /* Watchdog registers */
50 #define PCF2127_REG_WD_CTL		0x10
51 #define PCF2127_BIT_WD_CTL_TF0			BIT(0)
52 #define PCF2127_BIT_WD_CTL_TF1			BIT(1)
53 #define PCF2127_BIT_WD_CTL_CD0			BIT(6)
54 #define PCF2127_BIT_WD_CTL_CD1			BIT(7)
55 #define PCF2127_REG_WD_VAL		0x11
56 /* Tamper timestamp registers */
57 #define PCF2127_REG_TS_CTRL		0x12
58 #define PCF2127_BIT_TS_CTRL_TSOFF		BIT(6)
59 #define PCF2127_BIT_TS_CTRL_TSM			BIT(7)
60 #define PCF2127_REG_TS_SC		0x13
61 #define PCF2127_REG_TS_MN		0x14
62 #define PCF2127_REG_TS_HR		0x15
63 #define PCF2127_REG_TS_DM		0x16
64 #define PCF2127_REG_TS_MO		0x17
65 #define PCF2127_REG_TS_YR		0x18
66 /*
67  * RAM registers
68  * PCF2127 has 512 bytes general-purpose static RAM (SRAM) that is
69  * battery backed and can survive a power outage.
70  * PCF2129 doesn't have this feature.
71  */
72 #define PCF2127_REG_RAM_ADDR_MSB	0x1A
73 #define PCF2127_REG_RAM_WRT_CMD		0x1C
74 #define PCF2127_REG_RAM_RD_CMD		0x1D
75 
76 /* Watchdog timer value constants */
77 #define PCF2127_WD_VAL_STOP		0
78 #define PCF2127_WD_VAL_MIN		2
79 #define PCF2127_WD_VAL_MAX		255
80 #define PCF2127_WD_VAL_DEFAULT		60
81 
82 struct pcf2127 {
83 	struct rtc_device *rtc;
84 	struct watchdog_device wdd;
85 	struct regmap *regmap;
86 };
87 
88 /*
89  * In the routines that deal directly with the pcf2127 hardware, we use
90  * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch.
91  */
pcf2127_rtc_read_time(struct device * dev,struct rtc_time * tm)92 static int pcf2127_rtc_read_time(struct device *dev, struct rtc_time *tm)
93 {
94 	struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
95 	unsigned char buf[10];
96 	int ret;
97 
98 	/*
99 	 * Avoid reading CTRL2 register as it causes WD_VAL register
100 	 * value to reset to 0 which means watchdog is stopped.
101 	 */
102 	ret = regmap_bulk_read(pcf2127->regmap, PCF2127_REG_CTRL3,
103 			       (buf + PCF2127_REG_CTRL3),
104 			       ARRAY_SIZE(buf) - PCF2127_REG_CTRL3);
105 	if (ret) {
106 		dev_err(dev, "%s: read error\n", __func__);
107 		return ret;
108 	}
109 
110 	if (buf[PCF2127_REG_CTRL3] & PCF2127_BIT_CTRL3_BLF)
111 		dev_info(dev,
112 			"low voltage detected, check/replace RTC battery.\n");
113 
114 	/* Clock integrity is not guaranteed when OSF flag is set. */
115 	if (buf[PCF2127_REG_SC] & PCF2127_BIT_SC_OSF) {
116 		/*
117 		 * no need clear the flag here,
118 		 * it will be cleared once the new date is saved
119 		 */
120 		dev_warn(dev,
121 			 "oscillator stop detected, date/time is not reliable\n");
122 		return -EINVAL;
123 	}
124 
125 	dev_dbg(dev,
126 		"%s: raw data is cr3=%02x, sec=%02x, min=%02x, hr=%02x, "
127 		"mday=%02x, wday=%02x, mon=%02x, year=%02x\n",
128 		__func__, buf[PCF2127_REG_CTRL3], buf[PCF2127_REG_SC],
129 		buf[PCF2127_REG_MN], buf[PCF2127_REG_HR],
130 		buf[PCF2127_REG_DM], buf[PCF2127_REG_DW],
131 		buf[PCF2127_REG_MO], buf[PCF2127_REG_YR]);
132 
133 	tm->tm_sec = bcd2bin(buf[PCF2127_REG_SC] & 0x7F);
134 	tm->tm_min = bcd2bin(buf[PCF2127_REG_MN] & 0x7F);
135 	tm->tm_hour = bcd2bin(buf[PCF2127_REG_HR] & 0x3F); /* rtc hr 0-23 */
136 	tm->tm_mday = bcd2bin(buf[PCF2127_REG_DM] & 0x3F);
137 	tm->tm_wday = buf[PCF2127_REG_DW] & 0x07;
138 	tm->tm_mon = bcd2bin(buf[PCF2127_REG_MO] & 0x1F) - 1; /* rtc mn 1-12 */
139 	tm->tm_year = bcd2bin(buf[PCF2127_REG_YR]);
140 	if (tm->tm_year < 70)
141 		tm->tm_year += 100;	/* assume we are in 1970...2069 */
142 
143 	dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
144 		"mday=%d, mon=%d, year=%d, wday=%d\n",
145 		__func__,
146 		tm->tm_sec, tm->tm_min, tm->tm_hour,
147 		tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
148 
149 	return 0;
150 }
151 
pcf2127_rtc_set_time(struct device * dev,struct rtc_time * tm)152 static int pcf2127_rtc_set_time(struct device *dev, struct rtc_time *tm)
153 {
154 	struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
155 	unsigned char buf[7];
156 	int i = 0, err;
157 
158 	dev_dbg(dev, "%s: secs=%d, mins=%d, hours=%d, "
159 		"mday=%d, mon=%d, year=%d, wday=%d\n",
160 		__func__,
161 		tm->tm_sec, tm->tm_min, tm->tm_hour,
162 		tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
163 
164 	/* hours, minutes and seconds */
165 	buf[i++] = bin2bcd(tm->tm_sec);	/* this will also clear OSF flag */
166 	buf[i++] = bin2bcd(tm->tm_min);
167 	buf[i++] = bin2bcd(tm->tm_hour);
168 	buf[i++] = bin2bcd(tm->tm_mday);
169 	buf[i++] = tm->tm_wday & 0x07;
170 
171 	/* month, 1 - 12 */
172 	buf[i++] = bin2bcd(tm->tm_mon + 1);
173 
174 	/* year */
175 	buf[i++] = bin2bcd(tm->tm_year % 100);
176 
177 	/* write register's data */
178 	err = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_SC, buf, i);
179 	if (err) {
180 		dev_err(dev,
181 			"%s: err=%d", __func__, err);
182 		return err;
183 	}
184 
185 	return 0;
186 }
187 
188 #ifdef CONFIG_RTC_INTF_DEV
pcf2127_rtc_ioctl(struct device * dev,unsigned int cmd,unsigned long arg)189 static int pcf2127_rtc_ioctl(struct device *dev,
190 				unsigned int cmd, unsigned long arg)
191 {
192 	struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
193 	int touser;
194 	int ret;
195 
196 	switch (cmd) {
197 	case RTC_VL_READ:
198 		ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL3, &touser);
199 		if (ret)
200 			return ret;
201 
202 		touser = touser & PCF2127_BIT_CTRL3_BLF ? 1 : 0;
203 
204 		if (copy_to_user((void __user *)arg, &touser, sizeof(int)))
205 			return -EFAULT;
206 		return 0;
207 	default:
208 		return -ENOIOCTLCMD;
209 	}
210 }
211 #else
212 #define pcf2127_rtc_ioctl NULL
213 #endif
214 
215 static const struct rtc_class_ops pcf2127_rtc_ops = {
216 	.ioctl		= pcf2127_rtc_ioctl,
217 	.read_time	= pcf2127_rtc_read_time,
218 	.set_time	= pcf2127_rtc_set_time,
219 };
220 
pcf2127_nvmem_read(void * priv,unsigned int offset,void * val,size_t bytes)221 static int pcf2127_nvmem_read(void *priv, unsigned int offset,
222 			      void *val, size_t bytes)
223 {
224 	struct pcf2127 *pcf2127 = priv;
225 	int ret;
226 	unsigned char offsetbuf[] = { offset >> 8, offset };
227 
228 	ret = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_RAM_ADDR_MSB,
229 				offsetbuf, 2);
230 	if (ret)
231 		return ret;
232 
233 	ret = regmap_bulk_read(pcf2127->regmap, PCF2127_REG_RAM_RD_CMD,
234 			       val, bytes);
235 
236 	return ret ?: bytes;
237 }
238 
pcf2127_nvmem_write(void * priv,unsigned int offset,void * val,size_t bytes)239 static int pcf2127_nvmem_write(void *priv, unsigned int offset,
240 			       void *val, size_t bytes)
241 {
242 	struct pcf2127 *pcf2127 = priv;
243 	int ret;
244 	unsigned char offsetbuf[] = { offset >> 8, offset };
245 
246 	ret = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_RAM_ADDR_MSB,
247 				offsetbuf, 2);
248 	if (ret)
249 		return ret;
250 
251 	ret = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_RAM_WRT_CMD,
252 				val, bytes);
253 
254 	return ret ?: bytes;
255 }
256 
257 /* watchdog driver */
258 
pcf2127_wdt_ping(struct watchdog_device * wdd)259 static int pcf2127_wdt_ping(struct watchdog_device *wdd)
260 {
261 	struct pcf2127 *pcf2127 = watchdog_get_drvdata(wdd);
262 
263 	return regmap_write(pcf2127->regmap, PCF2127_REG_WD_VAL, wdd->timeout);
264 }
265 
266 /*
267  * Restart watchdog timer if feature is active.
268  *
269  * Note: Reading CTRL2 register causes watchdog to stop which is unfortunate,
270  * since register also contain control/status flags for other features.
271  * Always call this function after reading CTRL2 register.
272  */
pcf2127_wdt_active_ping(struct watchdog_device * wdd)273 static int pcf2127_wdt_active_ping(struct watchdog_device *wdd)
274 {
275 	int ret = 0;
276 
277 	if (watchdog_active(wdd)) {
278 		ret = pcf2127_wdt_ping(wdd);
279 		if (ret)
280 			dev_err(wdd->parent,
281 				"%s: watchdog restart failed, ret=%d\n",
282 				__func__, ret);
283 	}
284 
285 	return ret;
286 }
287 
pcf2127_wdt_start(struct watchdog_device * wdd)288 static int pcf2127_wdt_start(struct watchdog_device *wdd)
289 {
290 	return pcf2127_wdt_ping(wdd);
291 }
292 
pcf2127_wdt_stop(struct watchdog_device * wdd)293 static int pcf2127_wdt_stop(struct watchdog_device *wdd)
294 {
295 	struct pcf2127 *pcf2127 = watchdog_get_drvdata(wdd);
296 
297 	return regmap_write(pcf2127->regmap, PCF2127_REG_WD_VAL,
298 			    PCF2127_WD_VAL_STOP);
299 }
300 
pcf2127_wdt_set_timeout(struct watchdog_device * wdd,unsigned int new_timeout)301 static int pcf2127_wdt_set_timeout(struct watchdog_device *wdd,
302 				   unsigned int new_timeout)
303 {
304 	dev_dbg(wdd->parent, "new watchdog timeout: %is (old: %is)\n",
305 		new_timeout, wdd->timeout);
306 
307 	wdd->timeout = new_timeout;
308 
309 	return pcf2127_wdt_active_ping(wdd);
310 }
311 
312 static const struct watchdog_info pcf2127_wdt_info = {
313 	.identity = "NXP PCF2127/PCF2129 Watchdog",
314 	.options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT,
315 };
316 
317 static const struct watchdog_ops pcf2127_watchdog_ops = {
318 	.owner = THIS_MODULE,
319 	.start = pcf2127_wdt_start,
320 	.stop = pcf2127_wdt_stop,
321 	.ping = pcf2127_wdt_ping,
322 	.set_timeout = pcf2127_wdt_set_timeout,
323 };
324 
325 /* sysfs interface */
326 
timestamp0_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)327 static ssize_t timestamp0_store(struct device *dev,
328 				struct device_attribute *attr,
329 				const char *buf, size_t count)
330 {
331 	struct pcf2127 *pcf2127 = dev_get_drvdata(dev->parent);
332 	int ret;
333 
334 	ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL1,
335 				 PCF2127_BIT_CTRL1_TSF1, 0);
336 	if (ret) {
337 		dev_err(dev, "%s: update ctrl1 ret=%d\n", __func__, ret);
338 		return ret;
339 	}
340 
341 	ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL2,
342 				 PCF2127_BIT_CTRL2_TSF2, 0);
343 	if (ret) {
344 		dev_err(dev, "%s: update ctrl2 ret=%d\n", __func__, ret);
345 		return ret;
346 	}
347 
348 	ret = pcf2127_wdt_active_ping(&pcf2127->wdd);
349 	if (ret)
350 		return ret;
351 
352 	return count;
353 };
354 
timestamp0_show(struct device * dev,struct device_attribute * attr,char * buf)355 static ssize_t timestamp0_show(struct device *dev,
356 			       struct device_attribute *attr, char *buf)
357 {
358 	struct pcf2127 *pcf2127 = dev_get_drvdata(dev->parent);
359 	struct rtc_time tm;
360 	int ret;
361 	unsigned char data[25];
362 
363 	ret = regmap_bulk_read(pcf2127->regmap, PCF2127_REG_CTRL1, data,
364 			       sizeof(data));
365 	if (ret) {
366 		dev_err(dev, "%s: read error ret=%d\n", __func__, ret);
367 		return ret;
368 	}
369 
370 	dev_dbg(dev,
371 		"%s: raw data is cr1=%02x, cr2=%02x, cr3=%02x, ts_sc=%02x, "
372 		"ts_mn=%02x, ts_hr=%02x, ts_dm=%02x, ts_mo=%02x, ts_yr=%02x\n",
373 		__func__, data[PCF2127_REG_CTRL1], data[PCF2127_REG_CTRL2],
374 		data[PCF2127_REG_CTRL3], data[PCF2127_REG_TS_SC],
375 		data[PCF2127_REG_TS_MN], data[PCF2127_REG_TS_HR],
376 		data[PCF2127_REG_TS_DM], data[PCF2127_REG_TS_MO],
377 		data[PCF2127_REG_TS_YR]);
378 
379 	ret = pcf2127_wdt_active_ping(&pcf2127->wdd);
380 	if (ret)
381 		return ret;
382 
383 	if (!(data[PCF2127_REG_CTRL1] & PCF2127_BIT_CTRL1_TSF1) &&
384 	    !(data[PCF2127_REG_CTRL2] & PCF2127_BIT_CTRL2_TSF2))
385 		return 0;
386 
387 	tm.tm_sec = bcd2bin(data[PCF2127_REG_TS_SC] & 0x7F);
388 	tm.tm_min = bcd2bin(data[PCF2127_REG_TS_MN] & 0x7F);
389 	tm.tm_hour = bcd2bin(data[PCF2127_REG_TS_HR] & 0x3F);
390 	tm.tm_mday = bcd2bin(data[PCF2127_REG_TS_DM] & 0x3F);
391 	/* TS_MO register (month) value range: 1-12 */
392 	tm.tm_mon = bcd2bin(data[PCF2127_REG_TS_MO] & 0x1F) - 1;
393 	tm.tm_year = bcd2bin(data[PCF2127_REG_TS_YR]);
394 	if (tm.tm_year < 70)
395 		tm.tm_year += 100; /* assume we are in 1970...2069 */
396 
397 	ret = rtc_valid_tm(&tm);
398 	if (ret)
399 		return ret;
400 
401 	return sprintf(buf, "%llu\n",
402 		       (unsigned long long)rtc_tm_to_time64(&tm));
403 };
404 
405 static DEVICE_ATTR_RW(timestamp0);
406 
407 static struct attribute *pcf2127_attrs[] = {
408 	&dev_attr_timestamp0.attr,
409 	NULL
410 };
411 
412 static const struct attribute_group pcf2127_attr_group = {
413 	.attrs	= pcf2127_attrs,
414 };
415 
pcf2127_probe(struct device * dev,struct regmap * regmap,const char * name,bool has_nvmem)416 static int pcf2127_probe(struct device *dev, struct regmap *regmap,
417 			const char *name, bool has_nvmem)
418 {
419 	struct pcf2127 *pcf2127;
420 	int ret = 0;
421 
422 	dev_dbg(dev, "%s\n", __func__);
423 
424 	pcf2127 = devm_kzalloc(dev, sizeof(*pcf2127), GFP_KERNEL);
425 	if (!pcf2127)
426 		return -ENOMEM;
427 
428 	pcf2127->regmap = regmap;
429 
430 	dev_set_drvdata(dev, pcf2127);
431 
432 	pcf2127->rtc = devm_rtc_allocate_device(dev);
433 	if (IS_ERR(pcf2127->rtc))
434 		return PTR_ERR(pcf2127->rtc);
435 
436 	pcf2127->rtc->ops = &pcf2127_rtc_ops;
437 
438 	pcf2127->wdd.parent = dev;
439 	pcf2127->wdd.info = &pcf2127_wdt_info;
440 	pcf2127->wdd.ops = &pcf2127_watchdog_ops;
441 	pcf2127->wdd.min_timeout = PCF2127_WD_VAL_MIN;
442 	pcf2127->wdd.max_timeout = PCF2127_WD_VAL_MAX;
443 	pcf2127->wdd.timeout = PCF2127_WD_VAL_DEFAULT;
444 	pcf2127->wdd.min_hw_heartbeat_ms = 500;
445 
446 	watchdog_set_drvdata(&pcf2127->wdd, pcf2127);
447 
448 	if (has_nvmem) {
449 		struct nvmem_config nvmem_cfg = {
450 			.priv = pcf2127,
451 			.reg_read = pcf2127_nvmem_read,
452 			.reg_write = pcf2127_nvmem_write,
453 			.size = 512,
454 		};
455 
456 		ret = rtc_nvmem_register(pcf2127->rtc, &nvmem_cfg);
457 	}
458 
459 	/*
460 	 * Watchdog timer enabled and reset pin /RST activated when timed out.
461 	 * Select 1Hz clock source for watchdog timer.
462 	 * Timer is not started until WD_VAL is loaded with a valid value.
463 	 * Note: Countdown timer disabled and not available.
464 	 */
465 	ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_WD_CTL,
466 				 PCF2127_BIT_WD_CTL_CD1 |
467 				 PCF2127_BIT_WD_CTL_CD0 |
468 				 PCF2127_BIT_WD_CTL_TF1 |
469 				 PCF2127_BIT_WD_CTL_TF0,
470 				 PCF2127_BIT_WD_CTL_CD1 |
471 				 PCF2127_BIT_WD_CTL_CD0 |
472 				 PCF2127_BIT_WD_CTL_TF1);
473 	if (ret) {
474 		dev_err(dev, "%s: watchdog config (wd_ctl) failed\n", __func__);
475 		return ret;
476 	}
477 
478 #ifdef CONFIG_WATCHDOG
479 	ret = devm_watchdog_register_device(dev, &pcf2127->wdd);
480 	if (ret)
481 		return ret;
482 #endif /* CONFIG_WATCHDOG */
483 
484 	/*
485 	 * Disable battery low/switch-over timestamp and interrupts.
486 	 * Clear battery interrupt flags which can block new trigger events.
487 	 * Note: This is the default chip behaviour but added to ensure
488 	 * correct tamper timestamp and interrupt function.
489 	 */
490 	ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL3,
491 				 PCF2127_BIT_CTRL3_BTSE |
492 				 PCF2127_BIT_CTRL3_BF |
493 				 PCF2127_BIT_CTRL3_BIE |
494 				 PCF2127_BIT_CTRL3_BLIE, 0);
495 	if (ret) {
496 		dev_err(dev, "%s: interrupt config (ctrl3) failed\n",
497 			__func__);
498 		return ret;
499 	}
500 
501 	/*
502 	 * Enable timestamp function and store timestamp of first trigger
503 	 * event until TSF1 and TFS2 interrupt flags are cleared.
504 	 */
505 	ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_TS_CTRL,
506 				 PCF2127_BIT_TS_CTRL_TSOFF |
507 				 PCF2127_BIT_TS_CTRL_TSM,
508 				 PCF2127_BIT_TS_CTRL_TSM);
509 	if (ret) {
510 		dev_err(dev, "%s: tamper detection config (ts_ctrl) failed\n",
511 			__func__);
512 		return ret;
513 	}
514 
515 	/*
516 	 * Enable interrupt generation when TSF1 or TSF2 timestamp flags
517 	 * are set. Interrupt signal is an open-drain output and can be
518 	 * left floating if unused.
519 	 */
520 	ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL2,
521 				 PCF2127_BIT_CTRL2_TSIE,
522 				 PCF2127_BIT_CTRL2_TSIE);
523 	if (ret) {
524 		dev_err(dev, "%s: tamper detection config (ctrl2) failed\n",
525 			__func__);
526 		return ret;
527 	}
528 
529 	ret = rtc_add_group(pcf2127->rtc, &pcf2127_attr_group);
530 	if (ret) {
531 		dev_err(dev, "%s: tamper sysfs registering failed\n",
532 			__func__);
533 		return ret;
534 	}
535 
536 	return rtc_register_device(pcf2127->rtc);
537 }
538 
539 #ifdef CONFIG_OF
540 static const struct of_device_id pcf2127_of_match[] = {
541 	{ .compatible = "nxp,pcf2127" },
542 	{ .compatible = "nxp,pcf2129" },
543 	{}
544 };
545 MODULE_DEVICE_TABLE(of, pcf2127_of_match);
546 #endif
547 
548 #if IS_ENABLED(CONFIG_I2C)
549 
pcf2127_i2c_write(void * context,const void * data,size_t count)550 static int pcf2127_i2c_write(void *context, const void *data, size_t count)
551 {
552 	struct device *dev = context;
553 	struct i2c_client *client = to_i2c_client(dev);
554 	int ret;
555 
556 	ret = i2c_master_send(client, data, count);
557 	if (ret != count)
558 		return ret < 0 ? ret : -EIO;
559 
560 	return 0;
561 }
562 
pcf2127_i2c_gather_write(void * context,const void * reg,size_t reg_size,const void * val,size_t val_size)563 static int pcf2127_i2c_gather_write(void *context,
564 				const void *reg, size_t reg_size,
565 				const void *val, size_t val_size)
566 {
567 	struct device *dev = context;
568 	struct i2c_client *client = to_i2c_client(dev);
569 	int ret;
570 	void *buf;
571 
572 	if (WARN_ON(reg_size != 1))
573 		return -EINVAL;
574 
575 	buf = kmalloc(val_size + 1, GFP_KERNEL);
576 	if (!buf)
577 		return -ENOMEM;
578 
579 	memcpy(buf, reg, 1);
580 	memcpy(buf + 1, val, val_size);
581 
582 	ret = i2c_master_send(client, buf, val_size + 1);
583 
584 	kfree(buf);
585 
586 	if (ret != val_size + 1)
587 		return ret < 0 ? ret : -EIO;
588 
589 	return 0;
590 }
591 
pcf2127_i2c_read(void * context,const void * reg,size_t reg_size,void * val,size_t val_size)592 static int pcf2127_i2c_read(void *context, const void *reg, size_t reg_size,
593 				void *val, size_t val_size)
594 {
595 	struct device *dev = context;
596 	struct i2c_client *client = to_i2c_client(dev);
597 	int ret;
598 
599 	if (WARN_ON(reg_size != 1))
600 		return -EINVAL;
601 
602 	ret = i2c_master_send(client, reg, 1);
603 	if (ret != 1)
604 		return ret < 0 ? ret : -EIO;
605 
606 	ret = i2c_master_recv(client, val, val_size);
607 	if (ret != val_size)
608 		return ret < 0 ? ret : -EIO;
609 
610 	return 0;
611 }
612 
613 /*
614  * The reason we need this custom regmap_bus instead of using regmap_init_i2c()
615  * is that the STOP condition is required between set register address and
616  * read register data when reading from registers.
617  */
618 static const struct regmap_bus pcf2127_i2c_regmap = {
619 	.write = pcf2127_i2c_write,
620 	.gather_write = pcf2127_i2c_gather_write,
621 	.read = pcf2127_i2c_read,
622 };
623 
624 static struct i2c_driver pcf2127_i2c_driver;
625 
pcf2127_i2c_probe(struct i2c_client * client,const struct i2c_device_id * id)626 static int pcf2127_i2c_probe(struct i2c_client *client,
627 				const struct i2c_device_id *id)
628 {
629 	struct regmap *regmap;
630 	static const struct regmap_config config = {
631 		.reg_bits = 8,
632 		.val_bits = 8,
633 	};
634 
635 	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
636 		return -ENODEV;
637 
638 	regmap = devm_regmap_init(&client->dev, &pcf2127_i2c_regmap,
639 					&client->dev, &config);
640 	if (IS_ERR(regmap)) {
641 		dev_err(&client->dev, "%s: regmap allocation failed: %ld\n",
642 			__func__, PTR_ERR(regmap));
643 		return PTR_ERR(regmap);
644 	}
645 
646 	return pcf2127_probe(&client->dev, regmap,
647 			     pcf2127_i2c_driver.driver.name, id->driver_data);
648 }
649 
650 static const struct i2c_device_id pcf2127_i2c_id[] = {
651 	{ "pcf2127", 1 },
652 	{ "pcf2129", 0 },
653 	{ }
654 };
655 MODULE_DEVICE_TABLE(i2c, pcf2127_i2c_id);
656 
657 static struct i2c_driver pcf2127_i2c_driver = {
658 	.driver		= {
659 		.name	= "rtc-pcf2127-i2c",
660 		.of_match_table = of_match_ptr(pcf2127_of_match),
661 	},
662 	.probe		= pcf2127_i2c_probe,
663 	.id_table	= pcf2127_i2c_id,
664 };
665 
pcf2127_i2c_register_driver(void)666 static int pcf2127_i2c_register_driver(void)
667 {
668 	return i2c_add_driver(&pcf2127_i2c_driver);
669 }
670 
pcf2127_i2c_unregister_driver(void)671 static void pcf2127_i2c_unregister_driver(void)
672 {
673 	i2c_del_driver(&pcf2127_i2c_driver);
674 }
675 
676 #else
677 
pcf2127_i2c_register_driver(void)678 static int pcf2127_i2c_register_driver(void)
679 {
680 	return 0;
681 }
682 
pcf2127_i2c_unregister_driver(void)683 static void pcf2127_i2c_unregister_driver(void)
684 {
685 }
686 
687 #endif
688 
689 #if IS_ENABLED(CONFIG_SPI_MASTER)
690 
691 static struct spi_driver pcf2127_spi_driver;
692 
pcf2127_spi_probe(struct spi_device * spi)693 static int pcf2127_spi_probe(struct spi_device *spi)
694 {
695 	static const struct regmap_config config = {
696 		.reg_bits = 8,
697 		.val_bits = 8,
698 		.read_flag_mask = 0xa0,
699 		.write_flag_mask = 0x20,
700 	};
701 	struct regmap *regmap;
702 
703 	regmap = devm_regmap_init_spi(spi, &config);
704 	if (IS_ERR(regmap)) {
705 		dev_err(&spi->dev, "%s: regmap allocation failed: %ld\n",
706 			__func__, PTR_ERR(regmap));
707 		return PTR_ERR(regmap);
708 	}
709 
710 	return pcf2127_probe(&spi->dev, regmap, pcf2127_spi_driver.driver.name,
711 			     spi_get_device_id(spi)->driver_data);
712 }
713 
714 static const struct spi_device_id pcf2127_spi_id[] = {
715 	{ "pcf2127", 1 },
716 	{ "pcf2129", 0 },
717 	{ }
718 };
719 MODULE_DEVICE_TABLE(spi, pcf2127_spi_id);
720 
721 static struct spi_driver pcf2127_spi_driver = {
722 	.driver		= {
723 		.name	= "rtc-pcf2127-spi",
724 		.of_match_table = of_match_ptr(pcf2127_of_match),
725 	},
726 	.probe		= pcf2127_spi_probe,
727 	.id_table	= pcf2127_spi_id,
728 };
729 
pcf2127_spi_register_driver(void)730 static int pcf2127_spi_register_driver(void)
731 {
732 	return spi_register_driver(&pcf2127_spi_driver);
733 }
734 
pcf2127_spi_unregister_driver(void)735 static void pcf2127_spi_unregister_driver(void)
736 {
737 	spi_unregister_driver(&pcf2127_spi_driver);
738 }
739 
740 #else
741 
pcf2127_spi_register_driver(void)742 static int pcf2127_spi_register_driver(void)
743 {
744 	return 0;
745 }
746 
pcf2127_spi_unregister_driver(void)747 static void pcf2127_spi_unregister_driver(void)
748 {
749 }
750 
751 #endif
752 
pcf2127_init(void)753 static int __init pcf2127_init(void)
754 {
755 	int ret;
756 
757 	ret = pcf2127_i2c_register_driver();
758 	if (ret) {
759 		pr_err("Failed to register pcf2127 i2c driver: %d\n", ret);
760 		return ret;
761 	}
762 
763 	ret = pcf2127_spi_register_driver();
764 	if (ret) {
765 		pr_err("Failed to register pcf2127 spi driver: %d\n", ret);
766 		pcf2127_i2c_unregister_driver();
767 	}
768 
769 	return ret;
770 }
module_init(pcf2127_init)771 module_init(pcf2127_init)
772 
773 static void __exit pcf2127_exit(void)
774 {
775 	pcf2127_spi_unregister_driver();
776 	pcf2127_i2c_unregister_driver();
777 }
778 module_exit(pcf2127_exit)
779 
780 MODULE_AUTHOR("Renaud Cerrato <r.cerrato@til-technologies.fr>");
781 MODULE_DESCRIPTION("NXP PCF2127/29 RTC driver");
782 MODULE_LICENSE("GPL v2");
783