1 // SPDX-License-Identifier: GPL-2.0+
2 //
3 // imx27 pinctrl driver based on imx pinmux core
4 //
5 // Copyright (C) 2013 Pengutronix
6 //
7 // Author: Markus Pargmann <mpa@pengutronix.de>
8
9 #include <linux/err.h>
10 #include <linux/init.h>
11 #include <linux/io.h>
12 #include <linux/of.h>
13 #include <linux/of_device.h>
14 #include <linux/pinctrl/pinctrl.h>
15
16 #include "pinctrl-imx1.h"
17
18 #define PAD_ID(port, pin) (port*32 + pin)
19 #define PA 0
20 #define PB 1
21 #define PC 2
22 #define PD 3
23 #define PE 4
24 #define PF 5
25
26 enum imx27_pads {
27 MX27_PAD_USBH2_CLK = PAD_ID(PA, 0),
28 MX27_PAD_USBH2_DIR = PAD_ID(PA, 1),
29 MX27_PAD_USBH2_DATA7 = PAD_ID(PA, 2),
30 MX27_PAD_USBH2_NXT = PAD_ID(PA, 3),
31 MX27_PAD_USBH2_STP = PAD_ID(PA, 4),
32 MX27_PAD_LSCLK = PAD_ID(PA, 5),
33 MX27_PAD_LD0 = PAD_ID(PA, 6),
34 MX27_PAD_LD1 = PAD_ID(PA, 7),
35 MX27_PAD_LD2 = PAD_ID(PA, 8),
36 MX27_PAD_LD3 = PAD_ID(PA, 9),
37 MX27_PAD_LD4 = PAD_ID(PA, 10),
38 MX27_PAD_LD5 = PAD_ID(PA, 11),
39 MX27_PAD_LD6 = PAD_ID(PA, 12),
40 MX27_PAD_LD7 = PAD_ID(PA, 13),
41 MX27_PAD_LD8 = PAD_ID(PA, 14),
42 MX27_PAD_LD9 = PAD_ID(PA, 15),
43 MX27_PAD_LD10 = PAD_ID(PA, 16),
44 MX27_PAD_LD11 = PAD_ID(PA, 17),
45 MX27_PAD_LD12 = PAD_ID(PA, 18),
46 MX27_PAD_LD13 = PAD_ID(PA, 19),
47 MX27_PAD_LD14 = PAD_ID(PA, 20),
48 MX27_PAD_LD15 = PAD_ID(PA, 21),
49 MX27_PAD_LD16 = PAD_ID(PA, 22),
50 MX27_PAD_LD17 = PAD_ID(PA, 23),
51 MX27_PAD_REV = PAD_ID(PA, 24),
52 MX27_PAD_CLS = PAD_ID(PA, 25),
53 MX27_PAD_PS = PAD_ID(PA, 26),
54 MX27_PAD_SPL_SPR = PAD_ID(PA, 27),
55 MX27_PAD_HSYNC = PAD_ID(PA, 28),
56 MX27_PAD_VSYNC = PAD_ID(PA, 29),
57 MX27_PAD_CONTRAST = PAD_ID(PA, 30),
58 MX27_PAD_OE_ACD = PAD_ID(PA, 31),
59
60 MX27_PAD_SD2_D0 = PAD_ID(PB, 4),
61 MX27_PAD_SD2_D1 = PAD_ID(PB, 5),
62 MX27_PAD_SD2_D2 = PAD_ID(PB, 6),
63 MX27_PAD_SD2_D3 = PAD_ID(PB, 7),
64 MX27_PAD_SD2_CMD = PAD_ID(PB, 8),
65 MX27_PAD_SD2_CLK = PAD_ID(PB, 9),
66 MX27_PAD_CSI_D0 = PAD_ID(PB, 10),
67 MX27_PAD_CSI_D1 = PAD_ID(PB, 11),
68 MX27_PAD_CSI_D2 = PAD_ID(PB, 12),
69 MX27_PAD_CSI_D3 = PAD_ID(PB, 13),
70 MX27_PAD_CSI_D4 = PAD_ID(PB, 14),
71 MX27_PAD_CSI_MCLK = PAD_ID(PB, 15),
72 MX27_PAD_CSI_PIXCLK = PAD_ID(PB, 16),
73 MX27_PAD_CSI_D5 = PAD_ID(PB, 17),
74 MX27_PAD_CSI_D6 = PAD_ID(PB, 18),
75 MX27_PAD_CSI_D7 = PAD_ID(PB, 19),
76 MX27_PAD_CSI_VSYNC = PAD_ID(PB, 20),
77 MX27_PAD_CSI_HSYNC = PAD_ID(PB, 21),
78 MX27_PAD_USBH1_SUSP = PAD_ID(PB, 22),
79 MX27_PAD_USB_PWR = PAD_ID(PB, 23),
80 MX27_PAD_USB_OC_B = PAD_ID(PB, 24),
81 MX27_PAD_USBH1_RCV = PAD_ID(PB, 25),
82 MX27_PAD_USBH1_FS = PAD_ID(PB, 26),
83 MX27_PAD_USBH1_OE_B = PAD_ID(PB, 27),
84 MX27_PAD_USBH1_TXDM = PAD_ID(PB, 28),
85 MX27_PAD_USBH1_TXDP = PAD_ID(PB, 29),
86 MX27_PAD_USBH1_RXDM = PAD_ID(PB, 30),
87 MX27_PAD_USBH1_RXDP = PAD_ID(PB, 31),
88
89 MX27_PAD_I2C2_SDA = PAD_ID(PC, 5),
90 MX27_PAD_I2C2_SCL = PAD_ID(PC, 6),
91 MX27_PAD_USBOTG_DATA5 = PAD_ID(PC, 7),
92 MX27_PAD_USBOTG_DATA6 = PAD_ID(PC, 8),
93 MX27_PAD_USBOTG_DATA0 = PAD_ID(PC, 9),
94 MX27_PAD_USBOTG_DATA2 = PAD_ID(PC, 10),
95 MX27_PAD_USBOTG_DATA1 = PAD_ID(PC, 11),
96 MX27_PAD_USBOTG_DATA4 = PAD_ID(PC, 12),
97 MX27_PAD_USBOTG_DATA3 = PAD_ID(PC, 13),
98 MX27_PAD_TOUT = PAD_ID(PC, 14),
99 MX27_PAD_TIN = PAD_ID(PC, 15),
100 MX27_PAD_SSI4_FS = PAD_ID(PC, 16),
101 MX27_PAD_SSI4_RXDAT = PAD_ID(PC, 17),
102 MX27_PAD_SSI4_TXDAT = PAD_ID(PC, 18),
103 MX27_PAD_SSI4_CLK = PAD_ID(PC, 19),
104 MX27_PAD_SSI1_FS = PAD_ID(PC, 20),
105 MX27_PAD_SSI1_RXDAT = PAD_ID(PC, 21),
106 MX27_PAD_SSI1_TXDAT = PAD_ID(PC, 22),
107 MX27_PAD_SSI1_CLK = PAD_ID(PC, 23),
108 MX27_PAD_SSI2_FS = PAD_ID(PC, 24),
109 MX27_PAD_SSI2_RXDAT = PAD_ID(PC, 25),
110 MX27_PAD_SSI2_TXDAT = PAD_ID(PC, 26),
111 MX27_PAD_SSI2_CLK = PAD_ID(PC, 27),
112 MX27_PAD_SSI3_FS = PAD_ID(PC, 28),
113 MX27_PAD_SSI3_RXDAT = PAD_ID(PC, 29),
114 MX27_PAD_SSI3_TXDAT = PAD_ID(PC, 30),
115 MX27_PAD_SSI3_CLK = PAD_ID(PC, 31),
116
117 MX27_PAD_SD3_CMD = PAD_ID(PD, 0),
118 MX27_PAD_SD3_CLK = PAD_ID(PD, 1),
119 MX27_PAD_ATA_DATA0 = PAD_ID(PD, 2),
120 MX27_PAD_ATA_DATA1 = PAD_ID(PD, 3),
121 MX27_PAD_ATA_DATA2 = PAD_ID(PD, 4),
122 MX27_PAD_ATA_DATA3 = PAD_ID(PD, 5),
123 MX27_PAD_ATA_DATA4 = PAD_ID(PD, 6),
124 MX27_PAD_ATA_DATA5 = PAD_ID(PD, 7),
125 MX27_PAD_ATA_DATA6 = PAD_ID(PD, 8),
126 MX27_PAD_ATA_DATA7 = PAD_ID(PD, 9),
127 MX27_PAD_ATA_DATA8 = PAD_ID(PD, 10),
128 MX27_PAD_ATA_DATA9 = PAD_ID(PD, 11),
129 MX27_PAD_ATA_DATA10 = PAD_ID(PD, 12),
130 MX27_PAD_ATA_DATA11 = PAD_ID(PD, 13),
131 MX27_PAD_ATA_DATA12 = PAD_ID(PD, 14),
132 MX27_PAD_ATA_DATA13 = PAD_ID(PD, 15),
133 MX27_PAD_ATA_DATA14 = PAD_ID(PD, 16),
134 MX27_PAD_I2C_DATA = PAD_ID(PD, 17),
135 MX27_PAD_I2C_CLK = PAD_ID(PD, 18),
136 MX27_PAD_CSPI2_SS2 = PAD_ID(PD, 19),
137 MX27_PAD_CSPI2_SS1 = PAD_ID(PD, 20),
138 MX27_PAD_CSPI2_SS0 = PAD_ID(PD, 21),
139 MX27_PAD_CSPI2_SCLK = PAD_ID(PD, 22),
140 MX27_PAD_CSPI2_MISO = PAD_ID(PD, 23),
141 MX27_PAD_CSPI2_MOSI = PAD_ID(PD, 24),
142 MX27_PAD_CSPI1_RDY = PAD_ID(PD, 25),
143 MX27_PAD_CSPI1_SS2 = PAD_ID(PD, 26),
144 MX27_PAD_CSPI1_SS1 = PAD_ID(PD, 27),
145 MX27_PAD_CSPI1_SS0 = PAD_ID(PD, 28),
146 MX27_PAD_CSPI1_SCLK = PAD_ID(PD, 29),
147 MX27_PAD_CSPI1_MISO = PAD_ID(PD, 30),
148 MX27_PAD_CSPI1_MOSI = PAD_ID(PD, 31),
149
150 MX27_PAD_USBOTG_NXT = PAD_ID(PE, 0),
151 MX27_PAD_USBOTG_STP = PAD_ID(PE, 1),
152 MX27_PAD_USBOTG_DIR = PAD_ID(PE, 2),
153 MX27_PAD_UART2_CTS = PAD_ID(PE, 3),
154 MX27_PAD_UART2_RTS = PAD_ID(PE, 4),
155 MX27_PAD_PWMO = PAD_ID(PE, 5),
156 MX27_PAD_UART2_TXD = PAD_ID(PE, 6),
157 MX27_PAD_UART2_RXD = PAD_ID(PE, 7),
158 MX27_PAD_UART3_TXD = PAD_ID(PE, 8),
159 MX27_PAD_UART3_RXD = PAD_ID(PE, 9),
160 MX27_PAD_UART3_CTS = PAD_ID(PE, 10),
161 MX27_PAD_UART3_RTS = PAD_ID(PE, 11),
162 MX27_PAD_UART1_TXD = PAD_ID(PE, 12),
163 MX27_PAD_UART1_RXD = PAD_ID(PE, 13),
164 MX27_PAD_UART1_CTS = PAD_ID(PE, 14),
165 MX27_PAD_UART1_RTS = PAD_ID(PE, 15),
166 MX27_PAD_RTCK = PAD_ID(PE, 16),
167 MX27_PAD_RESET_OUT_B = PAD_ID(PE, 17),
168 MX27_PAD_SD1_D0 = PAD_ID(PE, 18),
169 MX27_PAD_SD1_D1 = PAD_ID(PE, 19),
170 MX27_PAD_SD1_D2 = PAD_ID(PE, 20),
171 MX27_PAD_SD1_D3 = PAD_ID(PE, 21),
172 MX27_PAD_SD1_CMD = PAD_ID(PE, 22),
173 MX27_PAD_SD1_CLK = PAD_ID(PE, 23),
174 MX27_PAD_USBOTG_CLK = PAD_ID(PE, 24),
175 MX27_PAD_USBOTG_DATA7 = PAD_ID(PE, 25),
176
177 MX27_PAD_NFRB = PAD_ID(PF, 0),
178 MX27_PAD_NFCLE = PAD_ID(PF, 1),
179 MX27_PAD_NFWP_B = PAD_ID(PF, 2),
180 MX27_PAD_NFCE_B = PAD_ID(PF, 3),
181 MX27_PAD_NFALE = PAD_ID(PF, 4),
182 MX27_PAD_NFRE_B = PAD_ID(PF, 5),
183 MX27_PAD_NFWE_B = PAD_ID(PF, 6),
184 MX27_PAD_PC_POE = PAD_ID(PF, 7),
185 MX27_PAD_PC_RW_B = PAD_ID(PF, 8),
186 MX27_PAD_IOIS16 = PAD_ID(PF, 9),
187 MX27_PAD_PC_RST = PAD_ID(PF, 10),
188 MX27_PAD_PC_BVD2 = PAD_ID(PF, 11),
189 MX27_PAD_PC_BVD1 = PAD_ID(PF, 12),
190 MX27_PAD_PC_VS2 = PAD_ID(PF, 13),
191 MX27_PAD_PC_VS1 = PAD_ID(PF, 14),
192 MX27_PAD_CLKO = PAD_ID(PF, 15),
193 MX27_PAD_PC_PWRON = PAD_ID(PF, 16),
194 MX27_PAD_PC_READY = PAD_ID(PF, 17),
195 MX27_PAD_PC_WAIT_B = PAD_ID(PF, 18),
196 MX27_PAD_PC_CD2_B = PAD_ID(PF, 19),
197 MX27_PAD_PC_CD1_B = PAD_ID(PF, 20),
198 MX27_PAD_CS4_B = PAD_ID(PF, 21),
199 MX27_PAD_CS5_B = PAD_ID(PF, 22),
200 MX27_PAD_ATA_DATA15 = PAD_ID(PF, 23),
201 };
202
203 /* Pad names for the pinmux subsystem */
204 static const struct pinctrl_pin_desc imx27_pinctrl_pads[] = {
205 IMX_PINCTRL_PIN(MX27_PAD_USBH2_CLK),
206 IMX_PINCTRL_PIN(MX27_PAD_USBH2_DIR),
207 IMX_PINCTRL_PIN(MX27_PAD_USBH2_DATA7),
208 IMX_PINCTRL_PIN(MX27_PAD_USBH2_NXT),
209 IMX_PINCTRL_PIN(MX27_PAD_USBH2_STP),
210 IMX_PINCTRL_PIN(MX27_PAD_LSCLK),
211 IMX_PINCTRL_PIN(MX27_PAD_LD0),
212 IMX_PINCTRL_PIN(MX27_PAD_LD1),
213 IMX_PINCTRL_PIN(MX27_PAD_LD2),
214 IMX_PINCTRL_PIN(MX27_PAD_LD3),
215 IMX_PINCTRL_PIN(MX27_PAD_LD4),
216 IMX_PINCTRL_PIN(MX27_PAD_LD5),
217 IMX_PINCTRL_PIN(MX27_PAD_LD6),
218 IMX_PINCTRL_PIN(MX27_PAD_LD7),
219 IMX_PINCTRL_PIN(MX27_PAD_LD8),
220 IMX_PINCTRL_PIN(MX27_PAD_LD9),
221 IMX_PINCTRL_PIN(MX27_PAD_LD10),
222 IMX_PINCTRL_PIN(MX27_PAD_LD11),
223 IMX_PINCTRL_PIN(MX27_PAD_LD12),
224 IMX_PINCTRL_PIN(MX27_PAD_LD13),
225 IMX_PINCTRL_PIN(MX27_PAD_LD14),
226 IMX_PINCTRL_PIN(MX27_PAD_LD15),
227 IMX_PINCTRL_PIN(MX27_PAD_LD16),
228 IMX_PINCTRL_PIN(MX27_PAD_LD17),
229 IMX_PINCTRL_PIN(MX27_PAD_REV),
230 IMX_PINCTRL_PIN(MX27_PAD_CLS),
231 IMX_PINCTRL_PIN(MX27_PAD_PS),
232 IMX_PINCTRL_PIN(MX27_PAD_SPL_SPR),
233 IMX_PINCTRL_PIN(MX27_PAD_HSYNC),
234 IMX_PINCTRL_PIN(MX27_PAD_VSYNC),
235 IMX_PINCTRL_PIN(MX27_PAD_CONTRAST),
236 IMX_PINCTRL_PIN(MX27_PAD_OE_ACD),
237
238 IMX_PINCTRL_PIN(MX27_PAD_SD2_D0),
239 IMX_PINCTRL_PIN(MX27_PAD_SD2_D1),
240 IMX_PINCTRL_PIN(MX27_PAD_SD2_D2),
241 IMX_PINCTRL_PIN(MX27_PAD_SD2_D3),
242 IMX_PINCTRL_PIN(MX27_PAD_SD2_CMD),
243 IMX_PINCTRL_PIN(MX27_PAD_SD2_CLK),
244 IMX_PINCTRL_PIN(MX27_PAD_CSI_D0),
245 IMX_PINCTRL_PIN(MX27_PAD_CSI_D1),
246 IMX_PINCTRL_PIN(MX27_PAD_CSI_D2),
247 IMX_PINCTRL_PIN(MX27_PAD_CSI_D3),
248 IMX_PINCTRL_PIN(MX27_PAD_CSI_D4),
249 IMX_PINCTRL_PIN(MX27_PAD_CSI_MCLK),
250 IMX_PINCTRL_PIN(MX27_PAD_CSI_PIXCLK),
251 IMX_PINCTRL_PIN(MX27_PAD_CSI_D5),
252 IMX_PINCTRL_PIN(MX27_PAD_CSI_D6),
253 IMX_PINCTRL_PIN(MX27_PAD_CSI_D7),
254 IMX_PINCTRL_PIN(MX27_PAD_CSI_VSYNC),
255 IMX_PINCTRL_PIN(MX27_PAD_CSI_HSYNC),
256 IMX_PINCTRL_PIN(MX27_PAD_USBH1_SUSP),
257 IMX_PINCTRL_PIN(MX27_PAD_USB_PWR),
258 IMX_PINCTRL_PIN(MX27_PAD_USB_OC_B),
259 IMX_PINCTRL_PIN(MX27_PAD_USBH1_RCV),
260 IMX_PINCTRL_PIN(MX27_PAD_USBH1_FS),
261 IMX_PINCTRL_PIN(MX27_PAD_USBH1_OE_B),
262 IMX_PINCTRL_PIN(MX27_PAD_USBH1_TXDM),
263 IMX_PINCTRL_PIN(MX27_PAD_USBH1_TXDP),
264 IMX_PINCTRL_PIN(MX27_PAD_USBH1_RXDM),
265 IMX_PINCTRL_PIN(MX27_PAD_USBH1_RXDP),
266
267 IMX_PINCTRL_PIN(MX27_PAD_I2C2_SDA),
268 IMX_PINCTRL_PIN(MX27_PAD_I2C2_SCL),
269 IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA5),
270 IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA6),
271 IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA0),
272 IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA2),
273 IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA1),
274 IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA4),
275 IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA3),
276 IMX_PINCTRL_PIN(MX27_PAD_TOUT),
277 IMX_PINCTRL_PIN(MX27_PAD_TIN),
278 IMX_PINCTRL_PIN(MX27_PAD_SSI4_FS),
279 IMX_PINCTRL_PIN(MX27_PAD_SSI4_RXDAT),
280 IMX_PINCTRL_PIN(MX27_PAD_SSI4_TXDAT),
281 IMX_PINCTRL_PIN(MX27_PAD_SSI4_CLK),
282 IMX_PINCTRL_PIN(MX27_PAD_SSI1_FS),
283 IMX_PINCTRL_PIN(MX27_PAD_SSI1_RXDAT),
284 IMX_PINCTRL_PIN(MX27_PAD_SSI1_TXDAT),
285 IMX_PINCTRL_PIN(MX27_PAD_SSI1_CLK),
286 IMX_PINCTRL_PIN(MX27_PAD_SSI2_FS),
287 IMX_PINCTRL_PIN(MX27_PAD_SSI2_RXDAT),
288 IMX_PINCTRL_PIN(MX27_PAD_SSI2_TXDAT),
289 IMX_PINCTRL_PIN(MX27_PAD_SSI2_CLK),
290 IMX_PINCTRL_PIN(MX27_PAD_SSI3_FS),
291 IMX_PINCTRL_PIN(MX27_PAD_SSI3_RXDAT),
292 IMX_PINCTRL_PIN(MX27_PAD_SSI3_TXDAT),
293 IMX_PINCTRL_PIN(MX27_PAD_SSI3_CLK),
294
295 IMX_PINCTRL_PIN(MX27_PAD_SD3_CMD),
296 IMX_PINCTRL_PIN(MX27_PAD_SD3_CLK),
297 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA0),
298 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA1),
299 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA2),
300 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA3),
301 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA4),
302 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA5),
303 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA6),
304 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA7),
305 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA8),
306 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA9),
307 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA10),
308 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA11),
309 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA12),
310 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA13),
311 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA14),
312 IMX_PINCTRL_PIN(MX27_PAD_I2C_DATA),
313 IMX_PINCTRL_PIN(MX27_PAD_I2C_CLK),
314 IMX_PINCTRL_PIN(MX27_PAD_CSPI2_SS2),
315 IMX_PINCTRL_PIN(MX27_PAD_CSPI2_SS1),
316 IMX_PINCTRL_PIN(MX27_PAD_CSPI2_SS0),
317 IMX_PINCTRL_PIN(MX27_PAD_CSPI2_SCLK),
318 IMX_PINCTRL_PIN(MX27_PAD_CSPI2_MISO),
319 IMX_PINCTRL_PIN(MX27_PAD_CSPI2_MOSI),
320 IMX_PINCTRL_PIN(MX27_PAD_CSPI1_RDY),
321 IMX_PINCTRL_PIN(MX27_PAD_CSPI1_SS2),
322 IMX_PINCTRL_PIN(MX27_PAD_CSPI1_SS1),
323 IMX_PINCTRL_PIN(MX27_PAD_CSPI1_SS0),
324 IMX_PINCTRL_PIN(MX27_PAD_CSPI1_SCLK),
325 IMX_PINCTRL_PIN(MX27_PAD_CSPI1_MISO),
326 IMX_PINCTRL_PIN(MX27_PAD_CSPI1_MOSI),
327
328 IMX_PINCTRL_PIN(MX27_PAD_USBOTG_NXT),
329 IMX_PINCTRL_PIN(MX27_PAD_USBOTG_STP),
330 IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DIR),
331 IMX_PINCTRL_PIN(MX27_PAD_UART2_CTS),
332 IMX_PINCTRL_PIN(MX27_PAD_UART2_RTS),
333 IMX_PINCTRL_PIN(MX27_PAD_PWMO),
334 IMX_PINCTRL_PIN(MX27_PAD_UART2_TXD),
335 IMX_PINCTRL_PIN(MX27_PAD_UART2_RXD),
336 IMX_PINCTRL_PIN(MX27_PAD_UART3_TXD),
337 IMX_PINCTRL_PIN(MX27_PAD_UART3_RXD),
338 IMX_PINCTRL_PIN(MX27_PAD_UART3_CTS),
339 IMX_PINCTRL_PIN(MX27_PAD_UART3_RTS),
340 IMX_PINCTRL_PIN(MX27_PAD_UART1_TXD),
341 IMX_PINCTRL_PIN(MX27_PAD_UART1_RXD),
342 IMX_PINCTRL_PIN(MX27_PAD_UART1_CTS),
343 IMX_PINCTRL_PIN(MX27_PAD_UART1_RTS),
344 IMX_PINCTRL_PIN(MX27_PAD_RTCK),
345 IMX_PINCTRL_PIN(MX27_PAD_RESET_OUT_B),
346 IMX_PINCTRL_PIN(MX27_PAD_SD1_D0),
347 IMX_PINCTRL_PIN(MX27_PAD_SD1_D1),
348 IMX_PINCTRL_PIN(MX27_PAD_SD1_D2),
349 IMX_PINCTRL_PIN(MX27_PAD_SD1_D3),
350 IMX_PINCTRL_PIN(MX27_PAD_SD1_CMD),
351 IMX_PINCTRL_PIN(MX27_PAD_SD1_CLK),
352 IMX_PINCTRL_PIN(MX27_PAD_USBOTG_CLK),
353 IMX_PINCTRL_PIN(MX27_PAD_USBOTG_DATA7),
354
355 IMX_PINCTRL_PIN(MX27_PAD_NFRB),
356 IMX_PINCTRL_PIN(MX27_PAD_NFCLE),
357 IMX_PINCTRL_PIN(MX27_PAD_NFWP_B),
358 IMX_PINCTRL_PIN(MX27_PAD_NFCE_B),
359 IMX_PINCTRL_PIN(MX27_PAD_NFALE),
360 IMX_PINCTRL_PIN(MX27_PAD_NFRE_B),
361 IMX_PINCTRL_PIN(MX27_PAD_NFWE_B),
362 IMX_PINCTRL_PIN(MX27_PAD_PC_POE),
363 IMX_PINCTRL_PIN(MX27_PAD_PC_RW_B),
364 IMX_PINCTRL_PIN(MX27_PAD_IOIS16),
365 IMX_PINCTRL_PIN(MX27_PAD_PC_RST),
366 IMX_PINCTRL_PIN(MX27_PAD_PC_BVD2),
367 IMX_PINCTRL_PIN(MX27_PAD_PC_BVD1),
368 IMX_PINCTRL_PIN(MX27_PAD_PC_VS2),
369 IMX_PINCTRL_PIN(MX27_PAD_PC_VS1),
370 IMX_PINCTRL_PIN(MX27_PAD_CLKO),
371 IMX_PINCTRL_PIN(MX27_PAD_PC_PWRON),
372 IMX_PINCTRL_PIN(MX27_PAD_PC_READY),
373 IMX_PINCTRL_PIN(MX27_PAD_PC_WAIT_B),
374 IMX_PINCTRL_PIN(MX27_PAD_PC_CD2_B),
375 IMX_PINCTRL_PIN(MX27_PAD_PC_CD1_B),
376 IMX_PINCTRL_PIN(MX27_PAD_CS4_B),
377 IMX_PINCTRL_PIN(MX27_PAD_CS5_B),
378 IMX_PINCTRL_PIN(MX27_PAD_ATA_DATA15),
379 };
380
381 static struct imx1_pinctrl_soc_info imx27_pinctrl_info = {
382 .pins = imx27_pinctrl_pads,
383 .npins = ARRAY_SIZE(imx27_pinctrl_pads),
384 };
385
386 static const struct of_device_id imx27_pinctrl_of_match[] = {
387 { .compatible = "fsl,imx27-iomuxc", },
388 { /* sentinel */ }
389 };
390
imx27_pinctrl_probe(struct platform_device * pdev)391 static int imx27_pinctrl_probe(struct platform_device *pdev)
392 {
393 return imx1_pinctrl_core_probe(pdev, &imx27_pinctrl_info);
394 }
395
396 static struct platform_driver imx27_pinctrl_driver = {
397 .driver = {
398 .name = "imx27-pinctrl",
399 .of_match_table = of_match_ptr(imx27_pinctrl_of_match),
400 },
401 .probe = imx27_pinctrl_probe,
402 };
403
imx27_pinctrl_init(void)404 static int __init imx27_pinctrl_init(void)
405 {
406 return platform_driver_register(&imx27_pinctrl_driver);
407 }
408 arch_initcall(imx27_pinctrl_init);
409
