1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*******************************************************************************
3 Copyright (C) 2007-2009 STMicroelectronics Ltd
4
5
6 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
7 *******************************************************************************/
8
9 #ifndef __STMMAC_H__
10 #define __STMMAC_H__
11
12 #define STMMAC_RESOURCE_NAME "stmmaceth"
13 #define DRV_MODULE_VERSION "Jan_2016"
14
15 #include <linux/clk.h>
16 #include <linux/if_vlan.h>
17 #include <linux/stmmac.h>
18 #include <linux/phylink.h>
19 #include <linux/pci.h>
20 #include "common.h"
21 #include <linux/ptp_clock_kernel.h>
22 #include <linux/net_tstamp.h>
23 #include <linux/reset.h>
24 #include <net/page_pool.h>
25
26 struct stmmac_resources {
27 void __iomem *addr;
28 const char *mac;
29 int wol_irq;
30 int lpi_irq;
31 int irq;
32 };
33
34 struct stmmac_tx_info {
35 dma_addr_t buf;
36 bool map_as_page;
37 unsigned len;
38 bool last_segment;
39 bool is_jumbo;
40 };
41
42 /* Frequently used values are kept adjacent for cache effect */
43 struct stmmac_tx_queue {
44 u32 tx_count_frames;
45 struct timer_list txtimer;
46 u32 queue_index;
47 struct stmmac_priv *priv_data;
48 struct dma_extended_desc *dma_etx ____cacheline_aligned_in_smp;
49 struct dma_desc *dma_tx;
50 struct sk_buff **tx_skbuff;
51 struct stmmac_tx_info *tx_skbuff_dma;
52 unsigned int cur_tx;
53 unsigned int dirty_tx;
54 dma_addr_t dma_tx_phy;
55 u32 tx_tail_addr;
56 u32 mss;
57 };
58
59 struct stmmac_rx_buffer {
60 struct page *page;
61 struct page *sec_page;
62 dma_addr_t addr;
63 dma_addr_t sec_addr;
64 };
65
66 struct stmmac_rx_queue {
67 u32 rx_count_frames;
68 u32 queue_index;
69 struct page_pool *page_pool;
70 struct stmmac_rx_buffer *buf_pool;
71 struct stmmac_priv *priv_data;
72 struct dma_extended_desc *dma_erx;
73 struct dma_desc *dma_rx ____cacheline_aligned_in_smp;
74 unsigned int cur_rx;
75 unsigned int dirty_rx;
76 u32 rx_zeroc_thresh;
77 dma_addr_t dma_rx_phy;
78 u32 rx_tail_addr;
79 unsigned int state_saved;
80 struct {
81 struct sk_buff *skb;
82 unsigned int len;
83 unsigned int error;
84 } state;
85 };
86
87 struct stmmac_channel {
88 struct napi_struct rx_napi ____cacheline_aligned_in_smp;
89 struct napi_struct tx_napi ____cacheline_aligned_in_smp;
90 struct stmmac_priv *priv_data;
91 u32 index;
92 };
93
94 struct stmmac_tc_entry {
95 bool in_use;
96 bool in_hw;
97 bool is_last;
98 bool is_frag;
99 void *frag_ptr;
100 unsigned int table_pos;
101 u32 handle;
102 u32 prio;
103 struct {
104 u32 match_data;
105 u32 match_en;
106 u8 af:1;
107 u8 rf:1;
108 u8 im:1;
109 u8 nc:1;
110 u8 res1:4;
111 u8 frame_offset;
112 u8 ok_index;
113 u8 dma_ch_no;
114 u32 res2;
115 } __packed val;
116 };
117
118 #define STMMAC_PPS_MAX 4
119 struct stmmac_pps_cfg {
120 bool available;
121 struct timespec64 start;
122 struct timespec64 period;
123 };
124
125 struct stmmac_rss {
126 int enable;
127 u8 key[STMMAC_RSS_HASH_KEY_SIZE];
128 u32 table[STMMAC_RSS_MAX_TABLE_SIZE];
129 };
130
131 #define STMMAC_FLOW_ACTION_DROP BIT(0)
132 struct stmmac_flow_entry {
133 unsigned long cookie;
134 unsigned long action;
135 u8 ip_proto;
136 int in_use;
137 int idx;
138 int is_l4;
139 };
140
141 struct stmmac_priv {
142 /* Frequently used values are kept adjacent for cache effect */
143 u32 tx_coal_frames;
144 u32 tx_coal_timer;
145 u32 rx_coal_frames;
146
147 int tx_coalesce;
148 int hwts_tx_en;
149 bool tx_path_in_lpi_mode;
150 bool tso;
151 int sph;
152 u32 sarc_type;
153
154 unsigned int dma_buf_sz;
155 unsigned int rx_copybreak;
156 u32 rx_riwt;
157 int hwts_rx_en;
158
159 void __iomem *ioaddr;
160 struct net_device *dev;
161 struct device *device;
162 struct mac_device_info *hw;
163 int (*hwif_quirks)(struct stmmac_priv *priv);
164 struct mutex lock;
165
166 /* RX Queue */
167 struct stmmac_rx_queue rx_queue[MTL_MAX_RX_QUEUES];
168
169 /* TX Queue */
170 struct stmmac_tx_queue tx_queue[MTL_MAX_TX_QUEUES];
171
172 /* Generic channel for NAPI */
173 struct stmmac_channel channel[STMMAC_CH_MAX];
174
175 int speed;
176 unsigned int flow_ctrl;
177 unsigned int pause;
178 struct mii_bus *mii;
179 int mii_irq[PHY_MAX_ADDR];
180
181 struct phylink_config phylink_config;
182 struct phylink *phylink;
183
184 struct stmmac_extra_stats xstats ____cacheline_aligned_in_smp;
185 struct stmmac_safety_stats sstats;
186 struct plat_stmmacenet_data *plat;
187 struct dma_features dma_cap;
188 struct stmmac_counters mmc;
189 int hw_cap_support;
190 int synopsys_id;
191 u32 msg_enable;
192 int wolopts;
193 int wol_irq;
194 int clk_csr;
195 struct timer_list eee_ctrl_timer;
196 int lpi_irq;
197 int eee_enabled;
198 int eee_active;
199 int tx_lpi_timer;
200 unsigned int mode;
201 unsigned int chain_mode;
202 int extend_desc;
203 struct hwtstamp_config tstamp_config;
204 struct ptp_clock *ptp_clock;
205 struct ptp_clock_info ptp_clock_ops;
206 unsigned int default_addend;
207 u32 sub_second_inc;
208 u32 systime_flags;
209 u32 adv_ts;
210 int use_riwt;
211 int irq_wake;
212 spinlock_t ptp_lock;
213 void __iomem *mmcaddr;
214 void __iomem *ptpaddr;
215 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
216
217 #ifdef CONFIG_DEBUG_FS
218 struct dentry *dbgfs_dir;
219 #endif
220
221 unsigned long state;
222 struct workqueue_struct *wq;
223 struct work_struct service_task;
224
225 /* TC Handling */
226 unsigned int tc_entries_max;
227 unsigned int tc_off_max;
228 struct stmmac_tc_entry *tc_entries;
229 unsigned int flow_entries_max;
230 struct stmmac_flow_entry *flow_entries;
231
232 /* Pulse Per Second output */
233 struct stmmac_pps_cfg pps[STMMAC_PPS_MAX];
234
235 /* Receive Side Scaling */
236 struct stmmac_rss rss;
237 };
238
239 enum stmmac_state {
240 STMMAC_DOWN,
241 STMMAC_RESET_REQUESTED,
242 STMMAC_RESETING,
243 STMMAC_SERVICE_SCHED,
244 };
245
246 int stmmac_mdio_unregister(struct net_device *ndev);
247 int stmmac_mdio_register(struct net_device *ndev);
248 int stmmac_mdio_reset(struct mii_bus *mii);
249 void stmmac_set_ethtool_ops(struct net_device *netdev);
250
251 void stmmac_ptp_register(struct stmmac_priv *priv);
252 void stmmac_ptp_unregister(struct stmmac_priv *priv);
253 int stmmac_resume(struct device *dev);
254 int stmmac_suspend(struct device *dev);
255 int stmmac_dvr_remove(struct device *dev);
256 int stmmac_dvr_probe(struct device *device,
257 struct plat_stmmacenet_data *plat_dat,
258 struct stmmac_resources *res);
259 void stmmac_disable_eee_mode(struct stmmac_priv *priv);
260 bool stmmac_eee_init(struct stmmac_priv *priv);
261
262 #if IS_ENABLED(CONFIG_STMMAC_SELFTESTS)
263 void stmmac_selftest_run(struct net_device *dev,
264 struct ethtool_test *etest, u64 *buf);
265 void stmmac_selftest_get_strings(struct stmmac_priv *priv, u8 *data);
266 int stmmac_selftest_get_count(struct stmmac_priv *priv);
267 #else
stmmac_selftest_run(struct net_device * dev,struct ethtool_test * etest,u64 * buf)268 static inline void stmmac_selftest_run(struct net_device *dev,
269 struct ethtool_test *etest, u64 *buf)
270 {
271 /* Not enabled */
272 }
stmmac_selftest_get_strings(struct stmmac_priv * priv,u8 * data)273 static inline void stmmac_selftest_get_strings(struct stmmac_priv *priv,
274 u8 *data)
275 {
276 /* Not enabled */
277 }
stmmac_selftest_get_count(struct stmmac_priv * priv)278 static inline int stmmac_selftest_get_count(struct stmmac_priv *priv)
279 {
280 return -EOPNOTSUPP;
281 }
282 #endif /* CONFIG_STMMAC_SELFTESTS */
283
284 #endif /* __STMMAC_H__ */
285
