1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) 2018, Intel Corporation. */ 3 4 #ifndef _ICE_SCHED_H_ 5 #define _ICE_SCHED_H_ 6 7 #include "ice_common.h" 8 9 #define ICE_QGRP_LAYER_OFFSET 2 10 #define ICE_VSI_LAYER_OFFSET 4 11 12 struct ice_sched_agg_vsi_info { 13 struct list_head list_entry; 14 DECLARE_BITMAP(tc_bitmap, ICE_MAX_TRAFFIC_CLASS); 15 u16 vsi_handle; 16 }; 17 18 struct ice_sched_agg_info { 19 struct list_head agg_vsi_list; 20 struct list_head list_entry; 21 DECLARE_BITMAP(tc_bitmap, ICE_MAX_TRAFFIC_CLASS); 22 u32 agg_id; 23 enum ice_agg_type agg_type; 24 }; 25 26 /* FW AQ command calls */ 27 enum ice_status 28 ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req, 29 struct ice_aqc_get_elem *buf, u16 buf_size, 30 u16 *elems_ret, struct ice_sq_cd *cd); 31 enum ice_status ice_sched_init_port(struct ice_port_info *pi); 32 enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw); 33 void ice_sched_clear_port(struct ice_port_info *pi); 34 void ice_sched_cleanup_all(struct ice_hw *hw); 35 void ice_sched_clear_agg(struct ice_hw *hw); 36 37 struct ice_sched_node * 38 ice_sched_find_node_by_teid(struct ice_sched_node *start_node, u32 teid); 39 enum ice_status 40 ice_sched_add_node(struct ice_port_info *pi, u8 layer, 41 struct ice_aqc_txsched_elem_data *info); 42 void ice_free_sched_node(struct ice_port_info *pi, struct ice_sched_node *node); 43 struct ice_sched_node *ice_sched_get_tc_node(struct ice_port_info *pi, u8 tc); 44 struct ice_sched_node * 45 ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc, 46 u8 owner); 47 enum ice_status 48 ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs, 49 u8 owner, bool enable); 50 enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle); 51 #endif /* _ICE_SCHED_H_ */ 52
